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11. 发明公开

KR1020140012584A 질화물계 반도체 소자 审中-实审
标题翻译：基于氮化物的半导体器件
公开(公告)号：KR1020140012584A
公开(公告)日：2014-02-03
申请号：KR1020130049618
申请日：2013-05-02
申请人： 삼성전자주식회사
发明人： 전우철 , 박기열 , 박영환 , 신재광 , 오재준
IPC分类号： H01L29/778 , H01L21/335
摘要： Disclosed are a nitride based semiconductor diode and a nitride based semiconductor device including the same. The nitride based semiconductor device includes a substrate; a first semiconductor layer made of nitride based semiconductor and prepared on the substrate; a second semiconductor layer made of nitride based semiconductor prepared on the first semiconductor layer and having a first part of which thickness is thinner than that of a second part; an insulating layer prepared on the second semiconductor layer; a first electrode covering the first part of the second semiconductor layer and forming an ohmic contact with the first semiconductor layer; and a second electrode separated from the first electrode and forming an ohmic contact with the first semiconductor layer.
摘要翻译：公开了一种基于氮化物的半导体二极管和包括其的氮化物基半导体器件。氮化物基半导体器件包括衬底; 由氮化物基半导体制成的第一半导体层，并在衬底上制备; 由氮化物基半导体制成的第二半导体层，其制备在第一半导体层上，其第一部分的厚度比第二部分的厚度薄; 在所述第二半导体层上制备的绝缘层; 覆盖第二半导体层的第一部分并与第一半导体层形成欧姆接触的第一电极; 以及与所述第一电极分离并与所述第一半导体层形成欧姆接触的第二电极。

12. 发明授权

KR101356694B1 실리콘 나노와이어를 이용한 발광 다이오드 및 그 제조방법 有权
标题翻译：使用Si-纳米线的发光二极管及其制造方法
公开(公告)号：KR101356694B1
公开(公告)日：2014-01-29
申请号：KR1020070045509
申请日：2007-05-10
申请人： 삼성전자주식회사
发明人： 홍기하 , 진영구 , 신재광 , 박성일 , 김종섭
IPC分类号： H01L33/00 , B82B1/00 , B82Y20/00
CPC分类号： H01L33/18
摘要： 실리콘 나노와이어를 발광소자로서 이용하는 발광 다이오드 및 그 제조 방법을 개시한다. 본 발명의 한 유형에 따른 발광 다이오드는, 반도체 기판; 상기 반도체 기판의 상면에서 서로 마주하도록 배치된 제 1 및 제 2 반도체 돌출부; 상기 제 1 및 제 2 반도체 돌출부 사이에 현가된 반도체 나노와이어; 및 상기 제 1 및 제 2 반도체 돌출부의 상면에 각각 형성된 제 1 및 제 2 전극;을 포함하는 것을 특징으로 한다.

13. 发明公开

KR1020120125041A 고전자이동도 트랜지스터 및 그 제조방법 审中-实审
标题翻译：高电子迁移率晶体管及其制造方法
公开(公告)号：KR1020120125041A
公开(公告)日：2012-11-14
申请号：KR1020110043082
申请日：2011-05-06
申请人： 삼성전자주식회사
发明人： 황인준 , 신재광 , 오재준 , 하종봉 , 최혁순 , 홍기하
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L29/7787 , H01L29/1066 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/432 , H01L29/66462
摘要： PURPOSE: A high electron mobility transistor and a manufacturing method thereof are provided to strengthen threshold voltage performance by controlling the depth of a recess region formed on a channel supply layer. CONSTITUTION: A channel layer(C1) comprises 2DEG(2 Dimensional Electron Gas). A channel supply layer(CS1) comprises an etching stopping layer and a top layer. The channel supply layer has a recess region(R1). A gate electrode comprises the recess region of the channel supply layer. A source electrode and a drain electrode are included on both sides of the gate electrode. A bottom layer is formed between the channel supply layer and the etching stopping layer.
摘要翻译：目的：提供高电子迁移率晶体管及其制造方法，以通过控制形成在沟道供应层上的凹陷区域的深度来增强阈值电压性能。构成：通道层（C1）包括2DEG（2维电子气体）。沟道供给层（CS1）包括蚀刻停止层和顶层。通道供给层具有凹部（R1）。栅电极包括沟道供应层的凹陷区域。源电极和漏极包括在栅电极的两侧。在沟道供给层和蚀刻停止层之间形成底层。

14. 发明公开

KR1020120010512A 멀티 채널을 갖는 고 전자 이동도 트랜지스터 및 그 제조방법 有权
标题翻译：具有多通道的高电子迁移率晶体管及其制造方法
公开(公告)号：KR1020120010512A
公开(公告)日：2012-02-03
申请号：KR1020100072098
申请日：2010-07-26
申请人： 삼성전자주식회사
发明人： 황인준 , 신재광 , 오재준 , 김종섭 , 최혁순 , 홍기하
IPC分类号： H01L29/778 , H01L21/335
摘要： PURPOSE: A high electron mobility transistor having multi channel and a method of manufacturing the same are provided to increase insulation breakdown voltage by preventing the concentration of electric field on a gate. CONSTITUTION: A lamination structure(20) is arranged in a substrate(30). The lamination structure comprises a plurality of the material layer(40A,40B). First to third holes(h1,h2,h3) are formed in the lamination structure. A source electrode(52S) and a drain electrode(52D) cover both ends of an Y-axis of the lamination structure. A gate(54G) is arranged in the lamination structure between the drain electrode and the source electrode.
摘要翻译：目的：提供具有多通道的高电子迁移率晶体管及其制造方法，以通过防止栅极上的电场集中来提高绝缘击穿电压。构成：层叠结构（20）布置在衬底（30）中。层压结构包括多个材料层（40A，40B）。在层压结构中形成第一至第三孔（h1，h2，h3）。源电极（52S）和漏电极（52D）覆盖层叠结构的Y轴的两端。栅极（54G）布置在漏电极和源电极之间的层叠结构中。

15. 发明公开

KR1020110136719A 고 전자 이동도 트랜지스터 및 그 제조방법 审中-实审
标题翻译：高电导率晶体管及其制造方法
公开(公告)号：KR1020110136719A
公开(公告)日：2011-12-21
申请号：KR1020110056439
申请日：2011-06-10
申请人： 삼성전자주식회사
发明人： 홍기하 , 오재준 , 황인준 , 신재광 , 김종섭 , 최혁순
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L29/778 , H01L29/0847 , H01L29/1029 , H01L29/1066 , H01L29/2003 , H01L29/267 , H01L29/4236 , H01L29/42364 , H01L29/517 , H01L29/66431 , H01L29/66462 , H01L29/7785 , H01L29/7786
摘要： PURPOSE: A high electron mobility transistor and a manufacturing method thereof are provided to improve the reproducibility of an LCD area by controlling the electron concentration of the LCD area through the thickness adjustment of a thin film. CONSTITUTION: A buffer layer(24) is formed on a substrate(20). A first material layer(30) is formed on the buffer layer. A second material layer(32) is formed on the first material layer. A negative charge(31) is formed in the interface of the first material layer which is contacted with the second material layer. A channel increase layer is formed on the second material layer.
摘要翻译：目的：提供高电子迁移率晶体管及其制造方法，以通过薄膜的厚度调整来控制LCD面积的电子浓度来提高LCD面积的再现性。构成：在衬底（20）上形成缓冲层（24）。第一材料层（30）形成在缓冲层上。第二材料层（32）形成在第一材料层上。在与第二材料层接触的第一材料层的界面中形成负电荷（31）。在第二材料层上形成通道增加层。

16. 发明公开

KR1020110122525A ＬＤＤ 영역을 갖는 고 전자 이동도 트랜지스터(ＨＥＭＴ) 및 그 제조방법 无效
标题翻译：具有轻型排水区域的高电子移动性晶体管及其制造方法
公开(公告)号：KR1020110122525A
公开(公告)日：2011-11-10
申请号：KR1020100042083
申请日：2010-05-04
申请人： 삼성전자주식회사
发明人： 황인준 , 신재광 , 오재준 , 김종섭 , 최혁순 , 홍기하
IPC分类号： H01L29/78 , H01L29/778
CPC分类号： H01L29/778 , H01L21/28008 , H01L29/1029 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L29/42364 , H01L29/66431 , H01L29/66462 , H01L29/7786 , H01L29/7787 , H01L29/78621
摘要： PURPOSE: A high electron mobility transistor with a LDD(Lightly Doped Drain) area and a manufacturing method thereof are provided to prevent the concentration of a 2DEG(2-Dimensional Electron Gas) channel from being drastically changed according to the etched thickness of a channel supplying layer by utilizing an etch buffer layer as an etch stopping layer for forming an LDD area on the 2DEG channel. CONSTITUTION: A buffer layer(12) is formed on a substrate(10). First and second material layers(30,32) are successively formed on the buffer layer. The second material layer and a third material layer(34) are successively formed on the first material layer. The 2DEG(2-Dimensional Electron Gas) of an LDD(Lightly Doped Drain) area(A1) becomes generated by the second material layer. A gate(36) is formed on the second material layer which corresponds to the LDD area.
摘要翻译：目的：提供具有LDD（轻掺杂漏极）面积的高电子迁移率晶体管及其制造方法，以防止2DEG（2维电子气体）通道的浓度根据通道的蚀刻厚度而急剧变化通过利用蚀刻缓冲层作为用于在2DEG通道上形成LDD区域的蚀刻停止层来提供层。构成：在衬底（10）上形成缓冲层（12）。第一和第二材料层（30,32）依次形成在缓冲层上。第二材料层和第三材料层（34）依次形成在第一材料层上。 LDD（轻掺杂漏极）区域（A1）的2DEG（二维电子气体）由第二材料层产生。在对应于LDD区域的第二材料层上形成栅极（36）。

17. 发明公开

KR1020110103740A 반도체 장치 有权
标题翻译：半导体器件
公开(公告)号：KR1020110103740A
公开(公告)日：2011-09-21
申请号：KR1020100022948
申请日：2010-03-15
申请人： 삼성전자주식회사
发明人： 김호정 , 신재광 , 오재준 , 김종섭 , 최혁순 , 황인준 , 홍기하
IPC分类号： H03K17/30 , H03K17/687
CPC分类号： H03K17/6871 , H02M1/08 , H02M3/158 , H02M3/337 , H02M2001/0074 , H03K2217/0081
摘要： 본 발명은 반도체 장치에 관한 것으로, 음의 문턱 전압(threshold voltage)을 가지는 스위칭 소자, 및 전원 단자와 접지 단자 사이에 연결되어, 스위칭 소자를 구동하기 위한 구동 전압을 제공하는 구동부를 포함하고, 스위칭 소자는, 접지 단자에서 공급되는 접지 전압보다 높은 가상 접지 전압을 가지는 가상 접지 노드(node)에 연결되어, 구동 전압과 가상 접지 전압의 차이가 상기 문턱 전압보다 큰 경우에 온(on)된다.
摘要翻译：本发明涉及一种半导体器件，连接在开关元件之间，并且一个电源端子与所述接地端子具有的声音的阈值电压（阈值电压），其包括一个驱动部分，其用于驱动所述开关元件提供驱动电压，所述开关元件连接到具有比待从接地端子供给的接地电压高的虚拟接地电压的虚拟接地节点（节点），并且驱动电压并且在虚拟接地（上），如果大于阈值电压更大的电压之间的差。

18. 发明公开

KR1020110051859A 이미지 센서 및 그 동작 방법 有权
标题翻译：图像传感器及其操作方法
公开(公告)号：KR1020110051859A
公开(公告)日：2011-05-18
申请号：KR1020090108660
申请日：2009-11-11
申请人： 삼성전자주식회사
发明人： 김호정 , 정우인 , 신재광 , 김선일 , 송이헌 , 김창정 , 전상훈
IPC分类号： H04N5/335
CPC分类号： H04N9/045 , H01L27/14643 , H04N5/3745
摘要： PURPOSE: An image sensor and a method of operating the same are provided to reduce the generation of a noise and improving the resolution of the image sensor. CONSTITUTION: An image sensor comprises a pixel array including a plurality of pixel(100), a light detector(PS) for creating a detection current which is determined by the energy of light incident, a reset part(102) for creating a reference current by activated based on a reset signal which resets one or more pixels, and a conversion part(103) for creating a sensing voltage and a reference voltage by converting the sensed current into voltage.
摘要翻译：目的：提供图像传感器及其操作方法以减少噪声的产生并提高图像传感器的分辨率。构成：图像传感器包括：像素阵列，包括多个像素（100），用于产生由入射光的能量确定的检测电流的光检测器（PS）;用于产生参考电流的复位部分（102）通过基于重置一个或多个像素的复位信号而被激活;以及转换部分（103），用于通过将感测的电流转换为电压来产生感测电压和参考电压。

19. 发明公开

KR1020110033747A 강유전체 메모리 소자 및 그 동작 방법 有权
标题翻译：电磁存储器件及其工作方法
公开(公告)号：KR1020110033747A
公开(公告)日：2011-03-31
申请号：KR1020090091360
申请日：2009-09-25
申请人： 삼성전자주식회사
发明人： 홍기하 , 김종섭 , 신재광
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： G11C11/22 , G11C11/223 , H01L21/28291 , H01L27/11597 , H01L27/1203 , H01L29/1606 , H01L29/78391
摘要： PURPOSE: Ferroelectric memory devices and an operating method of the same are provided to increase extensibility by forming a ferroelectric layer to reduce the interface between ferroelectric cells. CONSTITUTION: In a ferroelectric memory devices and an operating method of the same, a unit area includes a channel(20), a ferroelectric layer(30), and a gate electrode(40). The ferroelectric layer is interposed between the channel and the gate electrode. The channel is formed along a bit line direction. The gate electrode is formed along a word line direction. The channel and the gate electrode are crossed with each other at a plurality of areas.
摘要翻译：目的：提供铁电存储器件及其操作方法，以通过形成铁电层以减小铁电单元之间的界面来增加延展性。构成：在铁电存储器件及其操作方法中，单位区域包括沟道（20），铁电层（30）和栅电极（40）。铁电层介于通道和栅电极之间。通道沿着位线方向形成。栅电极沿着字线方向形成。通道和栅电极在多个区域彼此交叉。

20. 发明公开

KR1020110032845A 전력 전자소자 및 그 제조방법 无效
标题翻译：电力电子设备及其制造方法
公开(公告)号：KR1020110032845A
公开(公告)日：2011-03-30
申请号：KR1020090090561
申请日：2009-09-24
申请人： 삼성전자주식회사
发明人： 김종섭 , 홍기하 , 오재준 , 최혁순 , 황인준 , 신재광
IPC分类号： H01L29/778
CPC分类号： H01L29/207 , H01L29/2003 , H01L29/66462 , H01L29/7787
摘要： PURPOSE: A power electronic device and a method of manufacturing the same are provided to increase productivity by removing an additional material layer for making the certain area of 2DEG channel open and simplifying a process step. CONSTITUTION: In a power electronic device and a method of manufacturing the same, a lower semiconductor layer and upper semiconductor layer are successively laminated in a substrate(10). A gate(40), a source(50), and a drain(60) are separated on the semiconductor layer. A 2DEG channel is formed in the interface of the upper and lower semiconductor layers. The gate is located on the top side of the upper semiconductor layer. A buffer layer(15) is interposed between the substrate and the lower semiconductor layer.
摘要翻译：目的：提供一种电力电子设备及其制造方法，以通过去除用于使2DEG通道的特定区域打开并简化处理步骤的附加材料层来提高生产率。构成：在功率电子器件及其制造方法中，下半导体层和上半导体层依次层叠在基板（10）中。在半导体层上分离栅极（40），源极（50）和漏极（60）。在上半导体层和下半导体层的界面中形成2DEG沟道。栅极位于上半导体层的顶侧。在衬底和下半导体层之间插入缓冲层（15）。

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