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11. 发明授权

US07173939B2 STM mapping circuit and method 失效
标题翻译： STM映射电路及方法
公开(公告)号：US07173939B2
公开(公告)日：2007-02-06
申请号：US10106037
申请日：2002-03-27
申请人： Toru Takamichi
发明人： Toru Takamichi
IPC分类号： H04L12/56
CPC分类号： H04L49/25 , H04J3/1617 , H04L49/1507 , H04L49/254 , H04L49/3027
摘要： An STM mapping circuit is disclosed having a configuration that includes: a packet length detection circuit for generating byte effectiveness information that indicates whether byte data are effective data or not; routing circuits for generating routing information for rearranging byte data in a prescribed order while using byte effectiveness information to eliminate pad bytes; packet filter circuits for taking in packet data for each logical channel in accordance with channel number signals that indicate which logical channel the packet data belong to; M×M switches for sorting packet data for logical channel in a prescribed order while removing pad bytes in accordance with routing information; and packet memories that hold, for each logical channel, packet data that have been sorted by the M×M switches.
摘要翻译：公开了具有如下配置的STM映射电路：包括：用于生成指示字节数据是否为有效数据的字节有效性信息的分组长度检测电路; 路由电路，用于生成路由信息，用于以规定的顺序重新排列字节数据，同时使用字节有效性信息来消除填充字节; 分组滤波器电路，用于根据指示分组数据属于哪个逻辑信道的信道号信号接收每个逻辑信道的分组数据; MxM交换机用于按照规定的顺序对逻辑信道的分组数据进行排序，同时根据路由信息去除填充字节; 以及分组存储器，其针对每个逻辑信道保存由MxM交换机排序的分组数据。

12. 发明申请

US20060285599A1 Receiver for orthogonal frequency division multiplexing transmission 审中-公开
标题翻译：接收机用于正交频分复用传输
公开(公告)号：US20060285599A1
公开(公告)日：2006-12-21
申请号：US11392647
申请日：2006-03-30
申请人： Hiroyuki Seki , Daisuke Jitsukawa , Kotaro Shiizaki , Yoshikazu Kakura , Toru Takamichi , Kenji Koyanagi , Hiroyuki Kawai
发明人： Hiroyuki Seki , Daisuke Jitsukawa , Kotaro Shiizaki , Yoshikazu Kakura , Toru Takamichi , Kenji Koyanagi , Hiroyuki Kawai
IPC分类号： H04K1/10
CPC分类号： H04L27/2665 , H04L25/022 , H04L25/0232 , H04L27/2695
摘要： Channel estimation values of pilot symbols for channel compensation of data symbols in an OFDM receiver can be used, even in cases where FFT extract position differs for each frame. The OFDM receiver is characterized in having a circuit which calculates the amount of phase rotation that is generated by the difference in timing at which the individual symbols are extract as objects of a fast Fourier transform when the fast Fourier transform processing is performed by a fast Fourier transform circuit, and further a circuit which corrects the amount of phase rotation for the channel estimation value determined by a channel estimating circuit.
摘要翻译：可以使用OFDM接收机中的数据符号的信道补偿的导频符号的信道估计值，即使在每个帧的FFT提取位置不同的情况下也是如此。 OFDM接收机的特征在于具有一个电路，该电路计算当快速傅里叶变换处理通过快速傅立叶变换执行时，通过快速傅里叶变换的对象将提取各个符号的定时差产生的相位旋转量变换电路，以及校正由信道估计电路确定的信道估计值的相位旋转量的电路。

13. 发明授权

US06496513B1 Traffic priority control system for a concentration-type ATM switch 失效
标题翻译：集中型ATM交换机的流量优先控制系统
公开(公告)号：US06496513B1
公开(公告)日：2002-12-17
申请号：US09184568
申请日：1998-11-02
申请人： Toru Takamichi
发明人： Toru Takamichi
IPC分类号： H04J317
CPC分类号： H04L49/105 , H04L49/103 , H04L49/205 , H04L49/30 , H04L2012/5651
摘要： An ATM concentrator connects (m×n) input highways to n output highways and performs a full priority control. The ATM concentrator has output cell buffers for respective quality classes. Cells are read from the output buffers of the quality classes and the number of valid cells thereof is checked. A quality class c is determined with respect to which an accumulated value of the numbers of valid cells calculated successively from quality classes of higher priority is maximum within the total number of the output highways. The ATM concentrator outputs only cells of the highest priority class if the quality class c is the highest priority class. When the quality class c is not the highest priority class, the ATM concentrator writes valid cells of next priority class through the quality class c over cells that are not valid cells in the highest priority class.
摘要翻译： ATM集线器将（mxn）个输入高速公路连接到n个输出高速公路，并执行完全优先级控制。 ATM集中器具有用于相应质量等级的输出单元缓冲器。从质量等级的输出缓冲器读取单元，并检查其有效单元的数量。确定质量等级c，相对于在输出高速公路的总数中，从较高优先级的质量等级连续计算的有效小区的数量的累积值最大。如果质量等级c是最高优先级，ATM集中器只输出最高优先级的单元。当质量等级c不是最高优先级类别时，ATM集中器通过质量等级c在优先级最高的类别中的非有效单元的单元上写入下一优先级的有效单元。

14. 发明授权

US08792496B2 Multiplexing transmission system, multiplexing apparatus, demultiplexing apparatus and a multiplexing transmission system 有权
标题翻译：复用传输系统，复用装置，解复用装置和复用传输系统
公开(公告)号：US08792496B2
公开(公告)日：2014-07-29
申请号：US13260273
申请日：2010-03-26
申请人： Masahiro Shigihara , Toru Takamichi
发明人： Masahiro Shigihara , Toru Takamichi
IPC分类号： H04L12/56 , H04L12/54
CPC分类号： H04L12/5601 , H04J3/1682
摘要： A multiplexing apparatus stores fixed length data into which information signals supplied from channels are divided; determines an output channel by selecting the each channel cyclically; acquires the fixed length data from the output channel based on a channel multiplexing ratio number to store the fixed length data in a payload in turn; adds assignment information to the payload; and creates a multiplexing frame by using the payload to transmit to a transmission channel. A demultiplexing apparatus detects the assignment information from the payload of the multiplexing frame received to the transmission channel; creates distribution information for distributing the fixed length data to each channel based on the assignment information; detects the fixed length data from the payload to distribute the fixed length data to each channel based on the distribution information; and couples the fixed length data to reproduce the information signal.
摘要翻译：多路复用装置存储从信道提供的信息信号被划分成的固定长度数据; 通过循环选择每个通道来确定输出通道; 基于信道复用比率数字从输出信道获取固定长度数据，以依次将有效载荷中的固定长度数据存储; 将分配信息添加到有效载荷; 并通过使用有效载荷来发送到传输信道来创建多路复用帧。解复用装置从接收到传输信道的复用帧的有效载荷中检测分配信息; 创建分配信息，用于基于分配信息将固定长度数据分发到每个信道; 从有效载荷检测固定长度数据，根据分发信息将固定长度数据分配到各个信道; 并耦合固定长度数据以再现信息信号。

15. 发明授权

US5940368A Cell rate supervising system terminating congestion feedback loop 失效
标题翻译：信元速率监控系统终止拥塞反馈回路
公开(公告)号：US5940368A
公开(公告)日：1999-08-17
申请号：US813429
申请日：1997-03-10
申请人： Toru Takamichi , Satoshi Kamiya , Tutomu Murase
发明人： Toru Takamichi , Satoshi Kamiya , Tutomu Murase
IPC分类号： H04Q3/00 , H04L12/801 , H04L12/813 , H04L12/911 , H04Q11/04 , H04J3/22
CPC分类号： H04L12/5602 , H04L49/3081 , H04Q11/0478 , H04L2012/5635 , H04L2012/5636
摘要： In a cell rate supervising system for supervising a rate of cells flowing in a certain direction, a binary mode congestion feedback loop terminating unit terminates a first congestion feedback loop on a downstream side of that direction. The first congestion feedback loop receives a first congestion management cell from the downstream side and turns it in a binary mode to the downstream side. Also, an explicit rate (ER) mode congestion feedback loop terminating unit is provided on an upstream side of the binary mode congestion feedback loop terminating unit, and terminates a second congestion loop on an upstream side of the direction. The second congestion feedback loop receives a second congestion management cell from the upstream side and turns it in an ER mode to the upstream side. Further, a dynamic generic cell rate algorithm unit is provided on an upstream side of the ER mode congestion feedback loop terminating unit, and monitors the rate of cells in accordance with the second congestion management cell.
摘要翻译：在用于监视沿一定方向流动的小区速率的小区速率监控系统中，二进制模式拥塞反馈回路终端单元在该方向的下游侧终止第一拥塞反馈回路。第一拥塞反馈循环从下游侧接收第一拥塞管理单元，并将其以二进制模式转换到下游侧。此外，在二进制模式拥塞反馈环路终端单元的上游侧提供显式速率（ER）模式拥塞反馈环路终止单元，并且在该方向的上游侧终止第二拥塞环路。第二拥塞反馈循环从上游侧接收第二拥塞管理单元，并将其以ER模式转换到上游侧。此外，动态通用小区速率算法单元设置在ER模式拥塞反馈回路终端单元的上游侧，并根据第二拥塞管理小区监视小区的速率。

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