专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US09105353B2 Memory device and semiconductor device including the memory device 有权
标题翻译：存储器件和包括存储器件的半导体器件
公开(公告)号：US09105353B2
公开(公告)日：2015-08-11
申请号：US13473831
申请日：2012-05-17
申请人： Tatsuji Nishijima
发明人： Tatsuji Nishijima
IPC分类号： G11C7/00 , G11C11/412
CPC分类号： G11C11/412
摘要： A memory device includes a level shifter which includes a first input terminal, a second input terminal, a first output terminal configured to output a first signal, and a second output terminal configured to output an inverted signal of the first signal, a first buffer, a second buffer, a first node, and a second node. The first node, where an output terminal of the first buffer and the first input terminal of the level shifter are connected, is configured to hold a first data. The second node, where an output terminal of the second buffer and the second input terminal of the level shifter are connected, is configured to hold a second data.
摘要翻译：存储器件包括电平移位器，其包括第一输入端子，第二输入端子，被配置为输出第一信号的第一输出端子和被配置为输出第一信号的反相信号的第二输出端子，第一缓冲器，第二缓冲器，第一节点和第二节点。连接第一缓冲器的输出端子和电平移位器的第一输入端子的第一节点被配置为保持第一数据。连接第二缓冲器的输出端子和电平移位器的第二输入端子的第二节点被配置为保持第二数据。

12. 发明授权

US09092710B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09092710B2
公开(公告)日：2015-07-28
申请号：US13050249
申请日：2011-03-17
申请人： Tatsuji Nishijima
发明人： Tatsuji Nishijima
IPC分类号： H05K7/02 , H05K7/06 , H05K7/08 , H05K7/10 , G06K19/07
CPC分类号： G06K19/0723
摘要： A passive RF tag has an advantage of being compact and lightweight. However, the driving power is limited. In order to increase the maximum communication distance and the number of objects simultaneously identified, power consumption should be efficient and reduced. The semiconductor device includes an antenna circuit, a modulation circuit electrically connected to the antenna circuit, a filter circuit electrically connected to the modulation circuit, and a logic circuit electrically connected to the filter circuit, in which the modulation circuit includes a first resistor and a transistor, the filter circuit includes a capacitor, one terminal of the first resistor is electrically connected to one of a source and a drain of the transistor, the other terminal of the first resistor is electrically connected to the antenna circuit, and a gate of the transistor is electrically connected to one terminal of the capacitor and the logic circuit.
摘要翻译：无源RF标签具有紧凑和轻便的优点。但是，驱动力是有限的。为了增加最大通信距离和同时识别的物体数量，功耗应该有效降低。半导体器件包括天线电路，电连接到天线电路的调制电路，电连接到调制电路的滤波电路，以及电连接到滤波电路的逻辑电路，其中调制电路包括第一电阻器和晶体管，滤波器电路包括电容器，第一电阻器的一个端子电连接到晶体管的源极和漏极之一，第一电阻器的另一个端子电连接到天线电路，并且栅极晶体管电连接到电容器和逻辑电路的一个端子。

13. 发明授权

US08824194B2 Semiconductor device and method for driving the same 有权
标题翻译：半导体装置及其驱动方法
公开(公告)号：US08824194B2
公开(公告)日：2014-09-02
申请号：US13472741
申请日：2012-05-16
申请人： Hidetomo Kobayashi , Yutaka Shionoiri , Tatsuji Nishijima
发明人： Hidetomo Kobayashi , Yutaka Shionoiri , Tatsuji Nishijima
IPC分类号： G11C11/24
CPC分类号： H01L27/1225 , G06F9/3804 , G06F9/3814 , G11C11/404 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1156 , H01L27/1255
摘要： In a semiconductor device performing pipeline processing with the use of a reading portion reading an instruction and an arithmetic portion performing an operation in accordance with the instruction, the instruction held in the reading portion is transmitted from the flip-flop to the memory when branch prediction turns out to be wrong. Note that the arithmetic portion controls transmission and reception of the instruction between the flip-flop and the memory which are included in the reading portion. This enables elimination of redundant operations in the reading portion in the case where an instruction read by the reading portion after the branch prediction turns out to be wrong is a subroutine, or the like. That is, the instruction held in the memory is transmitted back to the flip-flop without rereading of the same instruction by the reading portion, whereby the instruction can be output to the arithmetic portion.
摘要翻译：在利用读取指令的读取部分执行流水线处理的半导体器件和执行根据该指令的操作的算术部分中，当分支预测时，保持在读取部分中的指令从触发器发送到存储器原来是错的。注意，算术部分控制包括在读取部分中的触发器和存储器之间的指令的发送和接收。在分支预测结果为错误的读取部读出的指示是子程序等的情况下，能够消除读取部中的冗余动作。也就是说，保持在存储器中的指令被发送回到触发器，而不用读取部分重新读取相同的指令，从而可以将该指令输出到算术部分。

14. 发明授权

US08816722B2 Current detection circuit 有权
标题翻译：电流检测电路
公开(公告)号：US08816722B2
公开(公告)日：2014-08-26
申请号：US13222232
申请日：2011-08-31
申请人： Tatsuji Nishijima
发明人： Tatsuji Nishijima
IPC分类号： H03D1/00 , G01R19/00
CPC分类号： G01R19/0092
摘要： An object is to widen detection range of current. A current detection circuit includes a first resistor, which is connected to a first connection terminal and a second connection terminal; a second resistor, which is connected to the first resistor; a third resistor, which is connected to the first resistor; a first transistor, a source of which is connected to the second resistor; a second transistor, a source of which is connected to the third resistor, and a drain and a gate of which is connected to a gate of the first transistor; a third transistor, a source of which is connected to the source of the second transistor, and a gate of which is connected to the drain of the first transistor; and a fourth resistor, which is connected to the drain of the third transistor, and to which a voltage is input.
摘要翻译：目的是扩大电流的检测范围。电流检测电路包括连接到第一连接端子和第二连接端子的第一电阻器; 第二电阻器，其连接到第一电阻器; 连接到第一电阻器的第三电阻器; 第一晶体管，其源极连接到第二电阻器; 第二晶体管，其源极连接到第三电阻器，漏极和栅极连接到第一晶体管的栅极; 第三晶体管，其源极连接到第二晶体管的源极，其栅极连接到第一晶体管的漏极; 以及第四电阻器，其连接到第三晶体管的漏极，并且输入电压。

15. 发明授权

US08674738B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08674738B2
公开(公告)日：2014-03-18
申请号：US13473807
申请日：2012-05-17
申请人： Tatsuji Nishijima
发明人： Tatsuji Nishijima
IPC分类号： H03K3/356
CPC分类号： H03K19/0175 , G11C19/28 , H03K19/018507
摘要： An object of one embodiment of the present invention to provide a latch circuit includes a level shifter and a buffer in which transistors each including a channel region formed in an oxide semiconductor film are connected in series. Thus, data can be held in the latch circuit even when power is not supplied.
摘要翻译：本发明的一个实施例的目的在于提供一种锁存电路，包括电平移位器和缓冲器，其中包括形成在氧化物半导体膜中的沟道区域的晶体管串联连接。因此，即使没有供电也可以将数据保存在锁存电路中。

16. 发明授权

US08340457B2 Image analysis method, image analysis program and pixel evaluation system having the sames 有权
标题翻译：图像分析方法，图像分析程序和具有sames的像素评估系统
公开(公告)号：US08340457B2
公开(公告)日：2012-12-25
申请号：US13162602
申请日：2011-06-17
申请人： Masahiko Hayakawa , Tatsuji Nishijima
发明人： Masahiko Hayakawa , Tatsuji Nishijima
IPC分类号： G06K9/42
CPC分类号： G09G3/006 , G02F1/1309 , G09G2360/147
摘要： The present invention provides an image analysis method and an image analysis program having a feature of carrying out a panel display quality evaluation at low cost and short time with relieved influence of moire by treating a value, which is obtained by recognizing a coordinate of a panel pixel in a shot image based on an image for detecting a coordinate and positional information thereof with high accuracy and by calculating average luminance by panel pixel unit based on a center position of a coordinate, as representative luminance in each pixel of the panel, in a panel evaluation method of shooting an image display panel with a digital camera.
摘要翻译：本发明提供一种图像分析方法和图像分析程序，其具有以低成本和短时间进行面板显示质量评估的特征，并且通过处理通过识别面板的坐标获得的值，可以减轻莫尔条纹的影响基于用于以高精度检测坐标的图像和位置信息的拍摄图像中的像素，并且通过基于坐标的中心位置的面板像素单位计算作为面板的每个像素中的代表性亮度的平均亮度用数码相机拍摄图像显示面板的面板评估方法。

17. 发明申请

US20120293231A1 Semiconductor Device 有权
标题翻译：半导体器件
公开(公告)号：US20120293231A1
公开(公告)日：2012-11-22
申请号：US13473807
申请日：2012-05-17
申请人： Tatsuji Nishijima
发明人： Tatsuji Nishijima
IPC分类号： H03L5/00
CPC分类号： H03K19/0175 , G11C19/28 , H03K19/018507
摘要： An object of one embodiment of the present invention to provide a latch circuit includes a level shifter and a buffer in which transistors each including a channel region formed in an oxide semiconductor film are connected in series. Thus, data can be held in the latch circuit even when power is not supplied.
摘要翻译：本发明的一个实施例的目的在于提供一种锁存电路，包括电平移位器和缓冲器，其中包括形成在氧化物半导体膜中的沟道区的晶体管串联连接。因此，即使没有供电也可以将数据保存在锁存电路中。

18. 发明申请

US20120293206A1 PROGRAMMABLE LOGIC DEVICE 有权
标题翻译：可编程逻辑器件
公开(公告)号：US20120293206A1
公开(公告)日：2012-11-22
申请号：US13463084
申请日：2012-05-03
申请人： Seiichi YONEDA , Tatsuji NISHIJIMA
发明人： Seiichi YONEDA , Tatsuji NISHIJIMA
IPC分类号： H03K19/00
CPC分类号： H03K19/0013 , H01L27/1225 , H01L27/124 , H01L29/7869 , H03K19/0008 , H03K19/17736 , H03K19/17744
摘要： An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.
摘要翻译：目的是提供一种具有通过可编程开关彼此连接的逻辑块的可编程逻辑器件，其中可编程开关的特征在于结合在其中的氧化物半导体晶体管。氧化物半导体晶体管的非常低的截止电流由于其保持与氧化物半导体晶体管连接的晶体管的栅极的电位的高能力而提供作为非易失性存储器的功能。氧化物半导体晶体管用作非易失性存储器的能力允许用于控制逻辑块的连接的配置数据即使在没有电源电位的情况下也被维持。因此，可以省略在设备启动时的配置数据的重写处理，这有助于降低设备的功耗。

19. 发明申请

US20120274355A1 PROGRAMMABLE LOGIC DEVICE 有权
标题翻译：可编程逻辑器件
公开(公告)号：US20120274355A1
公开(公告)日：2012-11-01
申请号：US13453147
申请日：2012-04-23
申请人： Tatsuji NISHIJIMA
发明人： Tatsuji NISHIJIMA
IPC分类号： H03K19/177 , H03K19/0948 , H03K19/094
CPC分类号： H01L27/11803 , H03K19/17728 , H03K19/1776 , H03K19/17772
摘要： An object of the present invention is to provide a programmable logic device which has short start-up time after supply of power is stopped, is highly integrated, and operates with low power. In a programmable logic device including an input/output block, a plurality of logic blocks each including a logic element, and a wiring connecting the plurality of logic blocks, the logic element has a configuration memory for holding configuration data and a look-up table including a selection circuit. The configuration memory includes a plurality of memory elements each of which includes a transistor whose channel region is in an oxide semiconductor film and an arithmetic circuit provided between the transistor and the selection circuit. Configuration data is selectively changed and output by the selection circuit in accordance with an input signal.
摘要翻译：本发明的目的是提供一种可编程逻辑器件，其在供电停止，高度集成并且以低功率运行后具有短的启动时间。在包括输入/输出块，包括逻辑元件的多个逻辑块和连接多个逻辑块的布线的可编程逻辑器件中，逻辑元件具有用于保存配置数据和查找表的配置存储器包括选择电路。配置存储器包括多个存储元件，每个存储元件包括沟道区域在氧化物半导体膜中的晶体管和设置在晶体管和选择电路之间的运算电路。配置数据根据输入信号由选择电路选择性地改变和输出。

20. 发明申请

US20120268164A1 PROGRAMMABLE LSI 有权
标题翻译：可编程LSI
公开(公告)号：US20120268164A1
公开(公告)日：2012-10-25
申请号：US13437961
申请日：2012-04-03
申请人： Hidetomo KOBAYASHI , Masami ENDO , Yutaka SHIONOIRI , Hiroki DEMBO , Tatsuji NISHIJIMA , Kazuaki OHSHIMA , Seiichi YONEDA , Jun KOYAMA
发明人： Hidetomo KOBAYASHI , Masami ENDO , Yutaka SHIONOIRI , Hiroki DEMBO , Tatsuji NISHIJIMA , Kazuaki OHSHIMA , Seiichi YONEDA , Jun KOYAMA
IPC分类号： H03K19/094
CPC分类号： H03K19/17796 , G11C16/0433 , H01L27/11803 , H01L27/1203
摘要： A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.
摘要翻译：提供了可以执行动态配置的低功耗可编程LSI。可编程LSI包括多个逻辑元件。多个逻辑元件各自包括配置存储器。多个逻辑元件中的每一个执行不同的运算处理，并且根据存储在配置存储器中的配置数据改变逻辑元件之间的电连接。配置存储器包括一组易失性存储电路和非易失性存储电路。非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管和一对电极中的一个电极与晶体管截止时被设置为浮置状态的节点电连接的电容器。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式