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11. 发明申请

US20080068246A1 A/D converter 失效
标题翻译： A / D转换器
公开(公告)号：US20080068246A1
公开(公告)日：2008-03-20
申请号：US11898644
申请日：2007-09-13
申请人： Taiji Akizuki , Tomoaki Maeda , Hisashi Adachi
发明人： Taiji Akizuki , Tomoaki Maeda , Hisashi Adachi
IPC分类号： H03M1/12
CPC分类号： H03M1/0854 , H03M1/362
摘要： An A/D converter includes a first switched capacitor block that charges and holds charges by connecting each of a first group of capacitors to a single basic reference voltage at a first timing, and discharges each of the charges held by the first group of capacitors at a second timing, a second switched capacitor block that charges and holds each of the charges discharged by the first group of capacitors respectively in the second group of capacitors at the second timing, and converts each of the charges held by the second group of capacitors to a voltage and outputs the voltages at the first timing, and a quantizer that quantizes an analog input signal using the plurality of voltages output from the second switched capacitor block as reference voltages for each level. A plurality of reference voltages is generated from a single basic reference voltage, based on different amounts of charges held in the plurality of capacitors. A high SNR is obtained by supplying the reference voltages of a quantizer in a multi-bit A/D converter with high accuracy, and low power consumption operation is possible with simplified circuitry.
摘要翻译： A / D转换器包括第一开关电容器块，其通过在第一定时将第一组电容器连接到单个基准参考电压来充电并保持电荷，并且将由第一组电容器保持的每个电荷放电第二定时，第二开关电容器块，其在第二定时将第一组电容器中的第一组电容器分别充电并保持每个电荷，并将由第二组电容器保持的每个电荷转换为电压并在第一定时输出电压;以及量化器，其使用从第二开关电容器块输出的多个电压量化模拟输入信号作为每个电平的参考电压。基于保持在多个电容器中的不同电荷量，从单个基准参考电压产生多个参考电压。通过在多位A / D转换器中提供高精度的量化器的参考电压来获得高信噪比，并且通过简化的电路可以实现低功耗操作。

12. 发明申请

US20060264186A1 Transmitter 有权
公开(公告)号：US20060264186A1
公开(公告)日：2006-11-23
申请号：US11434752
申请日：2006-05-17
申请人： Taiji Akizuki , Mitsuru Tanabe
发明人： Taiji Akizuki , Mitsuru Tanabe
IPC分类号： H04B1/02 , H03C1/52
CPC分类号： H03C5/00 , H03F1/02 , H03F1/0222 , H03F3/24 , H04B2001/045
摘要： A transmitter according to the present invention is a transmitter conforming to the EER method, wherein a modulated signal is separated into phase and amplitude components, and the components are input to the high-frequency input terminal and the power supply voltage terminals of a high-frequency power amplifier. This transmitter comprises an amplitude delay corrector and a phase delay corrector capable of correcting delay time so that the phase and amplitude components are optimally synthesized using two or more stages of saturation-type amplifiers constituting the high-frequency power amplifier. With this configuration, a synthesis error can be reduced in each stage of the saturation-type amplifier, and distortion components in the output waveform can be reduced.

13. 发明申请

US20060111057A1 Transmitter 有权
标题翻译：发射机
公开(公告)号：US20060111057A1
公开(公告)日：2006-05-25
申请号：US11282597
申请日：2005-11-21
申请人： Taiji Akizuki , Mitsuru Tanabe
发明人： Taiji Akizuki , Mitsuru Tanabe
IPC分类号： H04B1/02 , H01Q11/12
CPC分类号： H03G3/3042 , H03C5/00 , H04L27/2626
摘要： In a transmitter of the present invention, a modulated signal is separated into an amplitude component and a phase component which are inputted to a radio-frequency modulated signal input terminal and a supply voltage terminal of a radio-frequency power amplifier. A voltage adjustment circuit is provided between an output terminal of the radio-frequency power amplifier and an amplitude amplification circuit having a feedback circuit. The voltage adjustment circuit changes the amount of isolation in accordance with the voltage level of the amplitude component. By this, the amplitude component of the radio-frequency modulated wave attenuates the level inputted to the feedback circuit of the amplitude amplification circuit through the supply voltage terminal of the radio-frequency power amplifier.
摘要翻译：在本发明的发送机中，将调制信号分离为输入到射频功率放大器的射频调制信号输入端子和电源电压端子的振幅分量和相位分量。在高频功率放大器的输出端子和具有反馈电路的振幅放大电路之间设置电压调节电路。电压调节电路根据振幅分量的电压电平来改变隔离度。由此，射频调制波的幅度分量通过射频功率放大器的电源电压衰减输入到幅度放大电路的反馈电路的电平。

14. 发明授权

US08836564B2 A/D conversion device 有权
标题翻译： A / D转换装置
公开(公告)号：US08836564B2
公开(公告)日：2014-09-16
申请号：US13814205
申请日：2012-03-21
申请人： Taiji Akizuki , Suguru Fujita
发明人： Taiji Akizuki , Suguru Fujita
IPC分类号： H03M1/12 , H03M1/20
CPC分类号： H03M1/20 , H03M1/201
摘要： An A/D conversion device generates a control clock signal having a cycle that is an integral multiple of a cycle of a reference clock signal. A shift voltage is generated which varies every cycle of the reference clock signal while the cycle of the control clock signal is taken as one cycle. An analog signal is offset by the shift voltage. The offset analog signal is converted to a digital signal every cycle of the reference clock signal. Outputs from the A/D converter are averaged every cycle of the control clock signal.
摘要翻译： A / D转换装置产生具有作为参考时钟信号的周期的整数倍的周期的控制时钟信号。产生一个转换电压，当控制时钟信号的周期作为一个周期时，基准时钟信号的每个周期都会改变。模拟信号被移位电压偏移。偏移模拟信号在参考时钟信号的每个周期被转换成数字信号。来自A / D转换器的输出在控制时钟信号的每个周期进行平均。

15. 发明授权

US07855668B2 Delta sigma A/D modulator 有权
标题翻译： Δ西格玛A / D调制器
公开(公告)号：US07855668B2
公开(公告)日：2010-12-21
申请号：US12550368
申请日：2009-08-29
申请人： Taiji Akizuki , Masahiko Sagisaka , Hisashi Adachi
发明人： Taiji Akizuki , Masahiko Sagisaka , Hisashi Adachi
IPC分类号： H03M3/00
CPC分类号： H03M3/356 , H03M3/424
摘要： A multibit quantizer is provided, at its input terminals, with a variable gain circuit and an offset addition circuit to perform tracking control in which for each sampling time, the level of an offset signal of the offset addition circuit is adjusted based on output digital data of an output processing circuit and the preceding control signal of an offset control circuit so that the quantizer operates without causing a saturation operation. As a result, the output digital data, in which the number of bits is greater than the number of bits of the quantizer by the offset value controlled by the offset addition circuit, is outputted from the output processing circuit for each sampling time.
摘要翻译：在其输入端提供多位量化器，其具有可变增益电路和偏移加法电路，以执行跟踪控制，其中对于每个采样时间，基于输出数字数据来调整偏移加法电路的偏移信号的电平的输出处理电路和偏移控制电路的先前控制信号，使得量化器在不引起饱和操作的情况下操作。结果，对于每个采样时间，从输出处理电路输出比特数大于量化器的比特数的偏移加法电路控制的偏移值的输出数字数据。

16. 发明授权

US07777663B2 Discrete time amplifier circuit and analong-digital converter 有权
标题翻译：离散时间放大器电路和分频数字转换器
公开(公告)号：US07777663B2
公开(公告)日：2010-08-17
申请号：US12261704
申请日：2008-10-30
申请人： Taiji Akizuki , Tomoaki Maeda , Hisashi Adachi
发明人： Taiji Akizuki , Tomoaki Maeda , Hisashi Adachi
IPC分类号： H03M1/12
CPC分类号： H03F3/45475 , H03F3/45183 , H03F3/45946 , H03F2200/411 , H03F2203/45136 , H03F2203/45166 , H03F2203/45421 , H03F2203/45424 , H03F2203/45512 , H03F2203/45551 , H03F2203/45634 , H03M1/1245
摘要： The present invention is intended to attain simplified circuit configuration and low current consumption in a discrete time amplifier circuit and an AD converter, to improve the convergence from the transient response state to the steady state of the amplifier circuit and to reduce noise and distortion owing to the variation in the output common-mode voltage. The discrete time amplifier circuit and the AD converter are provided with a switched-capacitor common-mode feedback (CMFB) circuit capable of detecting and feeding back the output common-mode voltage at every sampling timing in the case that the circuit operates at double sampling timing (every ½ cycle).
摘要翻译：本发明旨在在离散时间放大器电路和AD转换器中实现简化的电路配置和低电流消耗，以改善从瞬态响应状态到放大器电路的稳定状态的收敛，并且由于输出共模电压的变化。离散时间放大器电路和AD转换器配备有开关电容共模反馈（CMFB）电路，其能够在电路以双倍采样的情况下在每个采样定时检测和反馈输出共模电压时间（每½周期）。

17. 发明申请

US20080074302A1 Delta-sigma AD converter 失效
标题翻译： Delta-sigma AD转换器
公开(公告)号：US20080074302A1
公开(公告)日：2008-03-27
申请号：US11898645
申请日：2007-09-13
申请人： Taiji Akizuki , Tomoaki Maeda , Hisashi Adachi
发明人： Taiji Akizuki , Tomoaki Maeda , Hisashi Adachi
IPC分类号： H03M1/00
CPC分类号： H03M3/47
摘要： The output of a first integrator is quantized in a quantizer. The quantized signal is subjected to D/A conversion, successively output to a plurality of output paths by a first switching circuit, sampled and held by a plurality of charge-holding circuits of a first feedback circuit, and successively output by a second switching circuit to one of the input terminals of a subtractor. On the other hand, the output signal of the first integrator is successively output by a third switching circuit to a plurality of output paths, sampled and held by a plurality of charge-holding circuits of a second feedback circuit, and successively input to the other input terminal of the subtractor by a fourth switching circuit along with signals held in an input portion, which samples and holds input analog signals. By doing so, a plurality of signals with different sampling timings are integrated accumulatively by the subtractor and the first integrator. When integration functions used to obtain an n-th order noise-shaping effect are multiplexed and operated using a single integrator, the integrator's current consumption can be suppressed.
摘要翻译：在量化器中量化第一积分器的输出。量化信号进行D / A转换，由第一反馈电路的多个电荷保持电路采样和保持的第一开关电路连续地输出到多个输出路径，并由第二开关电路到减法器的输入端之一。另一方面，第一积分器的输出信号由第三开关电路连续地输出到由第二反馈电路的多个电荷保持电路采样和保持的多个输出路径，并连续输入到另一个第四开关电路的减法器的输入端以及保持在输入部分中的信号，其中采样并保持输入的模拟信号。通过这样做，具有不同采样定时的多个信号由减法器和第一积分器累积地积分。当使用用于获得n阶噪声整形效果的积分功能使用单个积分器进行复用和操作时，可以抑制积分器的电流消耗。

18. 发明申请

US20060220590A1 Operational amplifier, and amplitude modulator and transmitter using the same 审中-公开
标题翻译：运算放大器，幅度调制器和发射机使用相同
公开(公告)号：US20060220590A1
公开(公告)日：2006-10-05
申请号：US11392852
申请日：2006-03-30
申请人： Mitsuru Tanabe , Taiji Akizuki , Koichiro Tanaka , Takuo Hino
发明人： Mitsuru Tanabe , Taiji Akizuki , Koichiro Tanaka , Takuo Hino
IPC分类号： H05B37/02
CPC分类号： H04L27/361 , H03C3/40 , H03F1/0205 , H03F1/0216 , H03F1/0227 , H03F1/0244 , H03F1/32 , H03F1/3211 , H03F3/24 , H03F3/45085 , H03F3/45475 , H03F2200/324 , H03F2200/336 , H03F2200/504 , H03F2200/507 , H03F2200/511
摘要： The operational amplifier outputs a signal for switching a switch circuit from a drive circuit according to signal amplitude information inputted from a signal source to thereby switch a plurality of supply voltages of a power amplification circuit arranged in an output portion. As a result of this, needed minimum DC power required for linear amplification for the voltage amplitude to be outputted can be provided to the power amplification circuit, allowing the operational amplifier to achieve an improvement in efficiency.
摘要翻译：运算放大器输出用于根据从信号源输入的信号幅度信息从驱动电路切换开关电路的信号，从而切换布置在输出部分中的功率放大电路的多个电源电压。作为其结果，可以向功率放大电路提供要输出的电压幅度的线性放大所需的所需的最小DC功率，从而允许运算放大器实现效率的提高。

19. 发明授权

US07116947B2 Transmitter 失效
标题翻译：发射机
公开(公告)号：US07116947B2
公开(公告)日：2006-10-03
申请号：US11085459
申请日：2005-03-22
申请人： Mitsuru Tanabe , Taiji Akizuki , Koichiro Tanaka
发明人： Mitsuru Tanabe , Taiji Akizuki , Koichiro Tanaka
IPC分类号： H04B1/02 , H04B1/04 , H01Q11/12
CPC分类号： H03F1/0211 , H03F1/02 , H03F1/0227 , H03F1/0277 , H03F1/32 , H03F3/24 , H03F2200/511 , H04B2001/045
摘要： An amplitude component and a phase component of a modulated signal are inputted into a power supply terminal and an input terminal of an RF power amplifier, respectively, and a modulated wave that is produced by demodulating an original modulated signal is obtained from the RF power amplifier. A supply voltage is supplied to an emitter follower and an operational amplifier via a switch group from a DC-DC converter group whose output voltages are sequentially different. As the supply voltage, any pair of outputs of DC-DC converters by the switch group is selected according to levels of the amplitude component, and provides them to the emitter follower and the operational amplifier. The emitter follower performs a DC conversion of the provided supply voltage to provide it to the RF power amplifier.
摘要翻译：调制信号的幅度分量和相位分量分别输入到RF功率放大器的电源端子和输入端子，并且从RF功率放大器获得通过解调原始调制信号产生的调制波。电源电压经由输出电压依次不同的DC-DC转换器组经由开关组提供给发射极跟随器和运算放大器。作为电源电压，根据振幅分量的电平选择开关组的DC-DC转换器的任何一对输出，并将其提供给射极跟随器和运算放大器。射极跟随器对所提供的电源电压进行DC转换，以将其提供给RF功率放大器。

20. 发明申请

US20140125126A1 POWER DISTRIBUTION CIRCUIT 有权
标题翻译：电源分配电路
公开(公告)号：US20140125126A1
公开(公告)日：2014-05-08
申请号：US14125438
申请日：2012-07-17
申请人： Taiji Akizuki , Junji Sato
发明人： Taiji Akizuki , Junji Sato
IPC分类号： H02J3/00
CPC分类号： H02J3/00 , H01P5/12 , H03F3/211 , H03F3/45085 , H03F3/45183 , H03F2200/06 , H03F2200/192 , H03F2200/204 , H03F2200/411 , H03F2200/534 , H03F2200/537 , H03F2200/541 , H03F2203/45644 , H03F2203/45702 , H03F2203/45731 , H03H7/09 , H03H7/42 , Y10T307/305
摘要： A transformer (2A) outputs differential signals of a positive phase signal (Vout2Ap) having phase θ1+90° and a negative phase signal (Vout2An) having phase θ1−90°. A transformer (2B) outputs differential signals of a positive phase signal (Vout2Bp) having phase θ2+90° and a negative phase signal (Vout2Bn) having phase θ2−90°. An adding circuit (3) composes a pair of differential output signals, as signals corrected in phase error (θ1−θ2) generated in the transformers (2A, 2B), in a manner of summing up vectors of two pairs of the differential signals outputted from the transformers (2A, 2B) for the positive phase signal and the negative phase signal, respectively.
摘要翻译：变压器（2A）输出具有相位和等于1 + 90°的正相信号（Vout2Ap）的差分信号和具有相位和相位的负相位信号（Vout2An）; 1-90°。变压器（2B）输出具有相位和等于2 + 90°的正相信号（Vout2Bp）和具有相位的负相位信号（Vout2Bn）的差分信号; 2-90°。加法电路（3）构成一对差分输出信号，作为在变压器（2A，2B）中产生的以相位误差（＆amp; n; 1; thetas; 2）校正的信号，以两对分别从变压器（2A，2B）输出的正相信号和负相位信号的差分信号。

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