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11. 发明申请

US20080064359A1 AMPLIFIER, FILTER USING THE SAME, AND RADIO COMMUNICATION DEVICE 失效
标题翻译：放大器，使用其的滤波器和无线电通信设备
公开(公告)号：US20080064359A1
公开(公告)日：2008-03-13
申请号：US11928766
申请日：2007-10-30
申请人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
发明人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
IPC分类号： H04Q7/20 , H03F3/45 , H03K9/00 , H04B1/02 , H04B1/10 , H04L27/00
CPC分类号： H03F3/193 , H03F3/45085 , H03F3/45183 , H03F2203/45352
摘要： An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.
摘要翻译：放大器包括放大单元，其放大第一和第二输入信号之间的第一差值，第二和第三输入信号之间的第二差值以及第三和第一输入信号之间的差分模式增益的第三差值，并放大第一和第二输入信号的平均值通过共模增益输出第二和第三输入信号，用于输出对应于放大的第一差和放大的平均的和的第一输出信号，对应于放大的第二差和放大的平均之和的第二输出信号，以及对应于放大的第三差和放大的平均值之和的第三输出信号; 第一秒; 以及减小电路，其减小小于差分模式增益的共模增益。

12. 发明授权

US07778358B2 Receiver, wireless device and method for cancelling a DC offset component 失效
标题翻译：接收机，无线设备和消除DC偏移分量的方法
公开(公告)号：US07778358B2
公开(公告)日：2010-08-17
申请号：US11851851
申请日：2007-09-07
申请人： Hidenori Okuni , Rui Ito , Hiroshi Yoshida
发明人： Hidenori Okuni , Rui Ito , Hiroshi Yoshida
IPC分类号： H04L25/06 , H04L25/10
CPC分类号： H04L25/06
摘要： A receiver includes a memory for storing DC offset amounts generated by an analog circuit; an amplifier; a DC offset amount generator for generating a first offset value and a second offset value to be removed from the received signal amplified at the amplifier; a first DC offset component-removing unit for removing the first DC offset value from the received signal before the amplifier; a second DC offset component-removing unit for removing the second DC offset value from the received signal after the amplifier; and an updating unit for updating the DC offset amount stored in the memory in view of the second DC offset value generated by the DC offset amount generator. A maximum value of the second DC offset value is set larger than a multiplication value of a gain of the amplifier by a minimum resolution value of the first DC offset value.
摘要翻译：接收机包括用于存储由模拟电路产生的DC偏移量的存储器; 放大器 DC偏移量发生器，用于产生从放大器放大的接收信号中去除的第一偏移值和第二偏移值; 第一DC偏移分量去除单元，用于从放大器之前的接收信号中去除第一DC偏移值; 第二DC偏移分量去除单元，用于从放大器之后的接收信号中去除第二DC偏移值; 以及更新单元，用于根据由DC偏移量产生器生成的第二DC偏移值来更新存储在存储器中的DC偏移量。将第二DC偏移值的最大值设定为大于放大器的增益乘以第一DC偏移值的最小分辨率值。

13. 发明授权

US07583948B2 Time constant automatic adjusting circuit, filter circuit system, and method of automatically adjusting time constant 失效
标题翻译：时间常数自动调节电路，滤波电路系统及自动调整时间常数的方法
公开(公告)号：US07583948B2
公开(公告)日：2009-09-01
申请号：US11411939
申请日：2006-04-27
申请人： Osamu Watanabe , Rui Ito , Shigehito Saigusa , Tetsuro Itakura
发明人： Osamu Watanabe , Rui Ito , Shigehito Saigusa , Tetsuro Itakura
IPC分类号： H04B1/00
CPC分类号： H03H11/1291
摘要： A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and outputting a predetermined voltage when the phase of the output signal and the phase of the clock signal are the same; at least three comparators comparing the output voltage with a plurality of different voltages; an up-down counter counting a number of output bits of either one of the at least three different voltages in accordance with an output result of the comparators; and a control circuit varying the time constant of the filter circuit in accordance with the number of output bits counted by the up-down counter.
摘要翻译：时间常数自动调整电路包括：滤波器电路，改变输入时钟信号的相位以输出时钟信号; 相位比较电路，将滤波器电路的输出信号的相位与时钟信号的相位进行比较，并且当输出信号的相位和时钟信号的相位相同时输出预定电压; 至少三个比较器将输出电压与多个不同电压进行比较; 根据比较器的输出结果，计数至少三个不同电压中的任何一个的输出位的数量的递减计数器; 以及控制电路根据由升降计数器计数的输出位数来改变滤波电路的时间常数。

14. 发明申请

US20080274714A1 AMPLIFIER, FILTER USING THE SAME, AND RADIO COMMUNICATION DEVICE 审中-公开
公开(公告)号：US20080274714A1
公开(公告)日：2008-11-06
申请号：US12170989
申请日：2008-07-10
申请人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
发明人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
IPC分类号： H04B1/16 , H03F3/45 , H03B1/00
CPC分类号： H03F3/193 , H03F3/45085 , H03F3/45183 , H03F2203/45352
摘要： An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.

15. 发明申请

US20080233906A1 FREQUENCY CONVERTER, RADIO RECEIVER 审中-公开
标题翻译：频率转换器，无线接收器
公开(公告)号：US20080233906A1
公开(公告)日：2008-09-25
申请号：US11926925
申请日：2007-10-29
申请人： Toshiya Mitomo , Rui Ito , Asuka Maki
发明人： Toshiya Mitomo , Rui Ito , Asuka Maki
IPC分类号： H03D7/16 , H03B19/00
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/165
摘要： Disclosed is a frequency converter including: a passive type analog multiplier configured to output a multiplication result in a current; a buffer outputting a buffering current by buffering the current of the multiplication result; and a current-voltage converter current-voltage converting the buffering current. Alternately, disclosed is a frequency converter including: a passive type analog multiplier configured to output a multiplication result in a current; a buffer outputting a buffering current by buffering the current of the multiplication result; and an integrator integrating the buffering current to output a voltage.
摘要翻译：公开了一种变频器，包括：被动型模拟乘法器，被配置为输出电流中的相乘结果; 通过缓冲乘法结果的电流来输出缓冲电流的缓冲器; 和电流 - 电压转换器电流 - 电压转换缓冲电流。或者，公开了一种变频器，包括：被动型模拟乘法器，被配置为输出电流中的相乘结果; 通过缓冲乘法结果的电流来输出缓冲电流的缓冲器; 以及积分器，其积分缓冲电流以输出电压。

16. 发明申请

US20080181334A1 RECEIVER, WIRELESS DEVICE AND METHOD FOR CANCELLING A DC OFFSET COMPONENT 失效
标题翻译：接收器，无线设备和用于取消直流偏移分量的方法
公开(公告)号：US20080181334A1
公开(公告)日：2008-07-31
申请号：US11851680
申请日：2007-09-07
申请人： Hidenori Okuni , Rui Ito , Hiroshi Yoshida
发明人： Hidenori Okuni , Rui Ito , Hiroshi Yoshida
IPC分类号： H04L25/10 , H03K5/007
CPC分类号： H04L25/06 , H03M1/1019 , H03M1/12
摘要： A receiver includes a memory for storing DC offset amounts in accordance with a DC offset component remaining in a received signal; a first DC offset component-removing unit configured so as to generate a first DC offset amount from the DC offset amounts stored in the memory and to remove the first DC offset amount from the received signal; an amplifier for amplifying a signal output from the first DC offset component-removing unit; and a second DC offset component-removing unit configured so as to generate a second DC offset amount from the DC offset amounts stored in the memory in view of a gain of the amplifier and remove the second DC offset amount from the signal amplified by the amplifier.
摘要翻译：接收机包括用于根据接收信号中剩余的DC偏移分量存储DC偏移量的存储器; 第一DC偏移分量去除单元，被配置为从存储在存储器中的DC偏移量产生第一DC偏移量，并从接收信号中去除第一DC偏移量; 放大器，用于放大从第一DC偏移分量去除单元输出的信号; 以及第二DC偏移分量去除单元，被配置为从放大器的增益的视角考虑存储在存储器中的DC偏移量产生第二DC偏移量，并且从由放大器放大的信号中去除第二DC偏移量。

17. 发明申请

US20080143434A1 TRANSCONDUCTOR 失效
公开(公告)号：US20080143434A1
公开(公告)日：2008-06-19
申请号：US11847503
申请日：2007-08-30
申请人： Rui Ito , Tetsuro Itakura
发明人： Rui Ito , Tetsuro Itakura
IPC分类号： G06G7/12
CPC分类号： H03G1/0029 , H03F1/3211 , H03F3/45179 , H03F3/45475 , H03F2203/45318 , H03F2203/45342 , H03F2203/45352 , H03F2203/45398 , H03H11/04
摘要： Disclosed is a transconductor including: first and second transistors each having first and second gates, the first and second gates being independently controlled, differential voltage input being supplied between the one first gate and the other first gate, the one source and the other source being connected, a first control voltage being commonly given to both of the second gates, and the drains being differential current output terminals; third and fourth transistors each having the same connection as the first and second transistors, each of the one drain and the other drain being connected with either of the one drain and the other drain of the first and the second transistors so that polarities are opposite to each other; and a current source connected with both of the sources of the first and the second transistors and both of the sources of the third and the fourth transistors.
摘要翻译：公开了一种跨导体，包括：第一和第二晶体管，每个具有第一和第二栅极，第一和第二栅极被独立地控制，差分电压输入被提供在一个第一栅极和另一个第一栅极之间，一个源极和另一个源极所述第一控制电压通常被提供给所述第二栅极，并且所述漏极是差动电流输出端子; 第三和第四晶体管各自具有与第一和第二晶体管相同的连接，一个漏极和另一个漏极中的每一个与第一和第二晶体管的一个漏极和另一个漏极中的任一个连接，使得极性与彼此; 以及与第一和第二晶体管的源极以及第三和第四晶体管的源极两者连接的电流源。

18. 发明授权

US06977541B2 Variable time constant circuit and filter circuit using the same 失效
标题翻译：可变时间常数电路和滤波电路使用相同
公开(公告)号：US06977541B2
公开(公告)日：2005-12-20
申请号：US10743949
申请日：2003-12-24
申请人： Daisuke Kurose , Tetsuro Itakura , Rui Ito
发明人： Daisuke Kurose , Tetsuro Itakura , Rui Ito
IPC分类号： H03F3/45 , G06G7/18 , H03F1/00 , H03F3/345 , H03H11/04 , H03H11/12 , H03H11/24 , H03H11/32 , H04B1/10
CPC分类号： H03H11/32 , H03F3/345 , H03F3/45475 , H03F2203/45511 , H03F2203/45512 , H03F2203/45592 , H03F2203/45652 , H03H11/1291 , H03H11/245
摘要： A variable time constant circuit includes an inverting amplifier which has an amplifier input terminal and an amplifier output terminal connected to a signal output terminal and inverts a signal inputted to the amplifier input terminal, a first and a second resistor which are connected in series between the signal input terminal and the amplifier input terminal, a capacitor connected between the amplifier input terminal and the amplifier output terminal, a field effect transistor including a gate terminal connected to a junction point of the first and second resistors, a source terminal kept at a constant potential, and a drain terminal connected to the amplifier input terminal, the transistor flowing a current through the drain terminal according to a voltage between the gate terminal and the source terminal, and a control circuit which controls a voltage-current conversion ratio of the transistor according to a time constant control signal.
摘要翻译：可变时间常数电路包括反相放大器，其具有放大器输入端和连接到信号输出端的放大器输出端，并且反相输入到放大器输入端的信号，第一和第二电阻串联在第信号输入端子和放大器输入端子，连接在放大器输入端子和放大器输出端子之间的电容器，场效应晶体管，其包括连接到第一和第二电阻器的接合点的栅极端子，源极端子保持恒定电位和连接到放大器输入端子的漏极端子，晶体管根据栅极端子和源极端子之间的电压流过漏极端子，以及控制电路，其控制晶体管的电压 - 电流转换比根据时间常数控制信号。

19. 发明授权

US07764748B2 Receiver, wireless device and method for cancelling a DC offset component 失效
标题翻译：接收机，无线设备和消除DC偏移分量的方法
公开(公告)号：US07764748B2
公开(公告)日：2010-07-27
申请号：US11851680
申请日：2007-09-07
申请人： Hidenori Okuni , Rui Ito , Hiroshi Yoshida
发明人： Hidenori Okuni , Rui Ito , Hiroshi Yoshida
IPC分类号： H03K9/00 , H04L27/00
CPC分类号： H04L25/06 , H03M1/1019 , H03M1/12
摘要： A receiver includes a memory for storing DC offset amounts in accordance with a DC offset component remaining in a received signal; a first DC offset component-removing unit configured so as to generate a first DC offset amount from the DC offset amounts stored in the memory and to remove the first DC offset amount from the received signal; an amplifier for amplifying a signal output from the first DC offset component-removing unit; and a second DC offset component-removing unit configured so as to generate a second DC offset amount from the DC offset amounts stored in the memory in view of a gain of the amplifier and remove the second DC offset amount from the signal amplified by the amplifier.
摘要翻译：接收机包括用于根据接收信号中剩余的DC偏移分量存储DC偏移量的存储器; 第一DC偏移分量去除单元，被配置为从存储在存储器中的DC偏移量产生第一DC偏移量，并从接收信号中去除第一DC偏移量; 放大器，用于放大从第一DC偏移分量去除单元输出的信号; 以及第二DC偏移分量去除单元，被配置为从放大器的增益的视角考虑存储在存储器中的DC偏移量产生第二DC偏移量，并且从由放大器放大的信号中去除第二DC偏移量。

20. 发明申请

US20090111377A1 FREQUENCY CONVERTER AND RECEIVER AND TRANSMITTER USING THE SAME 审中-公开
标题翻译：频率转换器和接收器和使用它的发射器
公开(公告)号：US20090111377A1
公开(公告)日：2009-04-30
申请号：US12234730
申请日：2008-09-22
申请人： Toshiya Mitomo , Rui Ito , Shoji Otaka
发明人： Toshiya Mitomo , Rui Ito , Shoji Otaka
IPC分类号： H04B7/14
CPC分类号： H03D7/165 , H03D7/1441 , H03D7/1458 , H03D7/1466
摘要： A frequency converter includes a voltage-current converter circuit which generates a positive-phase input current signal and a negative-phase input current signal, a switching circuit which switches between the positive-phase input current signal and the negative-phase input current signal according to a positive-phase local oscillator signal and a negative-phase local oscillator signal to generate a positive-phase output current signal and a negative-phase output current signal, an amplifier circuit which current-voltage converts and amplifies the positive-phase output current signal and negative-phase output current signal to generate a positive-phase output voltage signal and a negative-phase output voltage signal, and a plurality of CR circuits which are inserted at least either between the voltage-current converter circuit and the switching circuit or between the switching circuit and the amplifier circuit and each of which includes at least one capacitor through which high-frequency components pass and at least one resistance through which low-frequency noise components pass.
摘要翻译：变频器包括产生正相输入电流信号和负相输入电流信号的电压 - 电流转换器电路，根据正相输入电流信号和负相输入电流信号之间切换的开关电路，到正相本地振荡器信号和负相位本地振荡器信号以产生正相输出电流信号和负相输出电流信号，电流 - 电压转换和放大正相输出电流的放大器电路信号和负相输出电流信号，以产生正相输出电压信号和负相输出电压信号，以及至少插入在电压 - 电流转换器电路和开关电路之间的多个CR电路或在开关电路和放大器电路之间，其中每一个包括至少一个电容器，高频器通过该电容器 ncy分量通过低频噪声分量通过的至少一个电阻。

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