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11. 发明申请

US20080192919A1 COMMUNICATION SYSTEM, GATEWAY DEVICE AND ADAPTER DEVICE 有权
标题翻译：通信系统，网关设备和适配器设备
公开(公告)号：US20080192919A1
公开(公告)日：2008-08-14
申请号：US12020624
申请日：2008-01-28
申请人： Kiyotaka TSUJI , Muneyuki SUZUKI , Masashi ISHIDA
发明人： Kiyotaka TSUJI , Muneyuki SUZUKI , Masashi ISHIDA
IPC分类号： H04M7/00
CPC分类号： H04M7/0066 , H04L65/103 , H04L65/104
摘要： A gateway device which mutually converts communication protocols among a subscriber network including a base station wirelessly housing a mobile terminal and an Internet Protocol processor to bring an interface from the base station into an Internet Protocol process, a public switched telephone network and a packet communication network, includes a synchronized network terminating unit which terminates the public switched telephone network to generate the in-device signal, a packet network terminating unit which terminates the packet communication network to generate the in-device signal, a subscriber network terminating unit which houses the base station via the interface to which the Internet Protocol process is applied and terminates the subscriber network to generate the in-device signal, and an exchange unit which exchanges in-device signals each generated from the synchronized network terminating unit, the packet network terminating unit and the subscriber network terminating unit.
摘要翻译：一种网关设备，其在包括无线容纳移动终端的基站和因特网协议处理器的用户网络中相互转换通信协议，以将从基站进入互联网协议进程的接口，公共交换电话网络和分组通信网络包括终止公共交换电话网络以产生设备内信号的同步网络终端单元，终止分组通信网络以生成设备内信号的分组网络终端单元，收容基站的用户网络终端单元通过应用了因特网协议处理的接口站终端，终止用户网络以生成设备内信号;以及交换单元，其交换从同步网络终端单元，分组网络终端单元和分组网络终端单元生成的设备内信号，订户网络终止uni t。

12. 发明授权

US06184778B2 Communication network system and rebuilding method thereof 失效
标题翻译：通信网络系统及其重建方法
公开(公告)号：US06184778B2
公开(公告)日：2001-02-06
申请号：US09101618
申请日：1998-07-13
申请人： Kiyotaka Tsuji
发明人： Kiyotaka Tsuji
IPC分类号： G08B900
CPC分类号： H04L12/437 , H04L12/42
摘要： A communications network system capable of reducing the time from the occurrence of a trouble to the rebuilding of the system and a rebuilding method thereof. In a communications network system which comprises a plurality of node devices (10-1 to 10-4) distributed at a plurality of positions and transmission lines (1a, 1b) for connecting the plurality of node devices, one of the plurality of node devices is set as a master station (10-1) to operate the system, when the master station has a trouble, the individual node device makes an inquiry to the other node devices, and a node device which has confirmed that no other node device has a higher priority than itself becomes a substitute master station to take the place of the troubled master station to continue the operation of the system.
摘要翻译：一种能够减少从故障发生到重建系统的时间的通信网络系统及其重建方法。在包括分布在多个位置的多个节点设备（10-1至10-4）和用于连接多个节点设备的传输线（1a，1b）的通信网络系统中，多个节点设备被设置为主站（10-1）以操作系统，当主站有故障时，单个节点设备对其他节点设备进行查询，并且确认没有其他节点设备具有的节点设备比本身更高的优先级成为替代主站来代替困扰的主站继续运行系统。

13. 发明授权

US09026707B2 Electronic apparatus 有权
标题翻译：电子仪器
公开(公告)号：US09026707B2
公开(公告)日：2015-05-05
申请号：US13523614
申请日：2012-06-14
申请人： Kiyotaka Tsuji
发明人： Kiyotaka Tsuji
IPC分类号： G06F13/00 , H04L25/02
CPC分类号： H04L25/02 , G06F13/385
摘要： According to one embodiment, a monitor/control unit of an electronic circuit board monitors the receiving state of a transmitting/receiving circuit unit and controls a parameter setting unit, causing the same to change the reception parameter of the transmitting/receiving circuit unit, and if the receiving state remains not changed to a specified state, the monitor/control unit informs a host control device of this fact. The host control device instructs the switching process board to designate a channel, thereby to change, the specified state, the receiving sate of the electronic circuit board associated with the channel informed of that fact.
摘要翻译：根据一个实施例，电子电路板的监视器/控制单元监视发送/接收电路单元的接收状态并控制参数设置单元，使其改变发送/接收电路单元的接收参数，以及如果接收状态保持不变为指定状态，则监视/控制单元向主机控制装置通知该事实。主机控制装置指示切换处理板指定通道，从而改变指定状态，通知与该通道相关联的电子电路板的接收状态。

14. 发明授权

US08953363B2 Nonvolatile semiconductor memory device and read method for the same 有权
标题翻译：非易失性半导体存储器件及其读取方法相同
公开(公告)号：US08953363B2
公开(公告)日：2015-02-10
申请号：US13700329
申请日：2012-07-11
申请人： Kazuhiko Shimakawa , Kiyotaka Tsuji , Ryotaro Azuma
发明人： Kazuhiko Shimakawa , Kiyotaka Tsuji , Ryotaro Azuma
IPC分类号： G11C11/00 , G11C13/00 , G11C11/16 , G11C7/14
CPC分类号： G11C13/004 , G11C7/14 , G11C11/1673 , G11C13/0004 , G11C2013/0054 , G11C2213/71 , G11C2213/72 , G11C2213/73 , G11C2213/77
摘要： A cross point nonvolatile memory device capable of suppressing sneak-current-caused reduction in sensitivity of detection of a resistance value of a memory element is provided. The device includes perpendicular bit and word lines; a cross-point cell array including memory cells each having a resistance value reversibly changing between at least two resistance states according to electrical signals, arranged on cross-points of the word and bit lines; an offset detection cell array including an offset detection cell having a resistance higher than that of the memory cell in a high resistance state, the word lines being shared by the offset detection cell array; a read circuit (a sense amplifier) that determines a resistance state of a selected memory cell based on a current through the selected bit line; and a current source which supplies current to the offset detection cell array in a read operation period.
摘要翻译：提供一种能够抑制潜流引起的对存储元件的电阻值的检测灵敏度的降低的交叉点非易失性存储装置。该设备包括垂直位和字线; 交叉点单元阵列，其包括存储单元，每个存储单元具有电阻值，该电阻值根据电信号在至少两个电阻状态之间可逆地改变;布置在字和位线的交叉点上; 偏移检测单元阵列，包括在高电阻状态下具有高于存储单元的电阻的偏移检测单元，所述字线由偏移检测单元阵列共享; 读取电路（读出放大器），其基于通过所选位线的电流确定所选存储单元的电阻状态; 以及在读取操作时段中向偏移检测单元阵列提供电流的电流源。

15. 发明授权

US08811061B2 Memory device, semiconductor storage device, method for manufacturing memory device, and reading method for semiconductor storage device 有权
标题翻译：存储装置，半导体存储装置，存储装置的制造方法以及半导体存储装置的读取方法
公开(公告)号：US08811061B2
公开(公告)日：2014-08-19
申请号：US13812532
申请日：2011-09-26
申请人： Kiyotaka Tsuji , Takumi Mikawa
发明人： Kiyotaka Tsuji , Takumi Mikawa
IPC分类号： G11C11/00 , H01L45/00 , H01L27/24 , G11C13/00 , H01L27/10
CPC分类号： H01L45/1253 , G11C13/0007 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2213/72 , G11C2213/78 , H01L27/101 , H01L27/2409 , H01L27/2472 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/16 , H01L45/1625 , H01L45/1675 , H01L45/1683
摘要： A memory device that can prevent degradation in characteristics of a diode and the destruction due to the miniaturization includes: a substrate; first electrodes, a second electrode, and a third electrode that are stacked above the substrate; a variable resistance layer between the first and second electrodes; and a non-conductive layer between the second and third electrodes. The variable resistance layer includes a high-concentration variable resistance layer closer to the first electrodes, and a low-concentration variable resistance layer closer to the second electrode and having an oxygen concentration lower than that of the high-concentration variable resistance layer. The second and third electrodes and the non-conductive layer comprise the diode, and the first and second electrodes and the variable resistance layer comprise variable resistance elements, a total number of which is equal to that of the first electrodes.
摘要翻译：可以防止二极管的特性劣化和由于小型化引起的破坏的存储器件包括：衬底; 在基板上层叠的第一电极，第二电极和第三电极; 第一和第二电极之间的可变电阻层; 以及在第二和第三电极之间的非导电层。可变电阻层包括靠近第一电极的高浓度可变电阻层和更靠近第二电极并且氧浓度低于高浓度可变电阻层的低浓度可变电阻层的低浓度可变电阻层。第二和第三电极和非导电层包括二极管，并且第一和第二电极和可变电阻层包括可变电阻元件，其总数等于第一电极的总数。

16. 发明授权

US08551853B2 Non-volatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08551853B2
公开(公告)日：2013-10-08
申请号：US13498541
申请日：2011-07-07
申请人： Kiyotaka Tsuji , Takumi Mikawa , Kenji Tominaga
发明人： Kiyotaka Tsuji , Takumi Mikawa , Kenji Tominaga
IPC分类号： H01L21/20
CPC分类号： H01L27/2463 , H01L21/76879 , H01L45/04 , H01L45/146 , H01L45/1683
摘要： A non-volatile semiconductor memory device comprises a plurality of memory cell holes (101) formed through an interlayer insulating layer (80) at respective cross-points of a plurality of first wires (10) of a stripe shape and a plurality of second wires (20) of a stripe shape when viewed from above such that the memory cell holes (101) expose upper surfaces of the plurality of first wires, respectively, a plurality of dummy holes (111) formed on the plurality of first wires in the interlayer insulating layer such that the dummy holes reach the upper surfaces of the plurality of first wires, respectively, and stacked-layer structures formed inside the memory cell holes and inside the dummy holes, respectively, each of the stacked-layer structures including a first electrode (30) and a variable resistance layer (40); an area of a portion of the first wire which is exposed in a lower opening of one of the dummy holes being greater than an area of a portion of the first wire which is exposed in a lower opening of one of the memory cell holes; and one or more of the dummy holes being formed on each of the first wires.
摘要翻译：一种非易失性半导体存储器件包括：多条存储单元孔（101），其形成在层状绝缘层（80）的多个第一布线（10）的条状形状的各个交叉点处，多个第二布线（101）分别暴露在所述多个第一布线的上表面的多个虚设孔（111），所述多个第一布线形成在所述中间层绝缘层，使得所述虚拟孔分别到达所述多个第一布线的上表面，分别形成在所述存储单元孔内部和所述虚拟孔内部的堆叠层结构，所述层叠层结构中的每一个包括第一电极（30）和可变电阻层（40）; 在一个虚拟孔的下部开口中露出的第一线的一部分的面积大于暴露在一个存储单元孔的下部开口中的第一线的一部分的面积; 并且在每个第一导线上形成一个或多个虚拟孔。

17. 发明申请

US20130128654A1 NONVOLATILE MEMORY ELEMENT, METHOD OF MANUFACTURING NONVOLATILE MEMORY ELEMENT, METHOD OF INITIAL BREAKDOWN OF NONVOLATILE MEMORY ELEMENT, AND NONVOLATILE MEMORY DEVICE 审中-公开
标题翻译：非易失性存储器元件，非易失性存储器元件的制造方法，非易失性存储元件的初始破坏方法和非易失性存储器件
公开(公告)号：US20130128654A1
公开(公告)日：2013-05-23
申请号：US13814557
申请日：2012-06-07
申请人： Shinichi Yoneda , Yukio Hayakawa , Kiyotaka Tsuji
发明人： Shinichi Yoneda , Yukio Hayakawa , Kiyotaka Tsuji
IPC分类号： G11C13/00 , H01L45/00
CPC分类号： G11C13/0033 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2213/72 , H01L27/2409 , H01L45/00 , H01L45/04 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146
摘要： A nonvolatile memory element includes a current steering element which bidirectionally rectifies current in response to applied voltage and a variable resistance element connected in series with the current steering element. The current steering element includes an MSM diode and an MSM diode which are connected in series and each of which bidirectionally rectifies current in response to applied voltage. The MSM diode and the MSM diode include a lower electrode, a first current steering layer, a first metal layer, a second current steering layer, and an upper electrode which are stacked in this order. The current steering element has a breakdown current which is larger than an initial breakdown current which flows in the variable resistance element at the time of initial breakdown.
摘要翻译：非易失性存储元件包括响应于所施加的电压双向整流电流的电流转向元件和与当前转向元件串联连接的可变电阻元件。电流导向元件包括串联连接的MSM二极管和MSM二极管，并且其中的每一个响应于施加的电压双向整流电流。 MSM二极管和MSM二极管包括依次层叠的下电极，第一电流控制层，第一金属层，第二电流控制层和上电极。当前的转向元件具有大于初始击穿时在可变电阻元件中流动的初始击穿电流的击穿电流。

18. 发明授权

US08399875B1 Nonvolatile memory element, and nonvolatile memory device 有权
标题翻译：非易失性存储元件和非易失性存储器件
公开(公告)号：US08399875B1
公开(公告)日：2013-03-19
申请号：US13529707
申请日：2012-06-21
申请人： Takumi Mikawa , Kiyotaka Tsuji , Takashi Okada
发明人： Takumi Mikawa , Kiyotaka Tsuji , Takashi Okada
IPC分类号： H01L21/00 , H01L47/00
CPC分类号： G11C13/003 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2213/15 , G11C2213/32 , G11C2213/56 , G11C2213/72 , G11C2213/76 , H01L27/101 , H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675 , H01L45/1683
摘要： A nonvolatile memory element including a resistance variable element configured to reversibly change between a low-resistance state and a high-resistance state in response to electric signals with different polarities; and a current controlling element configured such that when a current flowing when a voltage whose absolute value is a first value which is larger than 0 and smaller than a predetermined voltage value and whose polarity is a first polarity is applied is a first current and a current flowing when a voltage whose absolute value is the first value and whose polarity is a second polarity is applied is a second current, the first current is higher than the second current, and the resistance variable element is connected with the current controlling element such that the first polarity voltage is applied to the current controlling element when the resistance variable element changes from the low-resistance to the high-resistance state.
摘要翻译：一种非易失性存储元件，包括电阻可变元件，其被配置为响应于具有不同极性的电信号在低电阻状态和高电阻状态之间可逆地变化; 以及电流控制元件，其被配置为当施加绝对值为大于0且小于预定电压值并且小于预定电压值且极性为第一极性的第一值的电流流过的电流时，是第一电流和电流当施加绝对值为第一值并且极性为第二极性的电压时，流过第二电流，第一电流高于第二电流，并且电阻可变元件与电流控制元件连接，使得当电阻可变元件从低电阻变为高电阻状态时，向电流控制元件施加第一极性电压。

19. 发明申请

US20130056701A1 NONVOLATILE MEMORY ELEMENT, AND NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储元件和非易失性存储器件
公开(公告)号：US20130056701A1
公开(公告)日：2013-03-07
申请号：US13529707
申请日：2012-06-21
申请人： Takumi Mikawa , Kiyotaka Tsuji , Takashi Okada
发明人： Takumi Mikawa , Kiyotaka Tsuji , Takashi Okada
IPC分类号： H01L45/00
CPC分类号： G11C13/003 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2213/15 , G11C2213/32 , G11C2213/56 , G11C2213/72 , G11C2213/76 , H01L27/101 , H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675 , H01L45/1683
摘要： A nonvolatile memory element including a resistance variable element configured to reversibly change between a low-resistance state and a high-resistance state in response to electric signals with different polarities; and a current controlling element configured such that when a current flowing when a voltage whose absolute value is a first value which is larger than 0 and smaller than a predetermined voltage value and whose polarity is a first polarity is applied is a first current and a current flowing when a voltage whose absolute value is the first value and whose polarity is a second polarity is applied is a second current, the first current is higher than the second current, and the resistance variable element is connected with the current controlling element such that the first polarity voltage is applied to the current controlling element when the resistance variable element changes from the low-resistance to the high-resistance state.
摘要翻译：一种非易失性存储元件，包括电阻可变元件，其被配置为响应于具有不同极性的电信号在低电阻状态和高电阻状态之间可逆地变化; 以及电流控制元件，其被配置为当施加绝对值为大于0且小于预定电压值并且小于预定电压值且极性为第一极性的第一值的电流流过的电流时，是第一电流和电流当施加绝对值为第一值并且极性为第二极性的电压时，流过第二电流，第一电流高于第二电流，并且电阻可变元件与电流控制元件连接，使得当电阻可变元件从低电阻变为高电阻状态时，向电流控制元件施加第一极性电压。

20. 发明授权

US08227788B2 Nonvolatile memory element, and nonvolatile memory device 有权
标题翻译：非易失性存储元件和非易失性存储器件
公开(公告)号：US08227788B2
公开(公告)日：2012-07-24
申请号：US12863535
申请日：2009-11-18
申请人： Takumi Mikawa , Kiyotaka Tsuji , Takashi Okada
发明人： Takumi Mikawa , Kiyotaka Tsuji , Takashi Okada
IPC分类号： H01L21/00
CPC分类号： G11C13/003 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2213/15 , G11C2213/32 , G11C2213/56 , G11C2213/72 , G11C2213/76 , H01L27/101 , H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675 , H01L45/1683
摘要： A nonvolatile memory element comprises a resistance variable element 105 configured to reversibly change between a low-resistance state and a high-resistance state in response to electric signals with different polarities which are applied thereto; and a current controlling element 112 configured such that when a current flowing when a voltage whose absolute value is a first value as a desired value which is larger than 0 and smaller than a predetermined voltage value and whose polarity is a first polarity is applied is a first current and a current flowing when a voltage whose absolute value is the first value and whose polarity is a second polarity different from the first polarity is applied is a second current, the first current is higher than the second current, and the resistance variable element is connected in series with the current controlling element such that a polarity of a voltage applied to the current controlling element when the resistance variable element is changed from the low-resistance state to the high-resistance state is the first polarity.
摘要翻译：非易失性存储元件包括电阻可变元件105，其被配置为响应于施加到其上的具有不同极性的电信号在低电阻状态和高电阻状态之间可逆地变化; 以及电流控制元件112，被配置为当施加绝对值为第一值的电压作为大于0且小于预定电压值且极性为第一极性的期望值的电流流过的电流控制元件112为当施加绝对值为第一值且极性为与第一极性不同的第二极性的电压时的第一电流和电流是第二电流，第一电流高于第二电流，并且电阻可变元件与电流控制元件串联连接，使得当电阻可变元件从低电阻状态改变为高电阻状态时施加到电流控制元件的电压的极性是第一极性。

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