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11. 发明申请

US20090071934A1 Crystalline aluminum oxide layers having increased energy band gap, charge trap layer devices including crystalline aluminum oxide layers, and methods of manufacturing the same 失效
标题翻译：具有增加的能带隙的结晶氧化铝层，包括结晶氧化铝层的电荷陷阱层器件及其制造方法
公开(公告)号：US20090071934A1
公开(公告)日：2009-03-19
申请号：US12219987
申请日：2008-07-31
申请人： Sang-moo Choi , Jung-hun Sung , Kwang-soo Seol , Woong-chul Shin , Sang-jin Park
发明人： Sang-moo Choi , Jung-hun Sung , Kwang-soo Seol , Woong-chul Shin , Sang-jin Park
IPC分类号： B44C1/22 , B05D3/10 , C23C14/08 , C23C16/00
CPC分类号： H01L21/28273 , H01L21/28282 , H01L29/4234 , H01L29/513 , H01L29/518
摘要： Crystalline aluminum oxide layers having increased energy band gap, charge trap memory devices including crystalline aluminum oxide layers and methods of manufacturing the same are provided. A method of forming an aluminum oxide layer having an increased energy band gap includes forming an amorphous aluminum oxide layer on a lower film, introducing hydrogen (H) or hydroxyl group (OH) into the amorphous aluminum oxide layer, and crystallizing the amorphous aluminum oxide layer including the H or OH.
摘要翻译：提供具有增加的能带隙的结晶氧化铝层，包括结晶氧化铝层的电荷陷阱存储器件及其制造方法。形成具有增加的能带隙的氧化铝层的方法包括在下膜上形成无定形氧化铝层，将氢（H）或羟基（OH）引入到无定形氧化铝层中，并使非晶态氧化铝层包括H或OH。

12. 发明申请

US20090067247A1 Method of programming nonvolatile memory device 有权
标题翻译：非易失性存储器件编程方法
公开(公告)号：US20090067247A1
公开(公告)日：2009-03-12
申请号：US12232082
申请日：2008-09-10
申请人： Sang-jin Park , Kwang-soo Seol , Ki-hwan Choi , Jung-hun Sung , Sang-moo Choi
发明人： Sang-jin Park , Kwang-soo Seol , Ki-hwan Choi , Jung-hun Sung , Sang-moo Choi
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/0483 , G11C16/10 , G11C16/3413 , G11C16/3454 , G11C16/3486
摘要： A method of programming a nonvolatile memory device may include applying a program voltage to a memory cell. A supplementary pulse may be applied to the memory cell to facilitate thermalization of charges after the application of the program voltage. A recovery voltage may be applied to the memory cell after the application of the supplementary pulse. A program state of the memory cell may be verified using a verification voltage after the application of the recovery voltage.
摘要翻译：非易失性存储器件的编程方法可以包括将程序电压施加到存储单元。补充脉冲可以施加到存储器单元，以便在施加编程电压之后促进电荷的热化。在施加补充脉冲之后，可以将复原电压施加到存储单元。可以在施加恢复电压之后使用验证电压来验证存储器单元的编程状态。

13. 发明申请

US20090021979A1 Gate stack, capacitorless dynamic random access memory including the gate stack and methods of manufacturing and operating the same 审中-公开
标题翻译：门堆叠，无电容动态随机存取存储器，包括栅极堆栈及其制造和操作方法
公开(公告)号：US20090021979A1
公开(公告)日：2009-01-22
申请号：US12007012
申请日：2008-01-04
申请人： Jung-hun Sung , Kwang-soo Seol , Woong-chul Shin , Sang-jin Park , Sang-moo Choi
发明人： Jung-hun Sung , Kwang-soo Seol , Woong-chul Shin , Sang-jin Park , Sang-moo Choi
IPC分类号： G11C11/40 , H01L27/108 , H01L21/8242
CPC分类号： H01L27/108 , G11C11/404 , H01L29/4234 , H01L29/792
摘要： Provided are a gate stack, a capacitorless dynamic random access memory (DRAM) including the gate stack and methods of manufacturing and operating the same. The gate stack for a capacitorless DRAM may include a tunnel insulating layer on a substrate, a first charge trapping layer on the tunnel insulating layer, an interlayer insulating layer on the first charge trapping layer, a second charge trapping layer on the interlayer insulating layer, a blocking insulating layer on the second charge trapping layer, and a gate electrode on the blocking insulating layer. The capacitorless DRAM may include the gate stack on the substrate, and a source and a drain in the substrate on both sides of the gate stack.
摘要翻译：提供了一种栅极堆叠，包括栅极堆叠的无电容动态随机存取存储器（DRAM）及其制造和操作的方法。用于无电容器DRAM的栅极堆叠可以包括衬底上的隧道绝缘层，隧道绝缘层上的第一电荷俘获层，第一电荷俘获层上的层间绝缘层，层间绝缘层上的第二电荷俘获层，第二电荷俘获层上的阻挡绝缘层，以及阻挡绝缘层上的栅电极。无电容器DRAM可以包括衬底上的栅极堆叠，以及栅极叠层两侧的衬底中的源极和漏极。

14. 发明授权

US08674475B2 Antifuse and methods of operating and manufacturing the same 有权
标题翻译：防腐剂及其操作和制造方法相同
公开(公告)号：US08674475B2
公开(公告)日：2014-03-18
申请号：US12385391
申请日：2009-04-07
申请人： Deok-kee Kim , Jung-hun Sung , Sang-moo Choi , Soo-jung Hwang
发明人： Deok-kee Kim , Jung-hun Sung , Sang-moo Choi , Soo-jung Hwang
IPC分类号： H01L23/62
CPC分类号： H01L23/5252 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： Provided are an antifuse and methods of operating and manufacturing the same. The antifuse may include first and second conductors separate from each other; a dielectric layer for an antifuse between the first and second conductors; and a diffusion layer between one of the first and second conductors and the dielectric layer.
摘要翻译：提供反熔丝及其操作和制造方法。反熔丝可以包括彼此分离的第一和第二导体; 用于第一和第二导体之间的反熔丝的电介质层; 以及在第一和第二导体之一和介电层之间的扩散层。

15. 发明授权

US07782666B2 Apparatus and method of multi-bit programming 有权
标题翻译：多位编程的装置和方法
公开(公告)号：US07782666B2
公开(公告)日：2010-08-24
申请号：US12076392
申请日：2008-03-18
申请人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Seung Hoon Lee , Jung Hun Sung , Sung-Jae Byun , Seung-Hwan Song , Donghun Yu , Sung Chung Park , Heeseok Eun
发明人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Seung Hoon Lee , Jung Hun Sung , Sung-Jae Byun , Seung-Hwan Song , Donghun Yu , Sung Chung Park , Heeseok Eun
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C2211/5621
摘要： Multi-bit programming apparatuses and/or methods are provided. A multi-bit programming apparatus may include: a first control unit that allocates any one of 2N threshold voltage states to the N-bit data; a second control unit that spaces, by any one of a first interval and a second interval, adjacent threshold voltage states of the 2N threshold voltage states; and a programming unit that programs the N-bit data by generating, in each of the at least one multi-bit cell, a distribution state corresponding to the allocated threshold voltage state. The multi-bit programming apparatus can reduce an error rate when reading data.
摘要翻译：提供了多位编程设备和/或方法。多比特编程装置可以包括：第一控制单元，其向N比特数据分配2N个阈值电压状态中的任何一个; 第二控制单元，其以第一间隔和第二间隔中的任一个间隔相邻的阈值电压状态的阈值电压状态; 以及编程单元，其通过在所述至少一个多位单元中的每一个中生成与所分配的阈值电压状态相对应的分布状态来对所述N位数据进行编程。多位编程装置可以在读取数据时降低错误率。

16. 发明授权

US07672167B2 Non-volatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US07672167B2
公开(公告)日：2010-03-02
申请号：US12081358
申请日：2008-04-15
申请人： Jung-hun Sung , Ju-hee Park
发明人： Jung-hun Sung , Ju-hee Park
IPC分类号： G11C16/06 , G11C16/04
CPC分类号： G11C16/0483 , G11C16/10 , G11C16/24 , G11C16/26
摘要： A non-volatile memory device may include at least one string, at least one bit line corresponding to the at least one string, and/or a sensing transistor. The at least one string may include a plurality of memory cell transistors connected in series. The sensing transistor may include a gate configured to sense a voltage of the corresponding bit line. A threshold voltage of the sensing transistor may be higher than a voltage obtained by subtracting a given voltage from a voltage applied to read the corresponding bit line connected to a memory cell transistor to be read of the plurality of memory cell transistors.
摘要翻译：非易失性存储器件可以包括至少一个串，至少一个与至少一个串相对应的位线，和/或感测晶体管。至少一个串可以包括串联连接的多个存储单元晶体管。感测晶体管可以包括被配置为感测对应位线的电压的栅极。感测晶体管的阈值电压可以高于通过从施加的电压减去给定电压而获得的电压，以读取连接到要被读取的多个存储单元晶体管的存储单元晶体管的对应位线。

17. 发明申请

US20090103366A1 Non-volatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US20090103366A1
公开(公告)日：2009-04-23
申请号：US12081358
申请日：2008-04-15
申请人： Jung-hun Sung , Ju-hee Park
发明人： Jung-hun Sung , Ju-hee Park
IPC分类号： G11C16/06
CPC分类号： G11C16/0483 , G11C16/10 , G11C16/24 , G11C16/26
摘要： A non-volatile memory device may include at least one string, at least one bit line corresponding to the at least one string, and/or a sensing transistor. The at least one string may include a plurality of memory cell transistors connected in series. The sensing transistor may include a gate configured to sense a voltage of the corresponding bit line. A threshold voltage of the sensing transistor may be higher than a voltage obtained by subtracting a given voltage from a voltage applied to read the corresponding bit line connected to a memory cell transistor to be read of the plurality of memory cell transistors.
摘要翻译：非易失性存储器件可以包括至少一个串，至少一个与至少一个串相对应的位线，和/或感测晶体管。至少一个串可以包括串联连接的多个存储单元晶体管。感测晶体管可以包括被配置为感测对应位线的电压的栅极。感测晶体管的阈值电压可以高于通过从施加的电压减去给定电压而获得的电压，以读取连接到要被读取的多个存储单元晶体管的存储单元晶体管的对应位线。

18. 发明申请

US20090061613A1 Method of forming aluminum oxide layer and method of manufacturing charge trap memory device using the same 有权
标题翻译：形成氧化铝层的方法和使用其制造电荷陷阱存储器件的方法
公开(公告)号：US20090061613A1
公开(公告)日：2009-03-05
申请号：US12153655
申请日：2008-05-22
申请人： Sang-moo Choi , Kwang-soo Seol , Woong-chul Shin , Sang-jin Park , Eun-ha Lee , Jung-hun Sung
发明人： Sang-moo Choi , Kwang-soo Seol , Woong-chul Shin , Sang-jin Park , Eun-ha Lee , Jung-hun Sung
IPC分类号： H01L21/3205 , H01L21/44
CPC分类号： H01L21/28282 , H01L21/02178 , H01L21/02263 , H01L21/02356 , H01L21/02362 , H01L21/31604 , H01L21/3162
摘要： Provided is a method of forming an aluminum oxide layer and a method of manufacturing a charge trap memory device using the same. The method of forming an aluminum oxide layer may include forming an amorphous aluminum oxide layer on an underlying layer, forming a crystalline auxiliary layer on the amorphous aluminum oxide layer, and crystallizing the amorphous aluminum oxide layer. Forming the crystalline auxiliary layer may include forming an amorphous auxiliary layer on the amorphous aluminum oxide layer; and crystallizing the amorphous auxiliary layer.
摘要翻译：提供一种形成氧化铝层的方法以及使用其形成电荷阱存储装置的方法。形成氧化铝层的方法可以包括在下层上形成非晶态氧化铝层，在非晶态氧化铝层上形成结晶性辅助层，并使无定形氧化铝层结晶。形成结晶辅助层可以包括在无定形氧化铝层上形成非晶态辅助层; 并使无定形辅助层结晶。

19. 发明申请

US20090059671A1 Method of programming non-volatile memory device 有权
标题翻译：非易失性存储器件编程方法
公开(公告)号：US20090059671A1
公开(公告)日：2009-03-05
申请号：US12213425
申请日：2008-06-19
申请人： Sang-Jin Park , Kwang-soo Seol , Jung-hun Sung
发明人： Sang-Jin Park , Kwang-soo Seol , Jung-hun Sung
IPC分类号： G11C16/06
CPC分类号： G11C16/0483 , G11C16/10 , G11C16/3454
摘要： A method of programming a non-volatile memory device may include performing a first programming operation including applying a program voltage to a memory cell and verifying the memory cell using a first verification voltage. A perturbation pulse may be applied to the memory cell to facilitate thermalization of charges in the memory cell if the memory cell passes the verification using the first verification voltage. The memory cell may be verified using a second verification voltage greater than the first verification voltage after the perturbation pulse is applied.
摘要翻译：编程非易失性存储器件的方法可以包括执行第一编程操作，包括将程序电压施加到存储器单元并且使用第一验证电压来验证存储器单元。如果存储器单元通过使用第一验证电压的验证，则可以将扰动脉冲施加到存储器单元以便于存储器单元中的电荷的热化。可以在施加扰动脉冲之后使用大于第一验证电压的第二验证电压来验证存储器单元。

20. 发明申请

US20090045455A1 Nonvolatile memory device and method of fabricating the same 审中-公开
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20090045455A1
公开(公告)日：2009-02-19
申请号：US12219465
申请日：2008-07-23
申请人： Kwang-soo Seol , Sang-jin Park , Sang-moo Choi , Hyo-sug Lee , Jung-hun Sung
发明人： Kwang-soo Seol , Sang-jin Park , Sang-moo Choi , Hyo-sug Lee , Jung-hun Sung
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L29/4234 , H01L29/40117 , H01L29/513 , H01L29/66833
摘要： Example embodiments relate to nonvolatile semiconductor memory devices using an electric charge storing layer as a storage node and fabrication methods thereof. An electric charge trap type nonvolatile memory device may include a tunneling film, an electric charge storing layer, a blocking insulation film, and a gate electrode. The blocking insulation film may be an aluminum oxide having an energy band gap larger than that of a γ-phase aluminum oxide film. An α-phase crystalline aluminum oxide film as a blocking insulation film may have an energy band gap of about 7.0 eV or more along with fewer defects. The crystalline aluminum oxide film may be formed by providing a source film (e.g., AlF3 film) on or within a preliminary blocking insulation film (e.g., amorphous aluminum oxide film) and performing a heat treatment. Alternatively, an aluminum compound (e.g., AlF3) may be introduced into the preliminary blocking insulation film by other diffusion methods or ion implantation. Accordingly, the ability of the memory device to maintain electric charges may be improved, the operating voltage for programming and erasing may be lowered, and the operating speed may be increased.
摘要翻译：示例性实施例涉及使用电荷存储层作为存储节点的非易失性半导体存储器件及其制造方法。电荷阱型非易失性存储器件可以包括隧穿膜，电荷存储层，阻挡绝缘膜和栅电极。阻挡绝缘膜可以是具有比γ相氧化铝膜的能带隙大的能带隙的氧化铝。作为阻挡绝缘膜的α相结晶氧化铝膜可以具有约7.0eV以上的能带隙和更少的缺陷。结晶氧化铝膜可以通过在预先隔离绝缘膜（例如无定形氧化铝膜）上或内部提供源膜（例如，AlF 3膜）并进行热处理而形成。或者，可以通过其它扩散方法或离子注入将铝化合物（例如，AlF 3）引入到初步阻挡绝缘膜中。因此，可以提高存储器件保持电荷的能力，可以降低用于编程和擦除的操作电压，并且可以提高操作速度。

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