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11. 发明申请

US20120297057A1 Hardware-Assisted Integrity Monitor 有权
标题翻译：硬件辅助完整性监视器
公开(公告)号：US20120297057A1
公开(公告)日：2012-11-22
申请号：US13296312
申请日：2011-11-15
申请人： Anup K. Ghosh , Kun Sun , Jiang Wang , Angelos Stavrou
发明人： Anup K. Ghosh , Kun Sun , Jiang Wang , Angelos Stavrou
IPC分类号： G06F15/173
CPC分类号： H04L63/1441 , G06F9/45558 , G06F21/575 , G06F2009/45587 , G06F2221/2105
摘要： A hardware-assisted integrity monitor may include one or more target machines and/or monitor machines. A target machine may include one or more processors, which may include one or more system management modes (SMM). A SMM may include one or more register checking modules, which may be configured to determine one or more current CPU register states. A SMM may include one or more acquiring modules, which may be configured to determine one or more current memory states. A SMM may include one or more network modules, which may be configured to direct one or more communications, for example of one or more current CPU register states and/or current memory states, to a monitor machine. A monitor machine may include one or more network modules and/or analysis modules. An analysis module may be configured to determine memory state differences and/or determine CPU register states differences.
摘要翻译：硬件辅助完整性监视器可以包括一个或多个目标机器和/或监视器机器。目标机器可以包括一个或多个处理器，其可以包括一个或多个系统管理模式（SMM）。 SMM可以包括一个或多个寄存器检查模块，其可以被配置为确定一个或多个当前CPU寄存器状态。 SMM可以包括一个或多个获取模块，其可以被配置为确定一个或多个当前存储器状态。 SMM可以包括一个或多个网络模块，其可以被配置为将一个或多个通信（例如一个或多个当前CPU寄存器状态和/或当前存储器状态）引导到监视器机器。监视器机器可以包括一个或多个网络模块和/或分析模块。分析模块可以被配置为确定存储器状态差异和/或确定CPU寄存器状态差异。

12. 发明申请

US20120179257A1 Expansion band with unilateral strain and manufacturing method thereof 有权
标题翻译：单向应变膨胀带及其制造方法
公开(公告)号：US20120179257A1
公开(公告)日：2012-07-12
申请号：US13065622
申请日：2011-03-24
申请人： Jiang Wang
发明人： Jiang Wang
IPC分类号： A61F2/44 , B23P11/00 , B29C65/48
CPC分类号： A61F5/028 , Y10T29/49826
摘要： An expansion band includes a first layer, a second layer, a shrinking layer for shrinking said first layer and said second layer, a bond line for sealing said first layer and said second layer to form an inner space therein and dividing said inner space into a plurality of air passages which can communicate with each other, a plurality of air passages formed between said first layer and said second layer, and an air nozzle communicate with said air passage.
摘要翻译：膨胀带包括第一层，第二层，用于收缩所述第一层和所述第二层的收缩层，用于密封所述第一层和所述第二层以在其中形成内部空间的接合线，并将所述内部空间分成能够相互连通的多个空气通道，形成在所述第一层和所述第二层之间的多个空气通道，空气喷嘴与所述空气通道连通。

13. 发明授权

US08172742B2 Magnetic stimulation apparatus for central nervous system, circuit and use thereof, and method of using the apparatus 有权
标题翻译：用于中枢神经系统的磁刺激装置，电路及其应用，以及使用该装置的方法
公开(公告)号：US08172742B2
公开(公告)日：2012-05-08
申请号：US11917732
申请日：2006-06-12
申请人： Yunfeng Zheng , Jiang Wang , Lin Xu
发明人： Yunfeng Zheng , Jiang Wang , Lin Xu
IPC分类号： A61N1/00
CPC分类号： A61N2/006 , A61N2/02
摘要： A magnetic stimulation apparatus for central nervous system and circuit thereof, and use of the apparatus and method of using the apparatus are shown. Controlling circuit design and outputting wave form signal to a drive power supply circuit enables the drive power supply circuit to output current of corresponding wave form to coils, and by means of the design of the shape, number of turns, size, interval of the coils, generates within a certain region inside the coils a desired time-variant magnetic field which is then applied to the brain of an animal or a human being so that the central nervous system can receive a wide area synergy magnetic stimulation with a precise wave form, high frequency or a combination of a plurality of frequency components, thus achieving the treatment of nervous and psychiatric diseases or brain function improvement in combination with behavior guidance, thought guidance, or psychological guidance.
摘要翻译：示出了用于中枢神经系统的磁刺激装置及其电路，以及使用该装置和使用该装置的方法。控制电路设计并将波形信号输出到驱动电源电路，使得驱动电源电路能够将相应波形的电流输出到线圈，并且通过形状，匝数，尺寸，线圈间隔的设计在线圈内的某个区域内产生期望的时变磁场，然后将其施加到动物或人的大脑，使得中枢神经系统可以以精确的波形形式接收广泛的协同磁刺激，高频率或多个频率分量的组合，从而实现与行为指导，思维指导或心理指导相结合的神经和精神疾病或脑功能改善的治疗。

14. 外观设计

USD654876S1 Electrical connector 有权
公开(公告)号：USD654876S1
公开(公告)日：2012-02-28
申请号：US29384186
申请日：2011-01-27
申请人： Li-Jiang Wang , Zhong-Hua Yao , Qi-Sheng Zheng
设计人： Li-Jiang Wang , Zhong-Hua Yao , Qi-Sheng Zheng

15. 发明申请

US20120040628A1 Transceiver with Interferer Control 审中-公开
标题翻译：收发器与干扰者控制
公开(公告)号：US20120040628A1
公开(公告)日：2012-02-16
申请号：US12855748
申请日：2010-08-13
申请人： Erwin Krug , Peter Laaser , Jiang Wang
发明人： Erwin Krug , Peter Laaser , Jiang Wang
IPC分类号： H04B1/40
CPC分类号： H04B15/04
摘要： Some embodiments of the present disclosure relate to a transceiver that includes multiple communication subunits associated with multiple communication protocols, respectively. The transceiver includes a conflict detection and control unit that determines whether interference is present or anticipated to occur between two or more of the communication subunits. If interference is present or anticipated, a local oscillator (LO) tuning unit changes an LO frequency provided to at least one of the two or more communication units. For example, in some embodiments, the LO tuning unit changes the LO frequency from high-side injection to low-side injection, or vice versa, or changes the intermediate frequency (IF) associated with a given communication subunit. In these ways, the techniques disclosed herein limit signal degradation due to interference from communication subunits residing within the transceiver.
摘要翻译：本公开的一些实施例涉及分别包括与多个通信协议相关联的多个通信子单元的收发器。收发器包括冲突检测和控制单元，其确定在两个或多个通信子单元之间是否存在或预期发生干扰。如果存在干扰或预期，则本地振荡器（LO）调谐单元改变提供给两个或更多个通信单元中的至少一个通信单元的LO频率。例如，在一些实施例中，LO调谐单元将LO频率从高侧注入改变为低侧注入，反之亦然，或改变与给定通信子单元相关联的中频（IF）。以这些方式，本文所公开的技术限制了由驻留在收发器内的通信子单元的干扰引起的信号劣化。

16. 发明授权

US07967631B2 Stacked electrical connector with improved insulators 有权
标题翻译：具有改进绝缘子的堆叠式电气连接器
公开(公告)号：US07967631B2
公开(公告)日：2011-06-28
申请号：US12479870
申请日：2009-06-08
申请人： Li-Jiang Wang , Jia-Yong He , Zhong-Hua Yao , Qi-Sheng Zheng
发明人： Li-Jiang Wang , Jia-Yong He , Zhong-Hua Yao , Qi-Sheng Zheng
IPC分类号： H01R13/60
CPC分类号： H01R13/648 , H01R12/712 , H01R13/502
摘要： A stacked electrical connector includes a first insulator and a second insulator mounted together. The first insulator includes a first connector and a receiving opening under a bottom wall of the first connector. The second insulator includes a second connector and a top wall. The bottom wall of the first connector includes a first retention member and the top wall of the second insulator defines a second retention member for mating with the first retention member. The first retention member is a protrusion or a dovetail shaped recess, and the second retention member is a rest of the protrusion or the dovetail shaped recess. The protrusion has an upper narrow section and a lower wide section under a condition that when the protrusion is received in the dovetail shaped recess, a movement therebetween can be prevented.
摘要翻译：堆叠的电连接器包括安装在一起的第一绝缘体和第二绝缘体。第一绝缘体包括在第一连接器的底壁下方的第一连接器和接收开口。第二绝缘体包括第二连接器和顶壁。第一连接器的底壁包括第一保持构件，第二绝缘体的顶壁限定用于与第一保持构件配合的第二保持构件。第一保持构件是突出部或燕尾形凹部，第二保持构件是突出部或燕尾形凹部的其余部分。在突起被容纳在燕尾形凹部中的情况下，突起具有上窄部和下宽部，能够防止其间的移动。

17. 发明授权

US07760030B2 Phase detection circuit and method thereof and clock recovery circuit and method thereof 有权
标题翻译：相位检测电路及其方法和时钟恢复电路及其方法
公开(公告)号：US07760030B2
公开(公告)日：2010-07-20
申请号：US11185825
申请日：2005-07-21
申请人： Dae-Seung Jeong , Ki-Mio Ueda , Duck Hyun Chang , Hwa-Su Koh , Young-Gyu Kang , Shu-Jiang Wang , Soon-Bok Jang , Nyun-Tae Kim
发明人： Dae-Seung Jeong , Ki-Mio Ueda , Duck Hyun Chang , Hwa-Su Koh , Young-Gyu Kang , Shu-Jiang Wang , Soon-Bok Jang , Nyun-Tae Kim
IPC分类号： H03L7/00
CPC分类号： H03L7/091 , H04L7/033
摘要： The phase detection circuit may allow an operating speed of a semiconductor circuit to be increased irrespective of whether a combinational logic circuit within the semiconductor circuit operates at lower operating speeds. The phase detection circuit may adjust a data rate of an input data signal and selectively enable reference signals and error signals. The phase detection circuit may be included within a clock data recovery circuit.
摘要翻译：相位检测电路可以允许半导体电路的操作速度增加，而不管半导体电路内的组合逻辑电路是否以较低的操作速度操作。相位检测电路可以调整输入数据信号的数据速率并选择性地启用参考信号和误差信号。相位检测电路可以包括在时钟数据恢复电路内。

18. 发明申请

US20090305555A1 STACKED ELECTRICAL CONNECTOR WITH IMPROVED INSULATORS 有权
标题翻译：具有改进绝缘体的堆叠式电气连接器
公开(公告)号：US20090305555A1
公开(公告)日：2009-12-10
申请号：US12479870
申请日：2009-06-08
申请人： LI-JIANG WANG , JIA-YONG HE , ZHONG-HUA YAO , QI-SHENG ZHENG
发明人： LI-JIANG WANG , JIA-YONG HE , ZHONG-HUA YAO , QI-SHENG ZHENG
IPC分类号： H01R13/66 , H01R9/03
CPC分类号： H01R13/648 , H01R12/712 , H01R13/502
摘要： A stacked electrical connector includes a first insulator and a second insulator mounted together. The first insulator includes a first connector and a receiving opening under a bottom wall of the first connector. The second insulator includes a second connector and a top wall. The bottom wall of the first connector includes a first retention member and the top wall of the second insulator defines a second retention member for mating with the first retention member. The first retention member is a protrusion or a dovetail shaped recess, and the second retention member is a rest of the protrusion or the dovetail shaped recess. The protrusion has an upper narrow section and a lower wide section under a condition that when the protrusion is received in the dovetail shaped recess, a movement therebetween can be prevented.
摘要翻译：堆叠的电连接器包括安装在一起的第一绝缘体和第二绝缘体。第一绝缘体包括在第一连接器的底壁下方的第一连接器和接收开口。第二绝缘体包括第二连接器和顶壁。第一连接器的底壁包括第一保持构件，第二绝缘体的顶壁限定用于与第一保持构件配合的第二保持构件。第一保持构件是突出部或燕尾形凹部，第二保持构件是突出部或燕尾形凹部的其余部分。在突起被容纳在燕尾形凹部中的情况下，突起具有上窄部和下宽部，能够防止其间的移动。

19. 发明申请

US20080175310A1 RECEIVER WITH EQUALIZER AND METHOD OF OPERATION 有权
标题翻译：接收器与均衡器和操作方法
公开(公告)号：US20080175310A1
公开(公告)日：2008-07-24
申请号：US12016404
申请日：2008-01-18
申请人： Hitoshi OKAMURA , Shu-Jiang WANG
发明人： Hitoshi OKAMURA , Shu-Jiang WANG
IPC分类号： H04L27/01
CPC分类号： H04L25/03019 , H04L7/0025 , H04L2025/03598 , H04L2025/03681
摘要： A receiver with an equalizer and an equalizing method are disclosed. The method includes equalizing received serial data in the equalizer, detecting an error in equalized serial data output by the equalizer, and determining reset of the equalizer in relation to an error detection.
摘要翻译：公开了一种具有均衡器和均衡方法的接收机。该方法包括均衡器中均衡接收的串行数据，检测均衡器输出的均衡串行数据中的错误，以及确定均衡器相对于错误检测的复位。

20. 发明授权

US07082554B2 System and method for providing error analysis and correlation in a network element 有权
公开(公告)号：US07082554B2
公开(公告)日：2006-07-25
申请号：US10274900
申请日：2002-10-22
申请人： Karen Margaret Wilson , Andre Poulin , Jiang Wang
发明人： Karen Margaret Wilson , Andre Poulin , Jiang Wang
IPC分类号： G06F11/00
CPC分类号： H04L43/0817 , H04L41/0631 , H04L41/065 , H04L43/0811 , H04L69/40
摘要： The present invention provides method and system for identifying a faulty component in a group of components, the group comprising in a connected configuration at least a first component connected to a second component, and further connected to at least a third component. In an embodiment, the method comprises: (i) monitoring for at least one fault at a component connection interface; and (ii) upon detection of a fault, identifying the faulty component utilising information from the fault and at least one rule for identifying the faulty component. The rules are defined from at least one characteristic of the fault, such as location and frequency, and at least one characteristic of the configuration.

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