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11. 发明授权

US06462534B2 Semiconductor package testing equipment including loader having package guider and method of loading a semiconductor package onto a test socket as aligned therewith 失效
标题翻译：半导体封装测试设备，包括具有封装导向器的装载器和将半导体封装装载到与之对齐的测试插座上的方法
公开(公告)号：US06462534B2
公开(公告)日：2002-10-08
申请号：US09805212
申请日：2001-03-14
申请人： Seong-goo Kang , Byoung-jun Min , Hyo-geun Chae , Jeong-ho Bang
发明人： Seong-goo Kang , Byoung-jun Min , Hyo-geun Chae , Jeong-ho Bang
IPC分类号： G01R3102
CPC分类号： G01R31/2867 , G01R1/0408 , H01L2224/75 , H01L2224/81
摘要： A loader of semiconductor package burn-in test equipment allows a test socket to be commonly used for semiconductor packages of all sizes. The loader includes a vacuum suction head for picking semiconductor packages to be tested, and a package guider for ensuring that semiconductor packages of any size will be aligned with the test socket. As the semiconductor package is positioned over the test socket by the vacuum suction head of the loader, guide surfaces of the package guider are brought inwardly into guide positions at which the surfaces extend just beneath the vacuum suction head. Any semiconductor package that is not in alignment with the test socket while being held by the vacuum suction head is guided by the guides surfaces into alignment once the vacuum suction is turned off and the package falls from the vacuum suction head. Thus, the package guider serves as an adaptor, eliminating the need for several test sockets having respective adaptors for different sizes of semiconductor packages.
摘要翻译：半导体封装老化测试设备的装载机允许测试插座常用于各种尺寸的半导体封装。装载机包括用于拾取待测试的半导体封装的真空吸头，以及用于确保任何尺寸的半导体封装将与测试插座对准的封装导向器。当半导体封装通过装载机的真空吸头位于测试插座上方时，封装引导件的引导表面向内进入引导位置，在该位置处表面正好在真空抽吸头的正下方延伸。在真空抽吸被关闭并且包装从真空抽吸头落下的情况下，由真空吸头保持的不与测试插座对准的任何半导体封装被引导面对引导。因此，封装导向器用作适配器，消除了对具有用于不同尺寸的半导体封装的相应适配器的多个测试插座的需要。

12. 发明授权

US5621625A Surge protection circuit for a switching mode power supply 失效
标题翻译：用于开关电源的浪涌保护电路
公开(公告)号：US5621625A
公开(公告)日：1997-04-15
申请号：US519281
申请日：1995-08-25
申请人： Jeong-Ho Bang
发明人： Jeong-Ho Bang
IPC分类号： H02H3/20 , H02M1/00 , H02M1/32 , H02M3/335
CPC分类号： H02M1/32 , H02M3/335
摘要： A surge protection circuit for a switching mode power supply utilizing the switching phase difference of substantially 180 degree between primary and secondary coils of a switching power supply transformer snubs surges induced on both sides of the power supply transformer by attenuating the surges induced during ON/OFF operations of a switching transistor which controls the power supply transformer. Accordingly, heat caused during the ON/OFF operation of the switching transistor is reduced and secondary rectifier diodes connected to the secondary winding of the power transformer are protected from damages The surge protection circuit uses a pair of capacitors connected in series between a control terminal of the primary coil and an output terminal of the secondary coil of the switching power supply transformer for snubbing bi-directional surges induced by the ON/OFF operation of the switching transistor.
摘要翻译：利用开关电源变压器的初级线圈和次级线圈之间的大致180度的开关相位差的开关模式电源的浪涌保护电路通过衰减在导通/截止期间感应的浪涌来缓冲在电源变压器的两侧感应的浪涌控制电源变压器的开关晶体管的操作。因此，开关晶体管的ON / OFF动作时产生的热量减少，与电力变压器的次级绕组连接的次级整流二极管被保护免受损坏浪涌保护电路使用一对电容器串联连接在控制端子开关电源变压器的次级线圈的初级线圈和输出端子，用于缓冲由开关晶体管的导通/截止操作引起的双向电涌。

13. 发明授权

US07602172B2 Test apparatus having multiple head boards at one handler and its test method 有权
标题翻译：在一个处理机上具有多个头板的测试装置及其测试方法
公开(公告)号：US07602172B2
公开(公告)日：2009-10-13
申请号：US12109299
申请日：2008-04-24
申请人： Ae-Yong Chung , Sung-Ok Kim , Kyeong-Seon Shin , Jeong-Ho Bang
发明人： Ae-Yong Chung , Sung-Ok Kim , Kyeong-Seon Shin , Jeong-Ho Bang
IPC分类号： G01R31/26
CPC分类号： G01R31/2893 , G01R31/01 , G01R31/2851
摘要： A test apparatus includes one handler connected to a tester and one test board divided into two or more sites or two or more test boards. Since only the sites on the test board (or test boards) need be duplicated, rather than the loading lanes or sorters of the handler, the test apparatus can be conveniently compact. Further, while testing semiconductor devices on one site or one test board, semiconductor devices in another site or on another test board can be sorted according to the test result. This enables the reduction or elimination of tester idle time to optimize the efficiency of the test apparatus.
摘要翻译：测试装置包括连接到测试器的一个处理器和分成两个或更多个站点或两个或更多个测试板的一个测试板。由于只有测试板（或测试板）上的站点需要复制，而不是处理器的加载通道或分拣机，所以测试设备可以方便地紧凑。此外，在一个站点或一个测试板上测试半导体器件时，可以根据测试结果对另一个站点中的另一个站点或另一个测试板上的半导体器件进行分类。这使得能够减少或消除测试器空闲时间以优化测试设备的效率。

14. 发明申请

US20070290707A1 TEST SYSTEM OF SEMICONDUCTOR DEVICE HAVING A HANDLER REMOTE CONTROL AND METHOD OF OPERATING THE SAME 有权
标题翻译：具有操作者远程控制的半导体器件的测试系统及其操作方法
公开(公告)号：US20070290707A1
公开(公告)日：2007-12-20
申请号：US11749053
申请日：2007-05-15
申请人： Ae-Yong CHUNG , Eun-Seok LEE , Jeong-Ho BANG , Kyeong-Seon SHIN , Dae-Gab CHI , Sung-Ok KIM
发明人： Ae-Yong CHUNG , Eun-Seok LEE , Jeong-Ho BANG , Kyeong-Seon SHIN , Dae-Gab CHI , Sung-Ok KIM
IPC分类号： G01R31/00
CPC分类号： G01R31/2893 , G01R31/2894 , G01R31/31718 , G01R31/31919
摘要： A test system of a semiconductor device for a handler remote control is provided. The system includes: a tester for testing the semiconductor device; a handler connected to the tester through a GPIB (General Purpose Instruction Bus) communication cable; a tester server connected to the tester to download a test program, handler remote control program and a handler state check program to the tester; and communication data transmitted and received through the GPIB communication cable between the tester and the handler, wherein the communication data has basic communication data for an electrical test of the semiconductor device, communication data for the handler remote control, and communication data for a handler state check.
摘要翻译：提供了一种用于处理器遥控器的半导体器件的测试系统。该系统包括：用于测试半导体器件的测试仪; 通过GPIB（通用指令总线）通信电缆连接到测试仪的处理器; 连接到测试器的测试仪服务器向测试者下载测试程序，处理程序遥控程序和处理程序状态检查程序; 以及通过GPIB通信电缆在测试者和处理者之间发送和接收的通信数据，其中通信数据具有用于半导体器件的电气测试的基本通信数据，用于处理器远程控制的通信数据和用于处理器状态的通信数据检查。

15. 发明授权

US07254757B2 Flash memory test system and method capable of test time reduction 失效
标题翻译：闪存测试系统和方法能够测试时间缩短
公开(公告)号：US07254757B2
公开(公告)日：2007-08-07
申请号：US10954834
申请日：2004-09-29
申请人： Dong-Kyoo Park , Jong-Kook Kim , Jeong-Ho Bang , Sang-Young Choi , Eun-Sik Kim
发明人： Dong-Kyoo Park , Jong-Kook Kim , Jeong-Ho Bang , Sang-Young Choi , Eun-Sik Kim
IPC分类号： G11C29/00 , G11C7/00 , G01R31/28
CPC分类号： G11C29/56004 , G11C29/56 , G11C2029/2602
摘要： A flash memory test system capable of test time reduction and an electrical test method using the same: The invention provides a parallel tester that includes a first memory and a second memory. The first and second memories are used to each supply different data to identical addresses within a plurality of DUTs, thereby making it possible to conduct in parallel tests such as trim tests, repair tests, and invalid block masking test. Thus parallel testing is done to replace testing that was previously done serially.
摘要翻译：一种能够测试时间缩短的闪存测试系统和使用其的电测试方法。本发明提供一种包括第一存储器和第二存储器的并行测试器。第一和第二存储器用于将不同的数据提供给多个DUT中的相同地址，从而使得可以在并行测试中进行诸如修整测试，修复测试和无效块掩蔽测试。因此，进行并行测试来替代以前连续完成的测试。

16. 发明申请

US20050236688A1 Fuse regions of a semiconductor memory device and methods of fabricating the same 有权
标题翻译：半导体存储器件的保险丝区域及其制造方法
公开(公告)号：US20050236688A1
公开(公告)日：2005-10-27
申请号：US11108636
申请日：2005-04-19
申请人： Kwang-Kyu Bang , Kun-Gu Lee , Kyoung-Suk Lyu , Jeong-Ho Bang , Kyeong-Seon Shin , Ho-Jeong Choi , Seung-Gyoo Choi
发明人： Kwang-Kyu Bang , Kun-Gu Lee , Kyoung-Suk Lyu , Jeong-Ho Bang , Kyeong-Seon Shin , Ho-Jeong Choi , Seung-Gyoo Choi
IPC分类号： H01L21/82 , G11C17/16 , H01L21/4763 , H01L21/768 , H01L21/8246 , H01L23/525 , H01L27/112 , H01L29/40
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A device and method of manufacturing a fuse region are disclosed. The fuse region may include an interlayer insulating layer formed on a substrate, a plurality of fuses disposed on the interlayer insulating layer, and fuse isolation walls located between the fuses, wherein each of the fuse isolation walls may include lower and upper fuse isolation patterns.
摘要翻译：公开了一种制造熔丝区域的装置和方法。熔丝区域可以包括形成在衬底上的层间绝缘层，设置在层间绝缘层上的多个熔丝以及位于保险丝之间的熔断器隔离壁，其中每个保险丝隔离壁可以包括下部和上部熔丝隔离图案。

17. 发明申请

US20050007140A1 Apparatus and method for performing parallel test on integrated circuit devices 有权
标题翻译：在集成电路设备上执行并行测试的装置和方法
公开(公告)号：US20050007140A1
公开(公告)日：2005-01-13
申请号：US10856461
申请日：2004-05-27
申请人： Woo-Il Kim , Hyun-Seop Shim , Hyoung-Young Lee , Young-Ki Kwak , Jeong-Ho Bang , Ki-Bong Ju
发明人： Woo-Il Kim , Hyun-Seop Shim , Hyoung-Young Lee , Young-Ki Kwak , Jeong-Ho Bang , Ki-Bong Ju
IPC分类号： G01R31/28 , G01R31/319 , G11C29/00 , G01R31/26
CPC分类号： G01R31/31905 , G11C2029/2602
摘要： Embodiments of the invention connect a plurality of devices under test (DUTS) in a parallel manner and a high test current is selectively applied to each DUT. The apparatus to test a plurality of DUTs includes a plurality of power sources providing the test current to a plurality of DUTs; and switching devices connected to the respective DUTs and power sources and selectively providing the test current. In addition, the apparatus has at least one control unit to control the switching devices. Furthermore, a group of DUTs from the plurality of DUTs is connected between two of the plurality of power sources in a parallel manner, and the test current is selectively provided to one DUT from the group of DUTs according to the operation of the switching devices.
摘要翻译：本发明的实施例以并行方式连接多个待测器件（DUTS），并且将高测试电流选择性地施加到每个DUT。测试多个DUT的装置包括向多个DUT提供测试电流的多个电源; 以及连接到各个DUT和电源的开关装置，并选择性地提供测试电流。此外，该装置具有至少一个控制单元来控制开关装置。此外，来自多个DUT的一组DUT以并行方式连接在多个电源中的两个之间，并且根据开关装置的操作，从DUT组中选择性地向一个DUT提供测试电流。

18. 发明授权

US06710550B2 Plasma display panel apparatus and method of protecting an over current thereof 失效
标题翻译：等离子显示面板装置及其过电流保护方法
公开(公告)号：US06710550B2
公开(公告)日：2004-03-23
申请号：US10183526
申请日：2002-06-28
申请人： Jeong-ho Bang
发明人： Jeong-ho Bang
IPC分类号： G09G310
CPC分类号： G09G3/2965 , G09G2330/025 , G09G2330/04
摘要： A plasma display panel apparatus includes a pair of discharge sustaining electrodes, a panel capacitor to supply charged voltage alternately to each electrode of the pair of discharge sustaining electrodes, a switching device for discharge that is turned on when the panel capacitor is discharged, to thereby pass through discharged current of the panel capacitor, a current sensing part to sense the current passed through by the switching device for discharge, and an over-current controlling part that turns off the switching device for discharge when the current sensed in the current sensing part is at or above a predetermined reference value. With this configuration, the plasma display panel apparatus protects the switching device from over-current generated during an abnormal driving of the discharge sustaining electrode driving circuit.
摘要翻译：等离子体显示面板装置包括一对放电维持电极，对一对放电维持电极的每个电极交替地提供充电电压的面板电容器，当面板电容器放电时导通的用于放电的开关装置，从而通过面板电容器的放电电流，电流检测部分，用于感测由开关装置进行放电的电流;以及过电流控制部，当在电流感测部分中感测到的电流时，切断装置进行放电处于或高于预定的参考值。利用这种配置，等离子体显示面板装置保护开关装置免于在放电维持电极驱动电路的异常驱动期间产生的过电流。

19. 发明授权

US07492032B2 Fuse regions of a semiconductor memory device and methods of fabricating the same 有权
标题翻译：半导体存储器件的保险丝区域及其制造方法
公开(公告)号：US07492032B2
公开(公告)日：2009-02-17
申请号：US11108636
申请日：2005-04-19
申请人： Kwang-Kyu Bang , Kun-Gu Lee , Kyoung-Suk Lyu , Jeong-Ho Bang , Kyeong-Seon Shin , Ho-Jeong Choi , Seung-Gyoo Choi
发明人： Kwang-Kyu Bang , Kun-Gu Lee , Kyoung-Suk Lyu , Jeong-Ho Bang , Kyeong-Seon Shin , Ho-Jeong Choi , Seung-Gyoo Choi
IPC分类号： H01L21/44
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A device and method of manufacturing a fuse region are disclosed. The fuse region may include an interlayer insulating layer formed on a substrate, a plurality of fuses disposed on the interlayer insulating layer, and fuse isolation walls located between the fuses, wherein each of the fuse isolation walls may include lower and upper fuse isolation patterns.
摘要翻译：公开了一种制造熔丝区域的装置和方法。熔丝区域可以包括形成在衬底上的层间绝缘层，设置在层间绝缘层上的多个熔丝以及位于保险丝之间的熔断器隔离壁，其中每个保险丝隔离壁可以包括下部和上部熔丝隔离图案。

20. 发明申请

US20060187943A1 Handoff system and method between different kinds of devices, SIP server and operational method of SIP server 有权
标题翻译：各种设备之间的切换系统和方法，SIP服务器和SIP服务器的操作方法
公开(公告)号：US20060187943A1
公开(公告)日：2006-08-24
申请号：US11355173
申请日：2006-02-16
申请人： Se-jong Oh , Jeong-ho Bang , Myung-cul Kim , Kyoung-hee Lee
发明人： Se-jong Oh , Jeong-ho Bang , Myung-cul Kim , Kyoung-hee Lee
IPC分类号： H04L12/56
CPC分类号： H04W36/0011 , H04W40/02 , H04W80/10 , H04W88/16
摘要： A handoff system and method between different kinds of devices, an SIP server and an application method of the SIP server applied thereto. The handoff system between different kinds of devices includes a plurality of devices; a SIP server which requests a routing path update when a handoff request signal is input from a source device among the plurality devices, and getting a target device to participate in a current session; and a gateway which updates a predetermined routing path when a request signal for the routing path update is input, and transmitting data to the source device and the target device via the updated routing path.
摘要翻译：不同种类的设备之间的切换系统和方法，SIP服务器和应用于其中的SIP服务器的应用方法。不同种类的设备之间的切换系统包括多个设备; SIP服务器，当从所述多个设备中的源设备输入切换请求信号时请求路由路径更新，并且使目标设备参与当前会话; 以及当输入用于路由路径更新的请求信号时更新预定路由路径的网关，以及经由更新的路由路径将数据发送到源设备和目标设备。

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