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11. 发明申请

US20120304025A1 DUAL HARD DISK DRIVE SYSTEM AND METHOD FOR DROPPED WRITE DETECTION AND RECOVERY 失效
标题翻译：双硬盘驱动系统和方法，用于删除写入检测和恢复
公开(公告)号：US20120304025A1
公开(公告)日：2012-11-29
申请号：US13113447
申请日：2011-05-23
申请人： James A. O'Connor
发明人： James A. O'Connor
IPC分类号： G06F11/16
CPC分类号： G06F11/1076 , G06F11/2094 , G06F2211/1088
摘要： A system is provided. The system detects a dropped write from a hard disk drive (HDD). The system includes two or more HDDs, each being configured to define a data block spread across the two or more HDDs. The data block is configured to regenerate a checksum across the full data block during a read operation to detect the dropped write.
摘要翻译：提供了一个系统。系统检测硬盘驱动器（HDD）的写入丢失。该系统包括两个或更多个HDD，每个HDD被配置为定义分布在两个或更多个HDD上的数据块。数据块被配置为在读取操作期间在整个数据块上重新生成校验和以检测丢弃的写入。

12. 发明授权

US08099570B2 Methods, systems, and computer program products for dynamic selective memory mirroring 有权
标题翻译：用于动态选择性存储器镜像的方法，系统和计算机程序产品
公开(公告)号：US08099570B2
公开(公告)日：2012-01-17
申请号：US12035695
申请日：2008-02-22
申请人： James A. O'Connor , Kanwal Bahri , Daniel J. Henderson , Luis A. Lastras-Montano , Warren E. Maule , Michael Mueller , Naresh Nayar , Richard Nicholas , Eric E. Retter , William J. Starke , Michael R. Trombley , Kenneth L. Wright
发明人： James A. O'Connor , Kanwal Bahri , Daniel J. Henderson , Luis A. Lastras-Montano , Warren E. Maule , Michael Mueller , Naresh Nayar , Richard Nicholas , Eric E. Retter , William J. Starke , Michael R. Trombley , Kenneth L. Wright
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F11/1666 , G06F11/1076 , G06F11/20 , G06F12/0246 , G06F2211/1088
摘要： Methods, systems, and computer program products are provided for dynamic selective memory mirroring in solid state devices. An amount of memory is reserved. Sections of the memory to select for mirroring in the reserved memory are dynamically determined. The selected sections of the memory contain critical areas. The selected sections of the memory are mirrored in the reserved memory.
摘要翻译：为固态设备中的动态选择性存储器镜像提供了方法，系统和计算机程序产品。保留一定量的内存。用于在保留的存储器中选择镜像的存储器的部分是动态确定的。存储器的选定部分包含关键区域。存储器的选定部分被镜像在保留的存储器中。

13. 发明授权

US08041990B2 System and method for error correction and detection in a memory system 有权
标题翻译：用于存储系统中纠错和检测的系统和方法
公开(公告)号：US08041990B2
公开(公告)日：2011-10-18
申请号：US11769929
申请日：2007-06-28
申请人： James A. O'Connor , Luis A. Lastras-Montano , Luis C. Alves , William J. Clarke , Timothy J. Dell , Thomas J. Dewkett , Kevin C. Gower
发明人： James A. O'Connor , Luis A. Lastras-Montano , Luis C. Alves , William J. Clarke , Timothy J. Dell , Thomas J. Dewkett , Kevin C. Gower
IPC分类号： G06F11/00
CPC分类号： G06F11/108 , G06F2211/1045 , G06F2211/1057 , G06F2211/1064
摘要： A system and method for error correction and detection in a memory system. The system includes a memory controller, a plurality of memory modules and a mechanism. The memory modules are in communication with the memory controller and with a plurality of memory devices. The mechanism detects that one of the memory modules has failed possibly coincident with a memory device failure on an other of the memory modules. The mechanism allows the memory system to continue to run unimpaired in the presence of the memory module failure and the memory device failure.
摘要翻译：一种用于存储系统中的纠错和检测的系统和方法。该系统包括存储器控制器，多个存储器模块和机构。存储器模块与存储器控制器和多个存储器件通信。该机制检测到其中一个内存模块出现故障，可能与其他内存模块上的内存设备故障一致。该机制允许内存系统在内存模块故障和内存设备故障的情况下继续运行不受损坏。

14. 发明申请

US20100217915A1 HIGH AVAILABILITY MEMORY SYSTEM 有权
标题翻译：高可用性存储系统
公开(公告)号：US20100217915A1
公开(公告)日：2010-08-26
申请号：US12390731
申请日：2009-02-23
申请人： James A. O'Connor , Kevin C. Gower , Luis A. Lastras-Montano , Warren E. Maule
发明人： James A. O'Connor , Kevin C. Gower , Luis A. Lastras-Montano , Warren E. Maule
IPC分类号： G06F12/06 , G06F11/10
CPC分类号： G06F11/1004 , G06F12/0886
摘要： A memory system with high availability is provided. The memory system includes multiple memory channels. Each memory channel includes at least one memory module with memory devices organized as partial ranks coupled to memory device bus segments. Each partial rank includes a subset of the memory devices accessible as a subchannel on a subset of the memory device bus segments. The memory system also includes a memory controller in communication with the multiple memory channels. The memory controller distributes an access request across the memory channels to access a full rank. The full rank includes at least two of the partial ranks on separate memory channels. Partial ranks on a common memory module can be concurrently accessed. The memory modules can use at least one checksum memory device as a dedicated checksum memory device or a shared checksum memory device between at least two of the concurrently accessible partial ranks.
摘要翻译：提供了高可用性的内存系统。存储器系统包括多个存储器通道。每个存储器通道包括至少一个存储器模块，其中存储器件被组织为耦合到存储器设备总线段的部分等级。每个部分等级包括作为存储器设备总线段的子集上的子信道可访问的存储器件的子集。存储器系统还包括与多个存储器通道通信的存储器控制器。存储器控制器通过存储器通道分配访问请求以访问完整等级。完整等级包括在独立内存通道上的至少两个部分等级。可以同时访问公共内存模块上的部分排名。存储器模块可以在至少两个可同时访问的部分等级之间使用至少一个校验和存储器设备作为专用校验和存储器设备或共享校验和存储器设备。

15. 发明申请

US20090055688A1 DETECTION AND CORRECTION OF DROPPED WRITE ERRORS IN A DATA STORAGE SYSTEM 有权
标题翻译：数据存储系统中丢弃的写入错误的检测和校正
公开(公告)号：US20090055688A1
公开(公告)日：2009-02-26
申请号：US11843791
申请日：2007-08-23
申请人： James L. Hafner , Carl E. Jones , David R. Kahler , Robert A. Kubo , David F. Mannenbach , Karl A. Nielsen , James A. O'Connor , Krishnakumar R. Surugucchi
发明人： James L. Hafner , Carl E. Jones , David R. Kahler , Robert A. Kubo , David F. Mannenbach , Karl A. Nielsen , James A. O'Connor , Krishnakumar R. Surugucchi
IPC分类号： G06F11/00
CPC分类号： G06F11/1076 , G06F11/004 , G06F2211/104 , G06F2211/109 , G11B20/1833 , G11B2020/1843 , G11B2220/2516 , G11B2220/415
摘要： Methods are provided for detecting and correcting dropped writes in a storage system. Data and a checksum are written to a storage device, such as a RAID array. The state of the data is classified as being in a “new data, unconfirmed” state. The state of written data is periodically checked, such as with a timer. If the data is in the “new data, unconfirmed” state, it is checked for a dropped write. If a dropped write has occurred, the state of the data is changed to a “single dropped write confirmed” state and the dropped write error is preferably corrected. If no dropped write is detected, the state is, changed to a “confirmed good” state. If the data was updated through a read-modified-write prior to being checked for a dropped write event, its state is changed to an “unquantifiable” state.
摘要翻译：提供了用于检测和校正在存储系统中的丢弃写入的方法。将数据和校验和写入存储设备，如RAID阵列。数据的状态被分类为“新数据，未确认”状态。周期性地检查写入数据的状态，例如使用定时器。如果数据处于“新数据，未确认”状态，则检查是否丢弃写入。如果发生了丢弃的写入，则将数据的状态改变为“单个丢弃的写入确认”状态，并且优选地校正丢弃的写入错误。如果没有检测到掉落的写入状态，则更改为“已确认”状态。如果在检查丢失的写入事件之前通过读取 - 修改 - 写入更新数据，则其状态将更改为“无法量化”状态。

16. 发明授权

US4485978A Method and apparatus for winding strand upon spools having tapered end flanges 失效
标题翻译：用于在具有锥形端部凸缘的线轴上缠绕线的方法和装置
公开(公告)号：US4485978A
公开(公告)日：1984-12-04
申请号：US562554
申请日：1983-12-19
申请人： James A. O'Connor
发明人： James A. O'Connor
IPC分类号： B65H54/32 , B65H54/28
CPC分类号： B65H54/32
摘要： A method and apparatus for winding an advancing strand onto a spool having an out-turned conical end flange at each end of a cylindrical barrel utilizing a strand traverse guide reciprocated relative to the spool at a linear speed proportional to the relative rotational velocity of the spool. The end limits of reciprocation of the strand guide are established in relation to respective reference positions corresponding to what would be apices of the respective end flanges if the latter were not truncated. During each traverse of the strand guide toward an end flange, the number of turns wound onto the spool outward of the respective reference position is regulated in accordance with the effective winding radius of the spool as determed by measuring the length of strand wound onto the spool for a specified rotational movement thereof.
摘要翻译：一种用于将前进股线卷绕到具有外圆锥形端部凸缘的线轴上的方法和装置，所述线轴具有在圆柱形筒的每个端部处具有向外转动的锥形端部凸缘，其利用相对于线轴的线横向导向件，该线性速度与线轴的相对旋转速度成比例的线性速度。关于相应的参考位置确定股线引导件的往复运动的终点，如果后端未被截断则相应于相应末端法兰的顶点是相应的。在股线引导件朝向端部凸缘的每次横移期间，根据卷筒的有效卷绕半径来调节缠绕在相应基准位置的线轴上的匝数，通过测量缠绕在线轴上的线的长度来确定对于其指定的旋转运动。

17. 发明授权

US09189320B2 Handling intermittent recurring errors in a network 有权
标题翻译：处理网络中的间歇性重复错误
公开(公告)号：US09189320B2
公开(公告)日：2015-11-17
申请号：US13586405
申请日：2012-08-15
申请人： Ian A. MacQuarrie , James A. O'Connor , Limei Shaw , Thomas Walter , Thomas V. Weaver , Shawn T. Wright
发明人： Ian A. MacQuarrie , James A. O'Connor , Limei Shaw , Thomas Walter , Thomas V. Weaver , Shawn T. Wright
IPC分类号： G06F11/20 , G06F11/07
CPC分类号： G06F11/0793 , G06F11/0727 , G06F11/076 , G06F11/0772 , G06F11/2007 , H04L41/0654 , H04L43/0847 , H04L45/28
摘要： Embodiments relate to a computer for transmitting data in a network. The computer includes at least one data transmission port configured to be connected to at least one storage device via a plurality of paths of a network. The computer further includes a processor configured to detect recurring intermittent errors in one or more paths of the plurality of paths and to disable access to the one or more paths based on detecting the recurring intermittent errors.
摘要翻译：实施例涉及用于在网络中传输数据的计算机。计算机包括被配置为经由网络的多个路径连接到至少一个存储设备的至少一个数据传输端口。计算机还包括处理器，其被配置为检测多个路径中的一个或多个路径中的重复的间歇性错误，并且基于检测到重复的间歇性错误来禁止对一个或多个路径的访问。

18. 发明申请

US20130013956A1 REDUCING IMPACT OF A REPAIR ACTION IN A SWITCH FABRIC 有权
公开(公告)号：US20130013956A1
公开(公告)日：2013-01-10
申请号：US13177611
申请日：2011-07-07
申请人： WILLIAM J. ARMSTRONG , JOHN M. BORKENHAGEN , MARTIN J. CRIPPEN , DHRUV M. DESAI , DAVID R. ENGEBRETSEN , PHILIP R. HILLIER, III , WILLIAM G. HOLLAND , JAMES A. HUGHES , BRADLEY D. MCCREDIE , JAMES A. O'CONNOR , STEVEN M. TRI
发明人： WILLIAM J. ARMSTRONG , JOHN M. BORKENHAGEN , MARTIN J. CRIPPEN , DHRUV M. DESAI , DAVID R. ENGEBRETSEN , PHILIP R. HILLIER, III , WILLIAM G. HOLLAND , JAMES A. HUGHES , BRADLEY D. MCCREDIE , JAMES A. O'CONNOR , STEVEN M. TRI
IPC分类号： G06F11/20
CPC分类号： G06F11/07 , G06F11/1076 , G06F11/2007 , G06F11/326
摘要： Techniques are disclosed for reducing impact of a repair action in a switch fabric. In one embodiment, a server system is provided that includes a first interposer card that operatively connects one or more server cards to a midplane. The first interposer card may include a switch module that switches network traffic for the one or more server cards. The first interposer card may be hot-swappable from the midplane, and the one or more server cards may be hot-swappable from the first interposer card.

19. 发明申请

US20120185624A1 Automated Cabling Process for a Complex Environment 有权
标题翻译：复杂环境的自动布线过程
公开(公告)号：US20120185624A1
公开(公告)日：2012-07-19
申请号：US13008582
申请日：2011-01-18
申请人： Tu T. Dang , Michael C. Elles , Jeffery M. Franke , James A. O'Connor , Alan D. Seid
发明人： Tu T. Dang , Michael C. Elles , Jeffery M. Franke , James A. O'Connor , Alan D. Seid
IPC分类号： G06F13/40
CPC分类号： G06F13/4068 , G06F13/385 , G06F13/40 , G06F2213/3814 , H04W4/80
摘要： A method is provided for cabling a plurality of hardware components. A chassis controller establishes a wireless connection to a wireless device. The chassis controller, via a wireless interface, transmits a chassis map to the wireless device over the wireless connection. The chassis controller, via the wireless interface, transmits to the wireless device, an indication of a first port to be cabled over the wireless connection, the first port. The first port is of a first hardware component of the plurality of hardware components. The chassis controller tests the first port to determine whether cabling of the first port has been performed correctly.
摘要翻译：提供了一种用于布线多个硬件组件的方法。机箱控制器建立到无线设备的无线连接。底盘控制器通过无线接口通过无线连接将机箱地图发送到无线设备。机箱控制器通过无线接口向无线设备发送要通过无线连接电缆连接的第一端口的指示，即第一端口。第一端口是多个硬件组件的第一硬件组件。机箱控制器测试第一个端口以确定第一个端口的布线是否已正确执行。

20. 发明授权

US08041989B2 System and method for providing a high fault tolerant memory system 有权
标题翻译：提供高容错存储系统的系统和方法
公开(公告)号：US08041989B2
公开(公告)日：2011-10-18
申请号：US11769936
申请日：2007-06-28
申请人： Luis A. Lastras-Montano , James A. O'Connor , Luiz C. Alves , William J. Clarke , Timothy J. Dell , Thomas J. Dewkett , Kevin C. Gower
发明人： Luis A. Lastras-Montano , James A. O'Connor , Luiz C. Alves , William J. Clarke , Timothy J. Dell , Thomas J. Dewkett , Kevin C. Gower
IPC分类号： G06F11/00
CPC分类号： G06F11/1044 , G11C5/04 , G11C29/4401 , G11C29/81 , G11C2029/0409 , G11C2029/0411
摘要： A system and method for providing a high fault tolerant memory system. The system includes a memory system having a memory controller, a plurality of memory modules and a mechanism. The plurality of memory modules are in communication with the memory controller and with a plurality of memory devices. The plurality of memory devices include at least one spare memory device for providing memory device sparing capability. The mechanism is for detecting that one of the memory modules has failed possibly coincident with a memory device failure on an other of the memory modules. The mechanism allows the memory system to continue to run unimpaired in the presence of the memory module failure and the possible memory device failure.
摘要翻译：一种用于提供高容错存储器系统的系统和方法。该系统包括具有存储器控制器，多个存储器模块和机构的存储器系统。多个存储器模块与存储器控制器和多个存储器件通信。多个存储器件包括用于提供存储器件备用能力的至少一个备用存储器件。该机制用于检测存储器模块中的一个已经失败，可能与另一个存储器模块上的存储器件故障重合。该机制允许存储器系统在存在存储器模块故障和可能的存储器件故障的情况下继续运行不受损害。

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