专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US6055022A Apparatus and method for maintaining synchronism between a picture signal and a matrix scanned array 失效
标题翻译：用于保持图像信号和矩阵扫描阵列之间的同步的装置和方法
公开(公告)号：US6055022A
公开(公告)日：2000-04-25
申请号：US821805
申请日：1997-03-21
申请人： Glen E. Hush
发明人： Glen E. Hush
IPC分类号： G09G3/20 , G09G5/00 , H04N5/04 , H04N5/10 , H04N5/12 , H04N5/66
CPC分类号： H04N5/66 , G09G3/20 , G09G5/006 , G09G5/008 , H04N5/10 , H04N5/04 , H04N5/126
摘要： A monolithically integratable display apparatus for receiving a picture signal having frames of video information and horizontal and vertical synchronizing components includes a matrix of display cells arranged in an array of M rows by N columns. Display cells in the matrix are individually addressable by row and column signals so as to receive the video information in the picture signal in response thereto. A first shift circuit coupled to the matrix provides the row signals in response to a first clocking signal and a data signal. A second shift circuit coupled to the matrix provides the column signals in response to a second clocking signal. A first clock circuit, such as a phase locked loop, receives the horizontal synchronizing component of the picture signal and produces the second clocking signal in response thereto. A synchronizing detector circuit receives the vertical synchronizing component of the picture signal and produces the data signal in response thereto. A synchronizing regenerator circuit provides a substitute data signal if it fails to receive the data signal, the substitute data signal being based on a vertical synchronizing component from a previous frame of video information.
摘要翻译：一种用于接收具有视频信息和水平和垂直同步分量帧的图像信号的单片可整合显示装置，包括以M行×N列排列的显示单元的矩阵。矩阵中的显示单元可以通过行和列信号单独寻址，以便响应于此而接收图像信号中的视频信息。耦合到矩阵的第一移位电路响应于第一时钟信号和数据信号提供行信号。耦合到矩阵的第二移位电路响应于第二时钟信号提供列信号。诸如锁相环的第一时钟电路接收图像信号的水平同步分量，并响应于此产生第二时钟信号。同步检测器电路接收图像信号的垂直同步分量，并响应于此产生数据信号。如果不能接收数据信号，则同步再生器电路提供替代数据信号，替代数据信号基于来自视频信息的先前帧的垂直同步分量。

12. 发明授权

US6028576A Matrix addressable display having compensation for activation-to-emission variations 失效
标题翻译：矩阵可寻址显示器具有激活发射变化的补偿
公开(公告)号：US6028576A
公开(公告)日：2000-02-22
申请号：US726293
申请日：1996-10-04
申请人： Glen E. Hush
发明人： Glen E. Hush
IPC分类号： G09G3/22
CPC分类号： G09G3/22 , G09G2300/0809 , G09G2320/0233 , G09G3/2011 , G09G3/2081
摘要： A matrix addressable display includes an array of emitters aligned to respective regions of a cathodoluminescent layer. Each of the emitters is driven by a respective driving circuit in response to an image signal. Each of the driving circuits includes components selected according to an activation-to-emission response of the respective region of the cathodoluminescent layer. In one embodiment, the driving circuits include storage capacitors having capacitances that correspond to the activation-to-emission response of the region of the cathodoluminescent layer. In another embodiment, the driving circuits include identical capacitors that are charged and discharged in response to pulsed charging and driving signals. By adjusting the pulsed charging and driving signals, the amount of charge transferred to the emitter can be adjusted to compensate for the activation-to-emission response of the respective region of the cathodoluminescent layer.
摘要翻译：矩阵可寻址显示器包括与阴极发光层的各个区域对准的发射体阵列。响应于图像信号，每个发射器由相应的驱动电路驱动。每个驱动电路包括根据阴极发光层的各个区域的激活 - 发射响应选择的部件。在一个实施例中，驱动电路包括具有对应于阴极发光层的区域的激活 - 发射响应的电容的存储电容器。在另一实施例中，驱动电路包括响应于脉冲充电和驱动信号而被充电和放电的相同的电容器。通过调节脉冲充电和驱动信号，可以调节转移到发射极的电荷量，以补偿阴极发光层的各个区域的激活发射响应。

13. 发明授权

US5909200A Temperature compensated matrix addressable display 失效
标题翻译：温度补偿矩阵可寻址显示
公开(公告)号：US5909200A
公开(公告)日：1999-06-01
申请号：US726292
申请日：1996-10-04
申请人： Glen E. Hush
发明人： Glen E. Hush
IPC分类号： G09G3/20 , G09G3/22
CPC分类号： G09G3/22 , G09G2300/0842 , G09G2320/041 , G09G3/2011 , H01J2201/30403 , H01J2329/00
摘要： A current controlled field emission display includes a current control circuit coupled to respective emitters to control current flow through the emitters. The control circuit includes a limiting resistor to limit the current flow to the emitters. To compensate for temperature or other variations in the resistance of the limiting resistor, the control circuit also includes a compensating resistor that produces an offsetting change in a driving voltage within the control circuit. As the resistance of the limiting resistance drops, which would allow the current through the emitter to increase, the compensating resistor produces an offsetting voltage drop that increases the voltage across the limiting resistance to maintain the current through the limiting resistance constant. The offsetting current reduction thus reduces the overall effect of temperature on current flowing through the emitter set.
摘要翻译：电流控制场发射显示器包括耦合到相应发射器的电流控制电路，以控制通过发射器的电流。控制电路包括限制电阻以限制电流流向发射器。为了补偿限制电阻的电阻的温度或其他变化，控制电路还包括补偿电阻器，其产生控制电路内的驱动电压的偏移变化。当限流电阻的电阻下降，这将允许通过发射极的电流增加时，补偿电阻器产生偏移电压降，其增加限制电阻两端的电压，以保持电流通过限制电阻恒定。偏移电流减小因此降低了温度对流过发射极组的电流的总体影响。

14. 发明授权

US5856812A Controlling pixel brightness in a field emission display using circuits for sampling and discharging 失效
公开(公告)号：US5856812A
公开(公告)日：1999-01-05
申请号：US637353
申请日：1996-04-24
申请人： Glen E. Hush , Tyler A. Lowrey
发明人： Glen E. Hush , Tyler A. Lowrey
IPC分类号： G09G3/20 , G09G3/22 , H01J31/12
CPC分类号： G09G3/22 , H01J31/127 , G09G2300/08 , G09G2310/0248 , G09G2310/0259 , G09G2310/066 , G09G2320/0606 , G09G2320/0626 , G09G2320/066 , G09G3/2011 , G09G3/2014 , H01J2201/319 , H01J2329/00
摘要： A flat panel display, such as a Field Emission Display ("FED"), is disclosed having a current control circuit. Input into the display, initially, is an analog signal having an amplitude. In one embodiment, the current control circuit includes a converter for converting the analog input signal to a sawtooth signal having a height and width. Then, the level of the sawtooth signal is compared to a voltage level to establish a pulse width of an emitter current. The emitter current is thus controlled by a pulse width modulation approach. In another embodiment, the current control circuit traps a column voltage on a parasitic capacitance. The trapped voltage then controls the gate of a transistor to control current flow from the emitter set to ground.

15. 发明授权

US5778007A Method and circuit for transferring data with dynamic parity generation and checking scheme in multi-port DRAM 失效
标题翻译：在多端口DRAM中使用动态奇偶校验生成和检查方案传输数据的方法和电路
公开(公告)号：US5778007A
公开(公告)日：1998-07-07
申请号：US814661
申请日：1997-03-11
申请人： Mark Thomann , Huy Thanh Vo , Glen E. Hush
发明人： Mark Thomann , Huy Thanh Vo , Glen E. Hush
IPC分类号： H04Q3/00 , H04L12/56 , H04Q11/04 , G11C29/00
CPC分类号： H04L12/5601 , H04L49/108 , H04L49/405 , H04L2012/5627 , H04L2012/5652 , H04L2012/5681
摘要： An ATM switch including a multi-port memory is described. The multi-port memory having a dynamic random access memory (DRAM) and a plurality of input and output serial access memories (SAMs). Efficient, flexible transfer circuits and methods are described for transferring ATM data between the SAMs and the DRAM. The transfer circuits and methods include helper flip/flops to latch ATM data for editing prior to storage in the DRAM. Editing of ATM data transferred from the DRAM is also described. Dynamic parity generation and checking is described to detect errors induced during switching.
摘要翻译：描述包括多端口存储器的ATM交换机。具有动态随机存取存储器（DRAM）和多个输入和输出串行存取存储器（SAM）的多端口存储器。描述了用于在SAM和DRAM之间传送ATM数据的高效，灵活的传送电路和方法。传输电路和方法包括辅助触发器，以在存储在DRAM之前锁存ATM数据进行编辑。还描述了从DRAM传送的ATM数据的编辑。描述动态奇偶校验生成和检查以检测切换期间引起的错误。

16. 发明授权

US5719890A Method and circuit for transferring data with dynamic parity generation and checking scheme in multi-port DRAM 失效
公开(公告)号：US5719890A
公开(公告)日：1998-02-17
申请号：US456520
申请日：1995-06-01
申请人： Mark Thomman , Huy Thanh Vo , Glen E. Hush
发明人： Mark Thomman , Huy Thanh Vo , Glen E. Hush
IPC分类号： H04Q3/00 , H04L12/56 , H04Q11/04 , G11C29/00
CPC分类号： H04L12/5601 , H04L49/108 , H04L49/405 , H04L2012/5627 , H04L2012/5652 , H04L2012/5681
摘要： An ATM switch including a multi-port memory is described. The multi-port memory having a dynamic random access memory (DRAM) and a plurality of input and output serial access memories (SAMs). Efficient, flexible transfer circuits and methods are described for transferring ATM data between the SAMs and the DRAM. The transfer circuits and methods include helper flip/flops to latch ATM data for editing prior to storage in the DRAM. Editing of ATM data transferred from the DRAM is also described. Dynamic parity generation and checking is described to detect errors induced during switching.

17. 发明授权

US5717647A Expandable data width sam for a multiport ram 失效
标题翻译：多端口RAM的可扩展数据宽度sam
公开(公告)号：US5717647A
公开(公告)日：1998-02-10
申请号：US802724
申请日：1997-02-20
申请人： Glen E. Hush , Mark R. Thomann
发明人： Glen E. Hush , Mark R. Thomann
IPC分类号： G11C11/401 , G11C7/10 , H04L12/56 , H04Q11/04 , G11C8/00
CPC分类号： H04L12/5601 , G11C7/1075 , H04L49/108 , H04Q11/0478 , H04L2012/5681
摘要： A multiport memory is described which includes a random access memory (RAM) and serial access memories (SAMs). The multiport memory is well suited for storing asynchronous transfer mode (ATM) data cells. Control circuitry is provided to allow the multiport memory to be easily configured for operating at different input data rates. This is accomplished by configuring several of the SAMs to store a portion of an input ATM cell on an input clock cycle. The full ATM cell is stored in less clock cycles and can be transferred from the SAMs to the RAM in a single transfer cycle.
摘要翻译：描述了包括随机存取存储器（RAM）和串行存取存储器（SAM））的多端口存储器。多端口存储器非常适用于存储异步传输模式（ATM）数据单元。提供控制电路以允许容易地配置多端口存储器，以便以不同的输入数据速率进行操作。这通过配置几个SAM来在输入时钟周期上存储输入ATM信元的一部分来实现。完整的ATM信元以更少的时钟周期存储，并且可以在单个传输周期内从SAM传输到RAM。

18. 发明授权

US5656892A Field emission display having emitter control with current sensing feedback 失效
标题翻译：具有发射极控制的场发射显示电流检测反馈
公开(公告)号：US5656892A
公开(公告)日：1997-08-12
申请号：US559912
申请日：1995-11-17
申请人： David A. Zimlich , Glen E. Hush
发明人： David A. Zimlich , Glen E. Hush
IPC分类号： G09G3/22 , H05B41/392 , H05B37/02 , H01J19/24
CPC分类号： G09G3/22 , H05B41/3921 , G09G2320/02 , H01J2201/30403 , H01J2329/00
摘要： A field emission display includes an emitter driving circuit for providing current to emitters in the display. The emitter driving circuit includes a current mirror to monitor actual current to each pixel in the array. The actual current is then compared to a reference current derived from an image signal based upon an expected current draw of the emitter to produce an error signal. The error signal is fed back to the input of the emitter driver circuit and the emitter driver circuit produces a corrected emitter current in response. During transitions in the image signal, error detection is briefly disabled to allow the emitter driver circuit to respond to the image signal.
摘要翻译：场发射显示器包括用于向显示器中的发射器提供电流的发射极驱动电路。发射极驱动电路包括电流镜以监视阵列中每个像素的实际电流。然后将实际电流与基于图像信号的参考电流进行比较，该参考电流基于发射器的预期电流消耗而产生误差信号。误差信号反馈到发射极驱动电路的输入，发射极驱动电路产生响应的校正的发射极电流。在图像信号的转换期间，短暂地禁止错误检测，以允许发射器驱动电路响应图像信号。

19. 发明授权

US5642017A Matrix-addressable flat panel field emission display having only one transistor for pixel control at each row and column intersection 失效
标题翻译：矩阵寻址平板场发射显示器，每个行和列交叉点只有一个晶体管用于像素控制
公开(公告)号：US5642017A
公开(公告)日：1997-06-24
申请号：US284762
申请日：1994-08-02
申请人： Glen E. Hush
发明人： Glen E. Hush
IPC分类号： G09G3/20 , G09G3/22 , H01J17/36 , H05B41/36
CPC分类号： B82Y10/00 , G09G3/22 , G09G2300/0809 , G09G2310/0248 , G09G2310/0259 , G09G2320/0606 , G09G2320/0626 , G09G2320/066 , G09G3/2011 , G09G3/2014 , H01J2201/319
摘要： This invention is a space-efficient pixel control circuit for a field emission flat panel matrix-addressable array display. The invention reduces by one the number of transistors required at the intersection of each row line and column line within the array. In addition, only two lines need be routed through the array (i.e., row and column). The array space saved by increased layout efficiency may be used to increase pixel density within the array. The new space-efficient pixel control circuit has a single transistor in a base electrode grounding path that is directly controlled by a row line. A current-limiting resistor is interposed between the single grounding transistor and a column line to which an inverse video signal is applied. The magnitude of the current through the current-limiting resistor is inversely proportional to the inverse column signal voltage. Thus, pixel brightness is directly proportional to the voltage drop across the current-limiting resistor.
摘要翻译：本发明是用于场发射平板矩阵寻址阵列显示器的节省空间的像素控制电路。本发明将阵列内的每行行和列线的交叉点所需的晶体管数减少一个。另外，只有两条线需要通过阵列（即行和列）路由。通过增加布局效率节省的阵列空间可用于增加阵列内的像素密度。新的节省空间的像素控制电路在基极电极接地路径中具有由行线直接控制的单个晶体管。在单个接地晶体管和施加反向视频信号的列线之间插入限流电阻。通过限流电阻的电流的大小与反向列信号电压成反比。因此，像素亮度与限流电阻两端的压降成正比。

20. 发明授权

US5616991A Flat panel display in which low-voltage row and column address signals control a much higher pixel activation voltage 失效
标题翻译：平板显示器，其中低电压行和列地址信号控制高得多的像素激活电压
公开(公告)号：US5616991A
公开(公告)日：1997-04-01
申请号：US530562
申请日：1995-09-19
申请人： Stephen L. Casper , Glen E. Hush , Thomas W. Voshell
发明人： Stephen L. Casper , Glen E. Hush , Thomas W. Voshell
IPC分类号： G09G3/00 , G09G3/20 , G09G3/22 , H01J31/12 , H05B33/12 , H05B41/36 , H05B41/392
CPC分类号： G09G3/006 , G09G3/22 , H01J31/127 , G09G2300/0809 , G09G2310/0248 , G09G2310/0259 , G09G2320/0606 , G09G2320/0626 , G09G2320/066 , G09G3/2011 , G09G3/2014 , H01J2201/319 , Y10S315/07
摘要： This invention is directed to an improvement of a field emission display architecture in which low-voltage row and column address signals control a much higher pixel activation voltage. Instead of using a pair of series-coupled transistors in the emitter node grounding path as in the original architecture (one of which is gated by a column signal and the other of which is gated by a row signal), only a single transistor is utilized in the emitter node grounding path, thus eliminating an intermediate node between the two transistors that was responsible for unwanted emissions under certain operating conditions. In a preferred embodiment of the invention, a current regulating resistor is placed in the grounding path in series with the primary grounding transistor, with the resistor being directly coupled to ground. Additionally, for the preferred embodiment of the invention, the gate of the grounding transistor is coupled via a second field-effect transistor to either a row signal or a column signal. In the case where the gate of the first transistor is coupled to a row signal, the gate of the second transistor is coupled to a column signal. Likewise, where the gate of the first transistor is coupled to a column signal, the gate of the second transistor is coupled to a row signal. Numerous other equivalent circuits are possible, and several examples of such equivalent circuits are depicted in this disclosure.
摘要翻译：本发明涉及一种场致发射显示结构的改进，其中低电压行和列地址信号控制高得多的像素激活电压。不像原始架构（其中之一由列信号门控，另一个由行信号门控）在发射极节点接地路径中使用一对串联耦合晶体管，而是仅使用单个晶体管在发射极节点接地路径中，从而消除了在某些工作条件下负责无用发射的两个晶体管之间的中间节点。在本发明的优选实施例中，电流调节电阻器被放置在与主接地晶体管串联的接地路径中，电阻器直接耦合到地。此外，对于本发明的优选实施例，接地晶体管的栅极经由第二场效应晶体管耦合到行信号或列信号。在第一晶体管的栅极耦合到行信号的情况下，第二晶体管的栅极耦合到列信号。类似地，在第一晶体管的栅极耦合到列信号的情况下，第二晶体管的栅极耦合到行信号。许多其他等效电路是可能的，并且在本公开中描述了这些等效电路的几个示例。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式