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11. 发明授权

US07282425B2 Structure and method of integrating compound and elemental semiconductors for high-performance CMOS 失效
标题翻译：化合物和元素半导体用于高性能CMOS的结构和方法
公开(公告)号：US07282425B2
公开(公告)日：2007-10-16
申请号：US11046912
申请日：2005-01-31
申请人： Steven John Koester , Devendra Kumar Sadana , Ghavam G. Shahidi
发明人： Steven John Koester , Devendra Kumar Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/823807 , H01L21/02002 , H01L21/76254 , H01L21/76256 , H01L21/8258 , H01L21/84 , H01L27/1203
摘要： A method for fabricating a semiconductor substrate includes epitaxially growing an elemental semiconductor layer on a compound semiconductor substrate. An insulating layer is deposited on top of the elemental semiconductor layer, so as to form a first substrate. The first substrate is wafer bonded onto a monocrystalline Si substrate, such that the insulating layer bonds with the monocrystalline Si substrate. A semiconductor device includes a monocrystalline substrate, and a dielectric layer formed on the monocrystalline substrate. A semiconductor compound is formed on the dielectric layer and an elemental semiconductor material formed in proximity of the semiconductor compound and lattice-matched to the semiconductor compound.
摘要翻译：制造半导体衬底的方法包括在化合物半导体衬底上外延生长元素半导体层。绝缘层沉积在元素半导体层的顶部上，以形成第一衬底。第一衬底被晶片结合到单晶Si衬底上，使得绝缘层与单晶Si衬底结合。半导体器件包括单晶衬底和形成在单晶衬底上的电介质层。在介电层上形成半导体化合物，在半导体化合物附近形成与半导体化合物晶格匹配的元素半导体材料。

12. 发明授权

US06784072B2 Control of buried oxide in SIMOX 有权
标题翻译：在SIMOX中控制埋氧化物
公开(公告)号：US06784072B2
公开(公告)日：2004-08-31
申请号：US10200822
申请日：2002-07-22
申请人： Stephen Richard Fox , Neena Garg , Kenneth John Giewont , Junedong Lee , Siegfried Lutz Maurer , Dan Moy , Maurice Heathcote Norcott , Devendra Kumar Sadana
发明人： Stephen Richard Fox , Neena Garg , Kenneth John Giewont , Junedong Lee , Siegfried Lutz Maurer , Dan Moy , Maurice Heathcote Norcott , Devendra Kumar Sadana
IPC分类号： H01L2176
CPC分类号： H01L21/76243
摘要： A method for forming a semiconductor-on-insulator (SOI) substrate is described incorporating the steps of heating a substrate, implanting oxygen into a heated substrate, cooling the substrate, implanting into a cooled substrate and annealing. The steps of implanting may be at several energies to provide a plurality of depths and corresponding buried damaged regions. Prior to implanting, the step of cleaning the substrate surface and/or forming a patterned mask thereon may be performed. The invention overcomes the problem of raising the quality of buried oxide and its properties such as surface roughness, uniform thickness and breakdown voltage Vbd.
摘要翻译：描述了一种用于形成绝缘体上半导体（SOI）衬底的方法，其包括加热衬底，将氧注入加热衬底，冷却衬底，注入冷却衬底和退火的步骤。植入的步骤可以是几种能量以提供多个深度和相应的埋入损伤区域。在植入之前，可以执行清洁衬底表面和/或在其上形成图案化掩模的步骤。本发明克服了提高掩埋氧化物质量及其性能如表面粗糙度，均匀厚度和击穿电压Vbd的问题。

13. 发明授权

US06259137B1 Defect induced buried oxide (DIBOX) for throughput SOI 失效
标题翻译：缺陷诱导埋氧（DIBOX）用于吞吐量SOI
公开(公告)号：US06259137B1
公开(公告)日：2001-07-10
申请号：US09264973
申请日：1999-03-09
申请人： Devendra Kumar Sadana , Joel P. de Souza
发明人： Devendra Kumar Sadana , Joel P. de Souza
IPC分类号： H01L2900
CPC分类号： H01L21/26533 , H01L21/2654 , H01L21/76243
摘要： A method of fabricating a defect induced buried oxide (DIBOX) region in a semiconductor substrate utilizing a first low energy implantation step to create a stable defect region; a second low energy implantation step to create an amorphous layer adjacent to the stable defect region; oxidation and, optionally, annealing, is provided. Silicon-on-insulator (SOI) materials comprising said semiconductor substrate having said DIBOX is also provided herein.
摘要翻译：利用第一低能量注入步骤在半导体衬底中制造缺陷诱导的掩埋氧化物（DIBOX）区域以产生稳定的缺陷区域的方法; 第二低能量注入步骤，以产生邻近所述稳定缺陷区域的非晶层; 提供氧化和任选的退火。也提供了包含具有所述DIBOX的所述半导体衬底的绝缘体上硅（SOI）材料。

14. 发明授权

US06204546B1 Silicon-on-insulator substrates using low dose implantation 失效
标题翻译：使用低剂量注入的绝缘体上硅衬底
公开(公告)号：US06204546B1
公开(公告)日：2001-03-20
申请号：US09312217
申请日：1999-05-14
申请人： Peter Roitman , Devendra Kumar Sadana
发明人： Peter Roitman , Devendra Kumar Sadana
IPC分类号： H01L2900
CPC分类号： H01L21/26533 , H01L21/76243
摘要： An SOI substrate and method of forming is described incorporating the steps of implanting oxygen under two conditions and performing two high temperature anneals at temperatures above 1250° C. and above 1300° C., respectively, at two respective oxygen concentrations. The invention overcomes the problem of high SOI substrate fabrication cost due to ion implant time and of getting high quality buried oxide (BOX) layers below a thin layer of single crystal silicon.
摘要翻译：描述SOI衬底和形成方法，其包括在两个条件下注入氧气并在两个相应的氧浓度下分别在高于1250℃和高于1300℃的温度下进行两个高温退火的步骤。本发明克服了由于离子注入时间导致的高SOI衬底制造成本以及在单晶硅薄层之下获得高质量埋藏氧化物（BOX）层的问题。

15. 发明授权

US07504311B2 Structure and method of integrating compound and elemental semiconductors for high-performance CMOS 有权
标题翻译：化合物和元素半导体用于高性能CMOS的结构和方法
公开(公告)号：US07504311B2
公开(公告)日：2009-03-17
申请号：US11762376
申请日：2007-06-13
申请人： Steven John Koester , Devendra Kumar Sadana , Ghavam G. Shahidi
发明人： Steven John Koester , Devendra Kumar Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/84
CPC分类号： H01L21/823807 , H01L21/02002 , H01L21/76254 , H01L21/76256 , H01L21/8258 , H01L21/84 , H01L27/1203
摘要： A method for fabricating a semiconductor substrate includes epitaxially growing an elemental semiconductor layer on a compound semiconductor substrate. An insulating layer is deposited on top of the elemental semiconductor layer, so as to form a first substrate. The first substrate is wafer bonded onto a monocrystalline Si substrate, such that the insulating layer bonds with the monocrystalline Si substrate. A semiconductor device includes a monocrystalline substrate, and a dielectric layer formed on the monocrystalline substrate. A semiconductor compound is formed on the dielectric layer and an elemental semiconductor material formed in proximity of the semiconductor compound and lattice-matched to the semiconductor compound.
摘要翻译：制造半导体衬底的方法包括在化合物半导体衬底上外延生长元素半导体层。绝缘层沉积在元素半导体层的顶部上，以形成第一衬底。第一衬底被晶片结合到单晶Si衬底上，使得绝缘层与单晶Si衬底结合。半导体器件包括单晶衬底和形成在单晶衬底上的电介质层。在介电层上形成半导体化合物，在半导体化合物附近形成与半导体化合物晶格匹配的元素半导体材料。

16. 发明授权

US07492008B2 Control of buried oxide in SIMOX 有权
标题翻译：在SIMOX中控制埋氧化物
公开(公告)号：US07492008B2
公开(公告)日：2009-02-17
申请号：US10896812
申请日：2004-07-22
申请人： Stephen Richard Fox , Neena Garg , Kenneth John Giewont , Junedong Lee , Siegfried Lutz Maurer , Dan Moy , Maurice Heathcote Norcott , Devendra Kumar Sadana
发明人： Stephen Richard Fox , Neena Garg , Kenneth John Giewont , Junedong Lee , Siegfried Lutz Maurer , Dan Moy , Maurice Heathcote Norcott , Devendra Kumar Sadana
IPC分类号： H01L21/336
CPC分类号： H01L21/76243
摘要： A method for forming a semiconductor-on-insulator (SOI) substrate is described incorporating the steps of heating a substrate, implanting oxygen into a heated substrate, cooling the substrate, implanting into a cooled substrate and annealing. The steps of implanting may be at several energies to provide a plurality of depths and corresponding buried damaged regions. Prior to implanting, the step of cleaning the substrate surface and/or forming a patterned mask thereon may be performed. The invention overcomes the problem of raising the quality of buried oxide and its properties such as surface roughness, uniform thickness and breakdown voltage Vbd.
摘要翻译：描述了一种用于形成绝缘体上半导体（SOI）衬底的方法，其包括加热衬底，将氧注入加热衬底，冷却衬底，注入冷却衬底和退火的步骤。植入的步骤可以是几种能量以提供多个深度和相应的埋入损伤区域。在植入之前，可以执行清洁衬底表面和/或在其上形成图案化掩模的步骤。本发明克服了提高掩埋氧化物质量及其性能如表面粗糙度，均匀厚度和击穿电压Vbd的问题。

17. 发明授权

US06756257B2 Patterned SOI regions on semiconductor chips 有权
标题翻译：半导体芯片上的图案化SOI区域
公开(公告)号：US06756257B2
公开(公告)日：2004-06-29
申请号：US09975435
申请日：2001-10-11
申请人： Bijan Davari , Devendra Kumar Sadana , Ghavam G. Shahidi , Sandip Tiwari
发明人： Bijan Davari , Devendra Kumar Sadana , Ghavam G. Shahidi , Sandip Tiwari
IPC分类号： H01L2100
CPC分类号： H01L27/10894 , H01L21/26533 , H01L21/266 , H01L21/76243 , H01L21/76264 , H01L21/76267 , H01L21/76286 , H01L21/84 , H01L27/10861 , H01L27/1087 , H01L27/10897 , H01L27/1203 , H01L29/945 , Y10S257/904
摘要： A method and structure for forming patterned SOI regions and bulk regions is described wherein a silicon containing layer over an insulator may have a plurality of selected thickness' and wherein bulk regions may be suitable to form DRAM's and SOI regions may be suitable to form merged logic such as CMOS. Ion implantation of oxygen is used to formed patterned buried oxide layers at selected depths and mask edges may be shaped to form stepped oxide regions from one depth to another. Trenches may be formed through buried oxide end regions to remove high concentrations of dislocations in single crystal silicon containing substrates. The invention overcomes the problem of forming DRAM with a storage capacitor formed with a deep, trench in bulk Si while forming merged logic regions on SOI.
摘要翻译：描述了用于形成图案化SOI区域和体积区域的方法和结构，其中绝缘体上的含硅层可以具有多个选定的厚度，并且其中体积区域可适于形成DRAM，并且SOI区域可适合于形成合并逻辑如CMOS。氧离子注入用于在所选择的深度形成图案化的掩埋氧化物层，并且掩模边缘可被成形为从一个深度到另一个深度形成阶梯状氧化物区域。可以通过掩埋氧化物端部区域形成沟槽，以去除含有单晶硅的衬底中的高浓度位错。本发明克服了形成DRAM的存储电容器形成的体积为Si的深沟槽，同时在SOI上形成合并的逻辑区域的问题。

18. 发明授权

US06222253B1 Buried oxide layer in silicon 有权
标题翻译：硅中埋置氧化物层
公开(公告)号：US06222253B1
公开(公告)日：2001-04-24
申请号：US09531628
申请日：2000-03-21
申请人： Devendra Kumar Sadana , Orin Wayne Holland
发明人： Devendra Kumar Sadana , Orin Wayne Holland
IPC分类号： H01L2930
CPC分类号： H01L21/76243
摘要： A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200° C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.
摘要翻译：描述了一种用于形成上绝缘体的工艺，其包括以下步骤：在升高的温度下将氧离子注入到硅衬底中，以较低的剂量离子注入低于200℃的氧气以形成非晶硅层;以及退火步骤以单独形成有缺陷的单晶硅和多晶硅或多晶硅的混合物，然后形成来自非晶硅层的氧化硅，以在硅衬底的表面下方形成连续的氧化硅层，以提供分离的表面硅层。本发明克服了形成不连续掩埋氧化层的氧化硅的孤立孤岛的问题。

19. 发明授权

US06087242A Method to improve commercial bonded SOI material 失效
标题翻译：改善商业粘合SOI材料的方法
公开(公告)号：US06087242A
公开(公告)日：2000-07-11
申请号：US31289
申请日：1998-02-26
申请人： Humphrey John Maris , Devendra Kumar Sadana
发明人： Humphrey John Maris , Devendra Kumar Sadana
IPC分类号： H01L21/20 , H01L21/762 , H01L21/76
CPC分类号： H01L21/76251 , H01L21/2007
摘要： A method of improving the bonding characteristics of a previously bonded silicon on insulator (SOI) structure is provided. The improvement in the bonding characteristics is achieved in the present invention by, optionally, forming an oxide cap layer on the silicon surface of the bonded SOI structure and then annealing either the uncapped or oxide capped structure in a slightly oxidizing ambient at temperatures greater than 1200.degree. C. Also provided herein is a method for detecting the bonding characteristics of previously bonded SOI structures. According to this aspect of the present invention, a pico-second laser pulse technique is employed to determine the bonding imperfections of previously bonded SOI structures.
摘要翻译：提供了改善先前结合的绝缘体上硅（SOI）结构的结合特性的方法。在本发明中，通过任意地在接合的SOI结构的硅表面上形成氧化物覆盖层，然后在温度大于1200℃的轻微氧化环境中退火未封端或氧化物封端的结构，在本发明中实现了接合特性的改善此处也提供了用于检测先前结合的SOI结构的结合特性的方法。根据本发明的该方面，采用微秒级激光脉冲技术来确定先前结合的SOI结构的接合缺陷。

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