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11. 发明申请

US20130063857A1 MEMS VARIABLE CAPACITOR AND METHOD FOR DRIVING THE SAME 有权
标题翻译： MEMS可变电容器及其驱动方法
公开(公告)号：US20130063857A1
公开(公告)日：2013-03-14
申请号：US13698893
申请日：2011-05-27
申请人： Chang Wook Kim , Dong Chan Park , Ju Young Song , Sang Hun Lee , Sung Bae Cho , Hyun Ho Yang , Jun Bo Yoon , Dong Hoon Choi , Chang Hoon Han
发明人： Chang Wook Kim , Dong Chan Park , Ju Young Song , Sang Hun Lee , Sung Bae Cho , Hyun Ho Yang , Jun Bo Yoon , Dong Hoon Choi , Chang Hoon Han
IPC分类号： H01G7/00
CPC分类号： H01G5/16
摘要： Disclosed herein is an MEMS variable capacitor and its driving method, the MEMS variable capacitor including, a first electrode, a second electrode floating over the first electrode upper part, a fixed electrode separated at the second electrode side surface, and a drifting electrode placed between the second electrode and the fixed electrode, connected to the second electrode, and physically contacting the fixed electrode by a voltage applied to the fixed electrode.
摘要翻译：这里公开了一种MEMS可变电容器及其驱动方法，所述MEMS可变电容器包括：第一电极，浮在第一电极上部的第二电极，在第二电极侧表面分离的固定电极;以及漂移电极，第二电极和固定电极，连接到第二电极，并通过施加到固定电极的电压物理接触固定电极。

12. 发明申请

US20060151865A1 Semiconductor chip stack package having dummy chip 审中-公开
标题翻译：具有虚拟芯片的半导体芯片堆叠封装
公开(公告)号：US20060151865A1
公开(公告)日：2006-07-13
申请号：US11297664
申请日：2005-12-09
申请人： Chang-Hoon Han , Sang-Ho An
发明人： Chang-Hoon Han , Sang-Ho An
IPC分类号： H01L23/02
CPC分类号： H01L25/0657 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/78 , H01L24/85 , H01L25/50 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48464 , H01L2224/48471 , H01L2224/48479 , H01L2224/49175 , H01L2224/73265 , H01L2224/78301 , H01L2224/85186 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2225/06593 , H01L2924/00014 , H01L2924/01006 , H01L2924/01023 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2224/4554
摘要： A chip stack package may have a circuit substrate, a first IC chip provided on the circuit substrate, and a second IC chip provided on the first IC chip. The second IC chip may be larger in size than the first IC chip and have overhang portions that may extend beyond edges of the first IC chip. At least one dummy chip may be provided on the second IC chip and cover the edges of the first IC chip. The dummy chip may include a single chip or a plurality of chips.
摘要翻译：芯片堆叠封装可以具有电路基板，设置在电路基板上的第一IC芯片和设置在第一IC芯片上的第二IC芯片。第二IC芯片的尺寸可以大于第一IC芯片，并且具有可能延伸超过第一IC芯片边缘的突出部分。可以在第二IC芯片上设置至少一个虚设芯片并覆盖第一IC芯片的边缘。虚拟芯片可以包括单个芯片或多个芯片。

13. 发明授权

US08664780B2 Semiconductor package having plural semiconductor chips and method of forming the same 有权
标题翻译：具有多个半导体芯片的半导体封装及其形成方法
公开(公告)号：US08664780B2
公开(公告)日：2014-03-04
申请号：US13534212
申请日：2012-06-27
申请人： Chang-Hoon Han , Jin-Ho Kim , Bo-Seong Kim , Yun-Jin Oh
发明人： Chang-Hoon Han , Jin-Ho Kim , Bo-Seong Kim , Yun-Jin Oh
IPC分类号： H01L23/29 , H01L29/40
CPC分类号： H01L23/3135 , H01L21/561 , H01L23/3128 , H01L24/73 , H01L24/97 , H01L25/03 , H01L25/50 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48145 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06562 , H01L2924/15311 , H01L2924/181 , H01L2924/19105 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor package includes a first semiconductor chip mounted to a substrate, a first encapsulant covering the first semiconductor chip and have first to fourth sidewall surfaces, and a chip stack mounted to the substrate and disposed on the first encapsulant. The chip stack includes a plurality of second semiconductor chips. A second encapsulant covers the chip stack. The second encapsulant may cover the first sidewall surface of the first encapsulant and expose the third sidewall surface of the first encapsulant.
摘要翻译：半导体封装包括安装到衬底的第一半导体芯片，覆盖第一半导体芯片并具有第一至第四侧壁表面的第一密封剂和安装到衬底并且设置在第一密封剂上的芯片堆叠。芯片堆叠包括多个第二半导体芯片。第二密封剂覆盖芯片堆叠。第二密封剂可以覆盖第一密封剂的第一侧壁表面并暴露第一密封剂的第三侧壁表面。

14. 发明授权

US08400802B2 Binary content addressable memory 有权
标题翻译：二进制内容可寻址内存
公开(公告)号：US08400802B2
公开(公告)日：2013-03-19
申请号：US12938455
申请日：2010-11-03
申请人： Sang Hoon Hong , Chang Hoon Han , Min Ah Chae
发明人： Sang Hoon Hong , Chang Hoon Han , Min Ah Chae
IPC分类号： G11C15/00
CPC分类号： G11C15/04
摘要： The present invention relates to a binary content addressable memory (CAM), and more particularly, to a binary content addressable memory (CAM) in which the number of transistors constituting the content addressable memory can be reduced to decrease the size of the content addressable memory, thereby increasing the degree of integration and improving power consumption. According to the present invention, since the binary content addressable memory according to the present invention has a smaller number of transistors than those of the conventional binary content addressable memory, a memory can be fabricated in a smaller size, thereby improving the degree of integration as one of most important factors in the memory design. In addition, improvement of the degree of integration contributes to miniaturization and lightweightness of the product in its design. Further, the inventive binary content addressable memory performs its own function using a smaller number of transistors, thereby reducing power consumption.
摘要翻译：二进制内容可寻址存储器（CAM）技术领域本发明涉及一种二进制内容可寻址存储器（CAM），更具体地说，涉及一种二进制内容可寻址存储器（CAM），其中可以减少构成内容可寻址存储器的晶体管的数量，以减小内容可寻址存储器，从而增加集成度并提高功耗。根据本发明，由于根据本发明的二进制内容可寻址存储器具有比常规二进制内容可寻址存储器少的晶体管数量，所以可以制造更小尺寸的存储器，从而提高集成度记忆体设计中最重要的因素之一。此外，集成度的提高有助于产品在其设计中的小型化和轻量化。此外，本发明的二进制内容可寻址存储器使用较少数量的晶体管执行其自己的功能，从而降低功耗。

15. 发明申请

US20110103120A1 BINRAY CONTENT ADDRESSABLE MEMORY 有权
标题翻译： BINRAY内容可寻址记忆
公开(公告)号：US20110103120A1
公开(公告)日：2011-05-05
申请号：US12938455
申请日：2010-11-03
申请人： Sang Hoon HONG , Chang Hoon HAN , Min Ah CHAE
发明人： Sang Hoon HONG , Chang Hoon HAN , Min Ah CHAE
IPC分类号： G11C15/04
CPC分类号： G11C15/04
摘要： The present invention relates to a binary content addressable memory (CAM), and more particularly, to a binary content addressable memory (CAM) in which the number of transistors constituting the content addressable memory can be reduced to decrease the size of the content addressable memory, thereby increasing the degree of integration and improving power consumption. According to the present invention, since the binary content addressable memory according to the present invention has a smaller number of transistors than those of the conventional binary content addressable memory, a memory can be fabricated in a smaller size, thereby improving the degree of integration as one of most important factors in the memory design. In addition, improvement of the degree of integration contributes to miniaturization and lightweightness of the product in its design. Further, the inventive binary content addressable memory performs its own function using a smaller number of transistors, thereby reducing power consumption.
摘要翻译：二进制内容可寻址存储器（CAM）技术领域本发明涉及一种二进制内容可寻址存储器（CAM），更具体地说，涉及一种二进制内容可寻址存储器（CAM），其中可以减少构成内容可寻址存储器的晶体管的数量，以减小内容可寻址存储器，从而增加集成度并提高功耗。根据本发明，由于根据本发明的二进制内容可寻址存储器具有比常规二进制内容可寻址存储器少的晶体管数量，所以可以制造更小尺寸的存储器，从而提高集成度记忆体设计中最重要的因素之一。此外，集成度的提高有助于产品在其设计中的小型化和轻量化。此外，本发明的二进制内容可寻址存储器使用较少数量的晶体管执行其自己的功能，从而降低功耗。

16. 发明申请

US20100237484A1 Semiconductor package 有权
标题翻译：半导体封装
公开(公告)号：US20100237484A1
公开(公告)日：2010-09-23
申请号：US12659391
申请日：2010-03-08
申请人： Chang-Hoon Han , Jiho Kim
发明人： Chang-Hoon Han , Jiho Kim
IPC分类号： H01L25/16 , H01L23/50
CPC分类号： H01L23/3128 , H01L21/565 , H01L23/481 , H01L23/525 , H01L24/16 , H01L24/29 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/91 , H01L25/0657 , H01L25/105 , H01L25/18 , H01L2224/0401 , H01L2224/0557 , H01L2224/13099 , H01L2224/16145 , H01L2224/16225 , H01L2224/32014 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73207 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/078 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Provided is a semiconductor package including a first package and a second package. The first package includes a first substrate having a first front side and a first back side opposing the first front side. The first package further includes a first semiconductor chip on the first front side and an external connection member on the first semiconductor chip. The external connection member may be configured to electrically connect the first semiconductor chip to an external device. The second package includes a second substrate having a second back side facing the first back side of the first substrate and a second front surface opposing the second back side. The second package includes a second semiconductor chip on the second front side. The semiconductor package further includes an internal connection member between the first back side and the second back side to electrically connect the first package to the second package.
摘要翻译：提供了包括第一封装和第二封装的半导体封装。第一包装包括具有第一前侧和与第一前侧相对的第一后侧的第一基板。第一封装还包括第一前侧上的第一半导体芯片和第一半导体芯片上的外部连接构件。外部连接构件可以被配置为将第一半导体芯片电连接到外部设备。第二包装包括具有面向第一基板的第一后侧的第二后侧和与第二背面相对的第二前表面的第二基板。第二封装包括在第二正面上的第二半导体芯片。半导体封装还包括在第一背侧和第二后侧之间的内部连接构件，以将第一封装电连接到第二封装。

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