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11. 发明授权

US5112232A Twisted wire jumper electrical interconnector 失效
标题翻译：双绞电线互连器
公开(公告)号：US5112232A
公开(公告)日：1992-05-12
申请号：US657653
申请日：1991-02-15
申请人： Seymour R. Cray , Nicholas J. Krajewski
发明人： Seymour R. Cray , Nicholas J. Krajewski
IPC分类号： H01L21/48 , H01L21/607 , H01R12/58 , H05K3/30 , H05K3/32 , H05K3/36
CPC分类号： H01L24/11 , H01L21/4853 , H01R12/523 , H05K3/308 , H05K3/328 , H05K3/36 , H01L2224/1134 , H01L2224/13099 , H01L2224/13144 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/4943 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06589 , H01L2225/06593 , H01L2225/06596 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/3011 , H05K2201/096 , H05K2201/1059 , H05K2201/10825 , H05K2201/10909 , H05K2201/10946 , H05K2203/0495 , H05K3/368
摘要： A method and apparatus for interconnecting electronic circuit boards through the use of twisted wire jumpers which are formed from multifilament wire and which have enlarged bird cages formed along the pins. The pins are drawn through a stack of circuit boards to position the cages in contact with interconnection aperture located in the printed circuit boards. The frictional engagement of the cages in the apertures provides both electrical interconnection of, and mechanical coupling between the printed circuit boards.This application is a division of co pending patent application Her. No. 07/347,507, filed May 4, 1989, now U.S. Pat. No. 5,014,419, issued May 14, 1991, U.S. Pat. application Ser. No. 07/347,507 was a continuation-in-part of application Ser. No. 07/053,142, filed May 21, 1989, now U.S. Pat. No. 5,054,192, issued Oct. 8, 1991. All of these applications and patents are assigned to the same assignee.
摘要翻译：一种用于通过使用由多丝线形成并且具有沿着销形成的扩大的鸟笼的双绞线跳线来互连电子电路板的方法和装置。引脚穿过电路板堆叠以将网格定位成与位于印刷电路板中的互连孔接触。保持架在孔中的摩擦接合提供印刷电路板之间的电互连和机械耦合。这个应用是她的共同未决专利申请的一个部门。 1989年5月4日提交的现在的美国专利No.07 / 347,507。 1991年5月14日授权的美国专利5,014,419。应用程序第07 / 347,507号是应用程序Ser的部分延续。 1989年5月21日提交的现在的美国专利No.07 / 053,142。 1991年10月8日授权的第5,054,192号。所有这些申请和专利都转让给同一受让人。

12. 发明授权

US5014419A Twisted wire jumper electrical interconnector and method of making 失效
标题翻译：双绞线电连接器及其制造方法
公开(公告)号：US5014419A
公开(公告)日：1991-05-14
申请号：US347507
申请日：1989-05-04
申请人： Seymour R. Cray , Nicholas J. Krajewski
发明人： Seymour R. Cray , Nicholas J. Krajewski
IPC分类号： H01L21/48 , H01L21/607 , H01R11/01 , H01R12/52 , H01R43/16 , H05K3/30 , H05K3/32 , H05K3/36
CPC分类号： H01L24/11 , H01L21/4853 , H01R12/523 , H05K3/308 , H05K3/328 , H05K3/36 , H01L2224/1134 , H01L2224/13099 , H01L2224/13144 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/4943 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06589 , H01L2225/06593 , H01L2225/06596 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12033 , H01L2924/12042 , H01L2924/14 , H01L2924/3011 , H05K2201/096 , H05K2201/1059 , H05K2201/10825 , H05K2201/10909 , H05K2201/10946 , H05K2203/0495 , H05K3/368 , Y10T29/49126 , Y10T29/4914 , Y10T29/49144 , Y10T29/49153
摘要： A method and apparatus for interconnecting electronic circuit boards through the use of twisted wire jumpers which are formed from multifilament wire and which have enlarged bird cages formed along the pins. The pins are drawn through a stack of circuit boards to position the cages in contact with interconnection apertures located in the printed circuit boards. The frictional engagement of the cages in the apertures provides both electrical inter connection of, and mechanical coupling between the printed circuit boards.
摘要翻译：一种用于通过使用由多丝线形成并且具有沿着销形成的扩大的鸟笼的双绞线跳线来互连电子电路板的方法和装置。引脚穿过电路板堆叠，以将网格定位成与位于印刷电路板中的互连孔接触。保持架在孔中的摩擦接合提供印刷电路板之间的电连接和机械耦合。

13. 发明授权

US5455530A Duty cycle control circuit and associated method 失效
标题翻译：占空比控制电路及相关方法
公开(公告)号：US5455530A
公开(公告)日：1995-10-03
申请号：US208946
申请日：1994-03-09
申请人： Jon M. Huppenthal , Lee A. Burton
发明人： Jon M. Huppenthal , Lee A. Burton
IPC分类号： H03K7/08 , H03K3/017
CPC分类号： H03K7/08
摘要： A duty cycle control circuit, and an associated method, generates an output clock signal having a duty cycle which differs by a desired amount with the duty cycle of an input clock signal. Offset bias signal circuitry generates an offset bias signal which offsets a copy clock signal and an inverted copy clock signal relative to one another by a selected offset bias. The duty cycle of the output clock signal differs with the duty cycle of the input clock signal by an amount which is related to the amplitude of the offset bias signal.
摘要翻译：占空比控制电路和相关联的方法产生具有与输入时钟信号的占空比相差期望量的占空比的输出时钟信号。偏移偏置信号电路产生偏移偏置信号，该偏移偏置信号通过选择的偏移偏移相对于彼此偏移复制时钟信号和反相复制时钟信号。输出时钟信号的占空比随着输入时钟信号的占空比与偏移偏置信号的幅度有关的量而不同。

14. 发明授权

US5067382A Method and apparatus for notching a lead wire attached to an IC chip to facilitate severing the wire 失效
标题翻译：用于切割附接到IC芯片的引线以便于切断线的方法和装置
公开(公告)号：US5067382A
公开(公告)日：1991-11-26
申请号：US608258
申请日：1990-11-02
申请人： Eckehart Zimmerman , Thomas A. Thorson
发明人： Eckehart Zimmerman , Thomas A. Thorson
IPC分类号： B23D31/00 , H01L21/00
CPC分类号： H01L24/85 , B23D31/002 , H01L24/78 , H01L2224/45015 , H01L2224/45144 , H01L2224/78 , H01L2224/85205 , H01L24/45 , H01L2924/00014 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/0106 , H01L2924/01079 , H01L2924/01082 , H01L2924/10329 , H01L2924/14 , H01L2924/30105 , Y10T29/515 , Y10T83/0333 , Y10T83/0341 , Y10T83/8785 , Y10T83/9444
摘要： A method and apparatus for notching a wire so that it can be severed at the notched location by applying an axial force thereto. The apparatus includes a linearly reciprocal mechanism adapted to move forwardly, placing a pair of cutting blades in straddling relationship with the wire and includes an actuating mechanism for laterally reciprocating the cutting blades to form notches in opposite sides of the wire before retracting the cutting blades from the straddling relationship with the wire. The method of the invention includes the steps of moving a pair of cutting blades into straddling relationship with a wire, reciprocally moving the cutting blades into and out of cutting engagement with the wire and subsequently retracting the cutting blades from the straddling relationship with the wire.
摘要翻译：一种用于切割电线的方法和装置，使得其可以通过向其施加轴向力而在切口处切断。该设备包括适于向前移动的线性往复机构，将一对切割刀片放置成与线材成跨度关系，并且包括用于在将切割刀片退回之前使切割刀片横向往复运动以形成切口的相对侧面的切口的致动机构与电线的跨越关系。本发明的方法包括以下步骤：将一对切割刀片与线材成跨度关系，将切割刀片往复移动并移出与线材的切割接合，并且随后将切割刀片与线材的跨接关系缩回。

15. 发明授权

US5054192A Lead bonding of chips to circuit boards and circuit boards to circuit boards 失效
标题翻译：将电路板与电路板导线连接到电路板
公开(公告)号：US5054192A
公开(公告)日：1991-10-08
申请号：US53142
申请日：1987-05-21
申请人： Seymour R. Cray , Nicholas J. Krajewski
发明人： Seymour R. Cray , Nicholas J. Krajewski
IPC分类号： H01L21/48 , H01L21/60 , H01L21/607 , H01L23/50 , H01R12/52 , H05K3/30 , H05K3/32 , H05K3/36
CPC分类号： H01L24/11 , H01L21/4853 , H01R12/523 , H05K3/308 , H05K3/328 , H01L2224/1134 , H01L2224/13099 , H01L2224/13144 , H01L2224/45144 , H01L2224/4943 , H01L2224/78301 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06589 , H01L2225/06593 , H01L2225/06596 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12033 , H01L2924/14 , H05K2201/096 , H05K2201/1059 , H05K2201/10825 , H05K2201/10909 , H05K2201/10946 , H05K2203/0495 , H05K3/368 , Y10T29/49135 , Y10T29/4914 , Y10T29/49153
摘要： A method and apparatus for interconnecting electronic circuits using nearly pure soft annealed gold mechanically compressed within through-plated holes. The invention has its application in attaching integrated circuit dice directly to circuit boards by ball bonding gold wires to the bonding pads of the integrated circuit dice in a substantially perpendicular relationship to the surfaces of the dice and inserting the gold leads into through-plated holes of circuit boards which provide an electrical and a mechanical connection once the leads are compressed within the through-plated holes. The present invention also finds its application in the interconnection of sandwiched circuit board assemblies where soft gold lead wires are inserted into axially aligned through-plated holes of the circuit boards and compressed so that the hold lead wires compress and buckle within the through-plated holes, forming an electrical connection between the circuit boards.
摘要翻译：一种使用在纯通孔内机械压缩的近纯软质退火金的电子电路互连的方法和装置。本发明的应用是将集成电路芯片直接连接到电路板上，通过将金线以与芯片表面基本垂直的方式与集成电路芯片的焊盘焊接在一起，将金线插入到通孔的通孔中一旦导线在穿透孔内被压缩就提供电气和机械连接的电路板。本发明还应用于夹层电路板组件的互连中，其中软金导线插入到电路板的轴向对齐的通孔中并被压缩，使得保持引线在穿通孔内压缩和弯曲在电路板之间形成电连接。

16. 发明授权

US5045975A Three dimensionally interconnected module assembly 失效
标题翻译：三维互连模块组件
公开(公告)号：US5045975A
公开(公告)日：1991-09-03
申请号：US386290
申请日：1989-07-27
申请人： Seymour R. Cray , Nicholas J. Krajewski
发明人： Seymour R. Cray , Nicholas J. Krajewski
IPC分类号： H01L21/48 , H01L21/607 , H05K3/30 , H05K3/32 , H05K3/36
CPC分类号： H01L24/11 , H01L21/4853 , H01R12/523 , H05K3/308 , H05K3/328 , H05K3/36 , H01L2224/1134 , H01L2224/13099 , H01L2224/13144 , H01L2224/45015 , H01L2224/45144 , H01L2224/4943 , H01L2224/78301 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06589 , H01L2225/06593 , H01L2225/06596 , H01L24/45 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01041 , H01L2924/01079 , H01L2924/01082 , H01L2924/01204 , H01L2924/014 , H01L2924/10329 , H01L2924/14 , H05K2201/096 , H05K2201/1059 , H05K2201/10825 , H05K2201/10909 , H05K2201/10946 , H05K2203/0495 , H05K3/368 , Y10S428/901 , Y10T29/49126 , Y10T29/4914
摘要： A method and apparatus for interconnecting electronic circuits using nearly pure soft annealed gold mechanically compressed within through-plated holes. The invention has its application in attaching integrated circuit dice directly to circuit boards by ball bonding gold wires to the bonding pads of the integrated circuit dice in a substantially perpendicular relationship to the surfaces of the disc and inserting the gold leads into through-plated holes of circuit boards which provide an electrical and a mechanical connection once the leads are compressed within the through-plated holes. The present invention also finds its application in the interconnection of sandwiched circuit board assemblies where soft gold lead wires are inserted into axially aligned through-plated holes of the circuit boards and compressed so that the gold lead wires compress and buckle within the through-plated holes, forming an electrical connection between the circuit boards.
摘要翻译：一种使用在纯通孔内机械压缩的近纯软质退火金的电子电路互连的方法和装置。本发明的应用是将集成电路芯片直接连接到电路板上，通过将金线以与盘的表面基本垂直的方式将金线焊接到集成电路芯片的焊盘上，并将金引线插入到通孔的通孔中一旦导线在穿透孔内被压缩就提供电气和机械连接的电路板。本发明还将其应用于夹层电路板组件的互连中，其中软金导线插入到电路板的轴向对齐的通孔中并被压缩，使得金引线在穿透孔内压缩和弯曲在电路板之间形成电连接。

17. 发明授权

US4965863A Gallium arsenide depletion made MESFIT logic cell 失效
标题翻译：砷化镓耗尽使得MESFIT逻辑电池
公开(公告)号：US4965863A
公开(公告)日：1990-10-23
申请号：US104758
申请日：1987-10-02
申请人： Seymour R. Cray
发明人： Seymour R. Cray
IPC分类号： H01L21/8232 , H01L27/06 , H03K19/0185 , H03K19/0952 , H03K19/0956
CPC分类号： H01L27/0605 , H03K19/018535 , H03K19/0956
摘要： A gallium arsenide logic design system is described for designing custom or semi-custom LSI integrated circuits using standard cells from a cell library. D-MESFET transistors and Schottky diodes are used for implementing the cell types in gallium arsenide to produce performance levels of less than 150 pico-second per gate propagation delay. Each integrated circuit die is built from a cell library containing three standard cells. The limitation on the number of standard cells used for logic design allows for fast and efficient turnaround time between logic design and fabrication. A minumum number of masks are required for implementing the custom integrated circuit due to the efficient design of the cell types. The placement and interconnect of the cells on the die are also performed in an efficient manner due to the predefined allowable locations for cell placement and the predefined allowable route channels for the interconnect. A clock amplifier cell is described for the cell library which differentially phase corrects a two-phase clock signal to ensure that the two clock lines are perfectly out of phase at all times. The combination of this strictly controlled two-phase clock with the gallium arsenide cell designs allows digital logic implementations at an LSI level to operate at 1-GHz clock frequencies.
摘要翻译：描述了砷化镓逻辑设计系统，用于使用来自单元库的标准单元来设计定制或半定制的LSI集成电路。 D-MESFET晶体管和肖特基二极管用于实现砷化镓中的电池类型，以产生每栅极传播延迟小于150皮秒的性能水平。每个集成电路管芯由包含三个标准单元的单元库构建。用于逻辑设计的标准单元数量的限制允许在逻辑设计和制造之间快速有效的周转时间。由于电池类型的有效设计，需要最少数量的掩模来实现定制集成电路。由于用于单元布置的预定义的可允许位置和用于互连的预定义的可允许路线通道，芯片上的单元的放置和互连也以有效的方式执行。对于单元库描述时钟放大器单元，其对差分相位校正两相时钟信号，以确保两个时钟线始终完全异相。这种严格控制的两相时钟与砷化镓电池设计的组合允许LSI级别的数字逻辑实现在1 GHz时钟频率下工作。

18. 发明授权

US5491300A Penetrator and flexible circuit assembly for sealed environment 失效
标题翻译：穿刺器和柔性电路组件，用于密封环境
公开(公告)号：US5491300A
公开(公告)日：1996-02-13
申请号：US234253
申请日：1994-04-28
申请人： Jon M. Huppenthal , Candy L. Saunders , Joseph E. Jaramillo
发明人： Jon M. Huppenthal , Candy L. Saunders , Joseph E. Jaramillo
IPC分类号： G06F1/20 , H01R13/52 , H01B17/30 , H05K5/06
CPC分类号： H01R13/5216 , G06F1/20
摘要： A penetrator and flexible circuit apparatus comprises a penetrator housing having a passageway through which at least one elongated flat flexible circuit having a plurality of parallel electrical traces is placed. A retention material substantially occupies the passageway to retain the flexible circuit in the passageway, to establish a hermetic seal of the flexible circuit within the penetrator and to thereby seal the interior of a computer which is cooled by cooling fluid from its exterior environment.
摘要翻译：穿透器和柔性电路装置包括具有通道的穿透器壳体，通过该通道布置具有多个平行电迹线的至少一个细长扁平柔性电路。保持材料基本上占据通道以将柔性电路保持在通道中，以在穿透器内建立柔性电路的气密密封，从而密封由冷却流体从其外部环境冷却的计算机的内部。

19. 发明授权

US5195237A Flying leads for integrated circuits 失效
标题翻译：集成电路飞线
公开(公告)号：US5195237A
公开(公告)日：1993-03-23
申请号：US814067
申请日：1991-12-24
申请人： Seymour R. Cray , Nicholas J. Krajewski
发明人： Seymour R. Cray , Nicholas J. Krajewski
IPC分类号： H01L21/48 , H01L21/607 , H01L23/538 , H01L25/065 , H05K3/30 , H05K3/32 , H05K3/36
CPC分类号： H01L24/11 , H01L21/4853 , H01L23/5384 , H01L23/5385 , H01L25/0655 , H01L25/0657 , H01R12/523 , H05K3/308 , H05K3/328 , H05K3/36 , H01L2224/1134 , H01L2224/13099 , H01L2224/13144 , H01L2224/16 , H01L2224/45015 , H01L2224/45144 , H01L2224/4943 , H01L2224/78301 , H01L2225/06517 , H01L2225/0652 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/06593 , H01L2225/06596 , H01L24/45 , H01L24/49 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01079 , H01L2924/01082 , H01L2924/01204 , H01L2924/014 , H01L2924/10329 , H01L2924/14 , H05K2201/096 , H05K2201/1059 , H05K2201/10825 , H05K2201/10909 , H05K2201/10946 , H05K2203/0495 , H05K3/368 , Y10T29/4914 , Y10T29/49149 , Y10T29/49151 , Y10T29/4979
摘要： A method and apparatus for interconnecting electronic circuits using nearly pure soft annealed gold mechanically compressed within through-plated holes. The invention has its application in attaching integrated circuit dice directly to circuit boards by ball bonding gold wires to the bonding pads of the integrated circuit dice in a substantially perpendicular relationship to the surfaces of the dice and inserting the gold leads into through-plated holes of circuit boards which provide an electrical and a mechanical connection once the leads are compressed within the through-plated holes. The present invention also finds its application in the interconnection of sandwiched circuit board assemblies where soft gold lead wires are inserted into axially aligned through-plated holes of the circuit boards and compressed so that the gold lead wires compress and buckle within the through-plated holes, forming an electrical connection between the circuit boards.
摘要翻译：一种使用在纯通孔内机械压缩的近纯软质退火金的电子电路互连的方法和装置。本发明的应用是将集成电路芯片直接连接到电路板上，通过将金线以与芯片表面基本垂直的方式与集成电路芯片的焊盘焊接在一起，将金线插入到通孔的通孔中一旦导线在穿透孔内被压缩就提供电气和机械连接的电路板。本发明还将其应用于夹层电路板组件的互连中，其中软金导线插入到电路板的轴向对齐的通孔中并被压缩，使得金引线在穿透孔内压缩和弯曲在电路板之间形成电连接。

20. 发明授权

US5260850A Logic module assembly for confining and directing the flow of cooling fluid 失效
标题翻译：用于限制和引导冷却流体流的逻辑模块组件
公开(公告)号：US5260850A
公开(公告)日：1993-11-09
申请号：US813966
申请日：1991-12-24
申请人： Gregory J. Sherwood , Chris M. Quaderer
发明人： Gregory J. Sherwood , Chris M. Quaderer
IPC分类号： G06F1/20 , H05K7/20
CPC分类号： G06F1/20 , G06F2200/201
摘要： An improved logic module comprises integrated circuit chips located in channels. The channels convey a flow of a cooling fluid or a combination of cooling fluids, bringing the cooling fluid into contact with the integrated circuit chips. Flow blockers and power blades form boundaries of the channels and substantially exclude the undesirable entry or exit of cooling fluids at the boundaries. A support frame holds the logic modules of a cluster of logic modules in a generally parallel relationship. Sealing plates between logic modules and an assembly gasket substantially prevent flow short circuiting. The power blades mate sealably with a horizontal buss to conduct electric power to the module.
摘要翻译：改进的逻辑模块包括位于通道中的集成电路芯片。通道传送冷却流体的流动或冷却流体的组合，使得冷却流体与集成电路芯片接触。流动阻塞器和动力叶片形成通道的边界，并且基本上排除了边界处冷却流体的不希望的进入或退出。支持框架以大致平行的关系保持逻辑模块集群的逻辑模块。逻辑模块和组合垫圈之间的密封板基本上防止了流动短路。动力叶片与水平母线密封配合，以对模块进行电力供应。

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