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121. 发明授权

US07138877B2 PLL and method for providing a single/multiple adjustable frequency range 有权
标题翻译： PLL和提供单/多个可调频率范围的方法
公开(公告)号：US07138877B2
公开(公告)日：2006-11-21
申请号：US10828667
申请日：2004-04-21
申请人： Roxanne Vu , Huy Nguyen , Benedict Lau
发明人： Roxanne Vu , Huy Nguyen , Benedict Lau
IPC分类号： H03L7/00
CPC分类号： H03L7/0898 , H03L7/093 , H03L7/107 , H03L7/1072 , H03L7/1075 , H03L7/18 , H04L7/033
摘要： A PLL circuit and method provides an adjustable operating frequency range by using at least two VCOs. In an embodiment of the present invention, circuit components of a PLL are adjusted in order to obtain a selected frequency range. In particular, a gain of a charge pump and resistance of a filter is adjusted responsive to a control signal. In alternate embodiments of the present invention, a voltage regulator, including an operational amplifier, is coupled to the output of the filter and the respective inputs of two VCOs. An output multiplexer then selects a VCO output responsive to the control signal. In another embodiment of the present invention, a multiplexer is coupled to the output of the voltage regulator to select which VCO receives a buffered voltage. In another embodiment of the present invention, respective operational amplifiers that may be enabled or disabled responsive to the control signal are coupled to a filter output and respective VCO inputs in order to provide an adjustable frequency range.
摘要翻译： PLL电路和方法通过使用至少两个VCO提供可调节的工作频率范围。在本发明的一个实施例中，调整PLL的电路部件以便获得选定的频率范围。特别地，响应于控制信号调整电荷泵的增益和滤波器的电阻。在本发明的替代实施例中，包括运算放大器的电压调节器耦合到滤波器的输出端和两个VCO的相应输入端。然后，输出多路复用器响应于控制信号选择VCO输出。在本发明的另一个实施例中，多路复用器耦合到电压调节器的输出以选择哪个VCO接收缓冲电压。在本发明的另一个实施例中，可以响应于控制信号使能或禁用的各个运算放大器被耦合到滤波器输出和相应的VCO输入，以便提供可调节的频率范围。

122. 发明申请

US20060238973A1 Method and apparatus for venting a chassis 有权
标题翻译：用于排放底盘的方法和装置
公开(公告)号：US20060238973A1
公开(公告)日：2006-10-26
申请号：US11110377
申请日：2005-04-20
申请人： Cecilia Sun , James Curlee , Kenneth Musgrave , Huy Nguyen , Lisa Sura
发明人： Cecilia Sun , James Curlee , Kenneth Musgrave , Huy Nguyen , Lisa Sura
IPC分类号： H05K7/20
CPC分类号： G06F1/181 , G06F1/20
摘要： A chassis venting apparatus includes a chassis defining a chassis enclosure, the chassis enclosure including a first wall, and a chassis vent structure extending from the first wall and into the chassis enclosure, the chassis vent structure defining a chassis venting passageway in the chassis enclosure. Heated air from heat producing components may be vented from the chassis enclosure through the chassis vent structure and the chassis venting passageway, and the first wall and chassis venting passageway may also be used as a handle to lift the chassis.
摘要翻译：底盘通风装置包括限定底盘外壳的底架，底盘外壳包括第一壁和从第一壁延伸到底盘外壳中的底盘排气结构，底盘排气结构在机箱外壳中限定底盘排气通道。来自制热部件的加热空气可以通过底盘通风结构和底盘通风通道从底盘外壳排出，并且第一壁和底盘通风通道也可以用作提升机架的手柄。

123. 发明授权

US07064602B2 Dynamic gain compensation and calibration 有权
标题翻译：动态增益补偿和校准
公开(公告)号：US07064602B2
公开(公告)日：2006-06-20
申请号：US10840724
申请日：2004-05-05
申请人： Huy Nguyen
发明人： Huy Nguyen
IPC分类号： G05F1/10
CPC分类号： H03F3/45183 , H03F3/45632 , H03F2203/45048 , H03F2203/45484
摘要： Described are methods and circuits that reduce or eliminate the impact of power-supply fluctuations on circuit performance. IC dies include compensation circuitry that compares local power-supply voltages to relatively stable reference voltages, such as unloaded distributed supply voltages, to sense local supply-voltage fluctuations. Based upon this comparison, the compensation circuitry adjusts circuit characteristics that might otherwise suffer performance degradation. Receivers in accordance with some embodiments automatically tailoring their gain to the output characteristics of a number of possible transmitter types with which the receivers may be expected to communicate.
摘要翻译：描述了减少或消除电源波动对电路性能的影响的方法和电路。 IC芯片包括补偿电路，其将局部电源电压与相对稳定的参考电压（例如无负载分布式电源电压）进行比较，以感测局部电源电压波动。基于这种比较，补偿电路调整可能会遭受性能下降的电路特性。根据一些实施例的接收机自动地将其增益调整到接收机可以预期与之通信的多个可能的发射机类型的输出特性。

124. 发明申请

US20060015659A1 System and method for transferring data using storage controllers 审中-公开
标题翻译：使用存储控制器传输数据的系统和方法
公开(公告)号：US20060015659A1
公开(公告)日：2006-01-19
申请号：US10893822
申请日：2004-07-19
申请人： Leon Krantz , Kha Nguyen , Huy Nguyen
发明人： Leon Krantz , Kha Nguyen , Huy Nguyen
IPC分类号： G06F3/00
CPC分类号： G06F3/061 , G06F3/0656 , G06F3/0659 , G06F3/0676
摘要： A method and a storage controller for transferring data between a host and a storage device is provided. The storage controller includes, a transport module having a first in first out (“FIFO”) for receiving frames from a link module, wherein the FIFO uses two pointers; the first pointer points to a location of a frame that is received with cyclic redundancy code (“CRC”) and the second pointer points to the frame after the CRC is verified and the frame is acceptable. The method includes, using a first pointer to point to a location when a frame arrives without the CRC; and verifying the CRC and if a frame is acceptable using a second pointer to point to the first pointer location. If a frame is corrupt the first pointer and the second pointer point to a location of a receive pointer.
摘要翻译：提供了一种用于在主机和存储设备之间传送数据的方法和存储控制器。存储控制器包括：具有先入先出（“FIFO”）的传输模块，用于从链路模块接收帧，其中FIFO使用两个指针; 第一指针指向在循环冗余码（“CRC”）被接收的帧的位置，并且第二指针在CRC被校验之后指向帧，并且该帧是可接受的。该方法包括：当帧到达而没有CRC时，使用第一指针指向一个位置; 以及验证CRC以及如果帧是可接受的，则使用第二指针指向第一指针位置。如果帧被损坏，则第一个指针和第二个指针指向接收指针的位置。

125. 发明申请

US20050179479A1 Clock distribution network with process, supply-voltage, and temperature compensation 有权
标题翻译：具有过程，电源电压和温度补偿的时钟分配网络
公开(公告)号：US20050179479A1
公开(公告)日：2005-08-18
申请号：US11101958
申请日：2005-04-08
申请人： Huy Nguyen , Roxanne Vu , Benedict Lau
发明人： Huy Nguyen , Roxanne Vu , Benedict Lau
IPC分类号： G06F1/10 , H03K5/00 , H03K5/13 , G06F1/04
CPC分类号： H03K5/133 , G06F1/10 , H03K2005/00039 , H03K2005/00078 , H03K2005/00143
摘要： Described are methods and systems for distributing low-skew, predictably timed clock signals. A clock distribution network includes a plurality of dynamically adjustable clock buffers. A control circuit connected to each clock buffer controls the delays through the clock buffers in response to process, voltage, and temperature variations, and consequently maintains a relatively constant signal-propagation delay through the network. In one embodiment, each clock buffer includes skew-offset circuitry that adds to or subtracts from the PVT compensated delay values provided by the PVT control circuit to simplify clock skew minimization.
摘要翻译：描述了用于分配低偏移，可预测的定时时钟信号的方法和系统。时钟分配网络包括多个可动态调整的时钟缓冲器。连接到每个时钟缓冲器的控制电路响应于过程，电压和温度变化来控制通过时钟缓冲器的延迟，并且因此通过网络维持相对恒定的信号传播延迟。在一个实施例中，每个时钟缓冲器包括倾斜偏移电路，其增加或减去由PVT控制电路提供的PVT补偿延迟值，以简化时钟偏差最小化。

126. 发明申请

US20050174143A1 Calibration methods and circuits for optimized on-die termination 有权
公开(公告)号：US20050174143A1
公开(公告)日：2005-08-11
申请号：US11100949
申请日：2005-04-06
申请人： Huy Nguyen , Vijay Gadde , Benedict Lau
发明人： Huy Nguyen , Vijay Gadde , Benedict Lau
IPC分类号： H03K19/003 , H04L25/02
CPC分类号： H03K19/0005 , H03K5/24 , H03K19/01 , H03K21/08 , H04L25/0278 , H04L25/0298
摘要： Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines. An ODT control system in accordance with one embodiment calibrates and maintains termination resistances and drive currents to produce optimal output swing voltages. Comparison circuitry employed to calibrate the reference resistance is also used to calibrate the drive current. Termination elements in some embodiments are divided into two adjustable resistive portions, both of which are designed to minimize capacitive loading. One portion is optimized to produce a relatively high range of adjustment, while the other is optimized for fine-tuning and glitch-free switching.

127. 发明授权

US06897699B1 Clock distribution network with process, supply-voltage, and temperature compensation 失效
公开(公告)号：US06897699B1
公开(公告)日：2005-05-24
申请号：US10199232
申请日：2002-07-19
申请人： Huy Nguyen , Roxanne Vu , Benedict Lau
发明人： Huy Nguyen , Roxanne Vu , Benedict Lau
IPC分类号： G06F1/10 , H03K5/00 , H03K5/13 , G06F1/04
CPC分类号： H03K5/133 , G06F1/10 , H03K2005/00039 , H03K2005/00078 , H03K2005/00143
摘要： Described are methods and systems for distributing low-skew, predictably timed clock signals. A clock distribution network includes a plurality of dynamically adjustable clock buffers. A control circuit connected to each clock buffer controls the delays through the clock buffers in response to process, voltage, and temperature variations, and consequently maintains a relatively constant signal-propagation delay through the network. In one embodiment, each clock buffer includes skew-offset circuitry that adds to or subtracts from the PVT compensated delay values provided by the PVT control circuit to simplify clock skew minimization.

128. 发明申请

US20050046454A1 Phase synchronization for wide area integrated circuits 有权
标题翻译：广域集成电路的相位同步
公开(公告)号：US20050046454A1
公开(公告)日：2005-03-03
申请号：US10963698
申请日：2004-10-13
申请人： Huy Nguyen , Benedict Lau , Leung Yu , Jade Kizer
发明人： Huy Nguyen , Benedict Lau , Leung Yu , Jade Kizer
IPC分类号： G06F1/10 , H03L7/00 , H03L7/06
CPC分类号： G06F1/10 , G06F1/12 , H03L7/00
摘要： A circuit and method for synchronized clocking of components such as registers. Registers are clocked by individual component clock signals having the same frequency but potentially different phases due to differing propagation delays. Separate component clock signals are received by registers are brought into phase by evaluating the phases of the component clock signals at the registers, and synchronizing the component clock signal of each register to that of the previous register in a sequence.
摘要翻译：用于同步计时器件的电路和方法，例如寄存器。由于不同的传播延迟，寄存器由具有相同频率但潜在不同相位的各个组件时钟信号计时。通过对寄存器中的分量时钟信号的相位进行评估，使寄存器接收到的单独的分量时钟信号变为相位，并且将序列中的每个寄存器的分量时钟信号与先前寄存器的分量时钟信号同步。

129. 发明授权

US06798243B1 Apparatus and method for level-shifting input receiver circuit from high external voltage to low internal supply voltage 有权
标题翻译：输入接收电路从高外部电压到低内部电源电压的装置和方法
公开(公告)号：US06798243B1
公开(公告)日：2004-09-28
申请号：US10629167
申请日：2003-07-28
申请人： Huy Nguyen , Roxanne Vu , Benedict Lau , Jade Kizer
发明人： Huy Nguyen , Roxanne Vu , Benedict Lau , Jade Kizer
IPC分类号： H03K190175
CPC分类号： H03K19/018528
摘要： A circuit and method for level-shifting an input signal are disclosed that provide for level-shifting of a the input signal where an external voltage level is greater than an internal voltage of the signal. In the present invention, the input signal is compared to a reference signal to produce a differential current signal reflecting the logic level of the input signal. The differential current signal is reflected through a pair of current mirrors operating from the external voltage level to drive a pair of resistive loads. Each of the resistive loads is coupled in series with a current sink between the internal supply voltage and a ground voltage. As a result, the input signal may be received and level-shifted with gain even when the internal supply voltage is less than twice a transistor threshold voltage without introducing significant distortion to the received signal.
摘要翻译：公开了用于电平移位输入信号的电路和方法，其提供输入信号的电平移位，其中外部电压电平大于信号的内部电压。在本发明中，将输入信号与参考信号进行比较，以产生反映输入信号的逻辑电平的差分电流信号。差分电流信号通过从外部电压电平工作的一对电流镜反射，以驱动一对电阻负载。每个电阻负载与内部电源电压和接地电压之间的电流吸收器串联耦合。结果，即使当内部电源电压小于晶体管阈值电压的两倍时，也可以接收输入信号并进行电平移位，而不会对接收到的信号引入显着的失真。

130. 发明授权

US06483697B1 Nested flip cover lid for a hand-held computing system 有权
标题翻译：用于手持计算系统的嵌套式翻盖盖
公开(公告)号：US06483697B1
公开(公告)日：2002-11-19
申请号：US09870264
申请日：2001-05-29
申请人： Kenneth Jenks , Troy Hulick , Huy Nguyen , Steven Shiozaki
发明人： Kenneth Jenks , Troy Hulick , Huy Nguyen , Steven Shiozaki
IPC分类号： G06F116
CPC分类号： G06F1/1679 , G06F1/1626 , G06F1/1632 , G06F2200/1632 , G06F2200/1634 , Y10S190/903
摘要： One embodiment in accordance with the present invention includes a nested flip cover lid for a portable computing system such as a personal digital assistant (PDA). Specifically, the nested flip cover lid includes an accessory rail spine, a hinge and a rigid material that is fabricated to nest within the top cover parameter bevels surrounding the display device of the portable computing system. Therefore, the nested flip cover of the portable computing system is designed and fabricated in order to add a minimal amount of thickness (e.g., 1 millimeter) to the overall portable computing system package. Furthermore, the nested flip cover may also be integrated with a latching mechanism in order to secure the nested flip cover closed when the portable computing system is not being used. In this manner, the latching mechanism keeps the nested flip cover aligned with the outer parameter of the portable computing system.
摘要翻译：根据本发明的一个实施例包括用于诸如个人数字助理（PDA）的便携式计算系统的嵌套翻盖盖。具体地，嵌套式翻盖盖包括辅助导轨脊，铰链和刚性材料，其被制造成嵌套在围绕便携式计算系统的显示装置的顶盖参数斜面内。因此，便携式计算系统的嵌套式翻盖被设计和制造以便为整个便携式计算系统封装添加最小量的厚度（例如，1毫米）。此外，嵌套式翻盖还可以与锁定机构集成，以便在便携式计算系统未被使用时将嵌套的翻盖封闭。以这种方式，锁定机构使嵌套的翻盖与便携式计算系统的外部参数保持一致。

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