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111. 发明申请

US20090101956A1 EMBEDDED TRENCH CAPACITOR HAVING A HIGH-K NODE DIELECTRIC AND A METALLIC INNER ELECTRODE 有权
标题翻译：具有高K节点电介质和金属内电极的嵌入式电容器
公开(公告)号：US20090101956A1
公开(公告)日：2009-04-23
申请号：US11873728
申请日：2007-10-17
申请人： Roger A. Booth, JR. , MaryJane Brodsky , Kangguo Cheng , Chengwen Pei
发明人： Roger A. Booth, JR. , MaryJane Brodsky , Kangguo Cheng , Chengwen Pei
IPC分类号： H01L27/108 , H01G4/00 , H01L21/8242
CPC分类号： H01L27/1087
摘要： A deep trench is formed in a semiconductor substrate and a pad layer thereupon, and filled with a dummy node dielectric and a dummy trench fill. A shallow trench isolation structure is formed in the semiconductor substrate. A dummy gate structure is formed in a device region after removal of the pad layer. A first dielectric layer is formed over the dummy gate structure and a protruding portion of the dummy trench fill and then planarized. The dummy structures are removed. The deep trench and a cavity formed by removal of the dummy gate structure are filled with a high dielectric constant material layer and a metallic layer, which form a high-k node dielectric and a metallic inner electrode of a deep trench capacitor in the deep trench and a high-k gate dielectric and a metal gate in the device region.
摘要翻译：在半导体衬底和衬垫层中形成深沟槽，并填充有虚拟节点电介质和虚设沟槽填充物。在半导体衬底中形成浅沟槽隔离结构。去除焊盘层之后，在器件区域中形成虚拟栅极结构。在虚拟栅极结构上形成第一电介质层，并且填充虚拟沟槽的突出部分，然后进行平坦化。虚拟结构被去除。深沟槽和通过去除伪栅极结构形成的空腔填充有高介电常数材料层和金属层，其形成深沟槽中的高k节点电介质和深沟槽电容器的金属内电极以及在器件区域中的高k栅极电介质和金属栅极。

112. 发明申请

US20090051002A1 ELECTRICAL FUSE HAVING A THIN FUSELINK 失效
标题翻译：电子保险丝
公开(公告)号：US20090051002A1
公开(公告)日：2009-02-26
申请号：US11843047
申请日：2007-08-22
申请人： Roger A. Booth, JR. , MaryJane Brodsky , Kangguo Cheng , Chengwen Pei
发明人： Roger A. Booth, JR. , MaryJane Brodsky , Kangguo Cheng , Chengwen Pei
IPC分类号： H01L29/00 , H01L21/44
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A thin semiconductor layer is formed and patterned on a semiconductor substrate to form a thin semiconductor fuselink on shallow trench isolation and between an anode semiconductor region and a cathode semiconductor region. During metallization, the semiconductor fuselink is converted to a thin metal semiconductor alloy fuselink as all of the semiconductor material in the semiconductor fuselink reacts with a metal to form a metal semiconductor alloy. The inventive electrical fuse comprises the thin metal semiconductor alloy fuselink, a metal semiconductor alloy anode, and a metal semiconductor alloy cathode. The thin metal semiconductor alloy fuselink has a smaller cross-sectional area compared with prior art electrical fuses. Current density within the fuselink and the divergence of current at the interface between the fuselink and the cathode or anode comparable to prior art electrical fuses are obtained with less programming current than prior art electrical fuses.
摘要翻译：薄半导体层在半导体衬底上形成并图案化以在浅沟槽隔离上以及在阳极半导体区域和阴极半导体区域之间形成薄的半导体熔丝。在金属化期间，由于半导体软管中的所有半导体材料与金属反应而形成金属半导体合金，所以将半导体熔融金属转换为薄金属半导体合金熔丝。本发明的电熔丝包括薄金属半导体合金熔丝，金属半导体合金阳极和金属半导体合金阴极。与现有技术的电熔丝相比，薄金属半导体合金熔体具有较小的横截面积。与现有技术的电熔丝相比，可以获得与现有技术的电熔丝相当的在熔丝中的电流密度和在熔丝与阴极或阳极之间的界面处的电流发散度，而不是现有技术的电熔丝。

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