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101. 发明授权

US08569445B2 Secreted proteins 失效
公开(公告)号：US08569445B2
公开(公告)日：2013-10-29
申请号：US12585371
申请日：2009-09-14
申请人： Henry Yue , Monique G. Yao , Ameena R. Gandhi , Mariah R. Baughn , Anita Swarnakar , Narinder Chawla , Madhusudan M. Sanjanwala , Michael Thorton , Vicki S. Elliott , Yan Lu , Kimberly J. Gietzen , Neil Burford , Li Ding , April J. A. Hafalia , Y. Tom Tang , Olga Bandman , Bridget A. Warren , Cynthia D. Honchell , Dyung Aina M. Lu , Kavitha Thangavelu , Sally Lee , Yuming Xu , Junming Yang , Preeti G. Lal , Bao Tran , Craig H. Ison , Brendan M. Duggan , Stephanie K. Sapperstein
发明人： Henry Yue , Monique G. Yao , Ameena R. Gandhi , Mariah R. Baughn , Anita Swarnakar , Narinder Chawla , Madhusudan M. Sanjanwala , Michael Thorton , Vicki S. Elliott , Yan Lu , Kimberly J. Gietzen , Neil Burford , Li Ding , April J. A. Hafalia , Y. Tom Tang , Olga Bandman , Bridget A. Warren , Cynthia D. Honchell , Dyung Aina M. Lu , Kavitha Thangavelu , Sally Lee , Yuming Xu , Junming Yang , Preeti G. Lal , Bao Tran , Craig H. Ison , Brendan M. Duggan , Stephanie K. Sapperstein
IPC分类号： C07K14/47 , A61K38/16
CPC分类号： C12N15/1055 , A61K39/3955 , A61K47/64 , A61K47/643 , A61K2039/505 , C07K14/47 , C07K14/4711 , C07K14/4713 , C07K16/18 , C07K2317/24 , C07K2317/54 , C07K2317/55 , C07K2317/622 , C07K2317/75 , C07K2317/76 , G01N33/5023
摘要： The invention provides human secreted proteins (SECP) and polynucleotides which identify and encode SECP. The invention also provides expression vectors, host cells, antibodies, agonists, and antagonists. The invention also provides methods for diagnosing, treating, or preventing disorders associated with aberrant expression of SECP.

102. 发明授权

US08468479B2 Consistent hierarchical timing model with crosstalk consideration 有权
标题翻译：具有串扰考虑的一致的分层时序模型
公开(公告)号：US08468479B2
公开(公告)日：2013-06-18
申请号：US13052016
申请日：2011-03-18
申请人： Peivand Tehrani , Li Ding , Narender Hanchate , Rupesh Nayak , Yazdan Aghaghiri
发明人： Peivand Tehrani , Li Ding , Narender Hanchate , Rupesh Nayak , Yazdan Aghaghiri
IPC分类号： G06F9/455 , G06F17/50
CPC分类号： G06F17/5036 , G06F2217/82 , G06F2217/84
摘要： A method and apparatus to provide a hierarchical timing model with crosstalk consideration is provided. In one embodiment, the method comprises performing block level analysis of a circuit, in one or a plurality of iterations, and storing per iteration data. The method further comprises, in one embodiment, utilizing the per iteration data in performing top level analysis of the circuit.
摘要翻译：提供了一种提供具有串扰考虑的分层定时模型的方法和装置。在一个实施例中，该方法包括在一个或多个迭代中执行电路的块级分析，并存储每个迭代数据。该方法还包括在一个实施例中，利用每个迭代数据来执行电路的顶级分析。

103. 发明授权

US08427355B2 Time-interleaved pipelined-SAR analog to digital converter with low power consumption 有权
标题翻译：时间交错流水线SAR模数转换器，功耗低
公开(公告)号：US08427355B2
公开(公告)日：2013-04-23
申请号：US13232442
申请日：2011-09-14
申请人： Sai-Weng Sin , Li Ding , Yan Zhu , He-Gong Wei , Chi-Hang Chan , U-Fat Chio , Seng-Pan U , Rui Paulo da Silva Martins , Franco Maloberti
发明人： Sai-Weng Sin , Li Ding , Yan Zhu , He-Gong Wei , Chi-Hang Chan , U-Fat Chio , Seng-Pan U , Rui Paulo da Silva Martins , Franco Maloberti
IPC分类号： H03M1/38
CPC分类号： H03M1/1225 , H03M1/0695 , H03M1/1215 , H03M1/164 , H03M1/468
摘要： An analog-to-digital converter (ADC) circuit comprising two time-interleaved successive approximation register (SAR) ADCs. Each of the two time-interleaved SAR ADCs comprises a first stage SAR sub-ADC, a residue amplifier, a second stage SAR sub-ADC and a digital error correction logic. The residue amplifier is shared between the time-interleaved paths, has a reduced gain and operates in sub-threshold to achieve power effective design.
摘要翻译：包括两个时间交错的逐次逼近寄存器（SAR）ADC的模数转换器（ADC）电路。两个时间交织的SAR ADC中的每一个包括第一级SAR子ADC，残差放大器，第二级SAR子ADC和数字纠错逻辑。剩余放大器在时间交织路径之间共享，具有减小的增益并且在子阈值中操作以实现功率有效设计。

104. 发明授权

US08337553B2 Optical material and method for modifying the refractive index 有权
$Optical material and method for modifying the refractive index$
标题翻译：用于改变折射率的光学材料和方法
公开(公告)号：US08337553B2
公开(公告)日：2012-12-25
申请号：US12846950
申请日：2010-07-30
申请人： Wayne H. Knox , Li Ding , Jay F. Kunzler , Dharmendra M. Jani , Candido D. Pinto
发明人： Wayne H. Knox , Li Ding , Jay F. Kunzler , Dharmendra M. Jani , Candido D. Pinto
IPC分类号： A61F2/16 , G02C7/02
CPC分类号： A61F2/14 , A61B18/20 , A61F2/142 , A61F2/1451 , A61F2/147 , A61F2/16 , A61F9/008 , A61L27/16 , A61L27/18 , A61L27/52 , B29D11/00355 , B29D11/00461 , B29D11/023 , B29K2083/00 , B29K2105/0061 , C08J7/12 , C08J7/123 , C08J2333/14 , C08J2339/06 , C08J2383/04 , G02B1/041 , G02C7/022 , G02C2202/12 , G02C2202/14
摘要： The invention is directed to an optical device comprising refractive optical structures, wherein the refractive structures are characterized by a change in refractive index, exhibit little or no scattering loss, and exhibit no significant differences in the Raman spectrum with respect to the non-irradiated optical, polymeric material.
摘要翻译：本发明涉及一种包括折射光学结构的光学装置，其中折射结构的特征在于折射率的变化，显示很少或没有散射损耗，并且在拉曼光谱方面相对于未照射的光学器件没有显着差异，聚合材料。

105. 发明授权

US08299444B2 Ion source 有权
标题翻译：离子源
公开(公告)号：US08299444B2
公开(公告)日：2012-10-30
申请号：US12552476
申请日：2009-09-02
申请人： Li Ding , Wenjian Sun
发明人： Li Ding , Wenjian Sun
IPC分类号： H01J49/16
CPC分类号： H01J49/162 , H01J49/0463 , H01J49/165
摘要： This invention relates to a desorption/ionization source operated under ambient conditions for direct analysis of solid or liquid samples on a surface. The source comprises of a laser desorption system and a UV/electrospray combined ionization system. The source is suitable for simultaneously ionizing samples with different polarity in a complex mixture. At the same time, the compact design of the source with multiple channels can maintain the level of local concentration of the analyte ions inside the source for higher efficiency of sample ionization and introduction.
摘要翻译：本发明涉及在环境条件下操作的用于在表面上直接分析固体或液体样品的解吸/电离源。该源包括激光解吸系统和UV /电喷雾组合电离系统。该源适用于在复杂混合物中同时电离不同极性的样品。同时，具有多个通道的源的紧凑设计可以保持源内的分析物离子的局部浓度水平，以提高样品电离和引入的效率。

106. 发明申请

US20120239371A1 Consistent Hierarchical Timing Model with Crosstalk Consideration 有权
标题翻译：具有串扰考虑的一致的分层时序模型
公开(公告)号：US20120239371A1
公开(公告)日：2012-09-20
申请号：US13052016
申请日：2011-03-18
申请人： Peivand Tehrani , Li Ding , Narender Hanchate , Rupesh Nayak , Yazdan Aghaghiri
发明人： Peivand Tehrani , Li Ding , Narender Hanchate , Rupesh Nayak , Yazdan Aghaghiri
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F2217/82 , G06F2217/84
摘要： A method and apparatus to provide a hierarchical timing model with crosstalk consideration is provided. In one embodiment, the method comprises performing block level analysis of a circuit, in one or a plurality of iterations, and storing per iteration data. The method further comprises, in one embodiment, utilizing the per iteration data in performing top level analysis of the circuit.
摘要翻译：提供了一种提供具有串扰考虑的分层定时模型的方法和装置。在一个实施例中，该方法包括在一个或多个迭代中执行电路的块级分析，并存储每个迭代数据。该方法还包括在一个实施例中，利用每个迭代数据来执行电路的顶级分析。

107. 发明授权

US08171428B2 System and method for implementing data navigation interface 失效
标题翻译：实现数据导航界面的系统和方法
公开(公告)号：US08171428B2
公开(公告)日：2012-05-01
申请号：US11843174
申请日：2007-08-22
申请人： Li Ding
发明人： Li Ding
IPC分类号： G06F3/048
CPC分类号： G06F17/30994 , G06F17/30961
摘要： An interactive user interface (UI) to manage searching of data is disclosed. The UI includes a first display panel configured to display a parent context view and a child context view thereon and a second display panel configured to display a diagram of an enlarged portion of the child context view.
摘要翻译：公开了一种用于管理数据搜索的交互式用户界面（UI）。 UI包括被配置为在其上显示父上下文视图和子上下文视图的第一显示面板和被配置为显示子上下文视图的放大部分的图的第二显示面板。

108. 发明授权

US08145442B2 Fast and accurate estimation of gate output loading 有权
标题翻译：快速准确地估计门输出负载
公开(公告)号：US08145442B2
公开(公告)日：2012-03-27
申请号：US12363373
申请日：2009-01-30
申请人： Hong Li , Li Ding , Alireza Kasnavi
发明人： Hong Li , Li Ding , Alireza Kasnavi
IPC分类号： G01R27/26 , G06F17/40
CPC分类号： G06F17/5036
摘要： Embodiments of a computer system, a method, an integrated circuit and a computer-program product (i.e., software) for use with the computer system are described. These devices and techniques may be used to analyze an electrical characteristic of a logic gate electrically coupled to an output network in a stage. In particular, during the analysis, the effective capacitance of an output network coupled to a logic gate is approximated as a function of a total resistance of the output network, a total capacitance of the output network, and a geometric parameter of the output network. Using the effective capacitance and other parameters, such as a slew rate of an electrical signal applied to an input of the logic gate, an electrical characteristic of the logic gate, such as an input capacitance, is determined.
摘要翻译：描述了与计算机系统一起使用的计算机系统，方法，集成电路和计算机程序产品（即，软件）的实施例。这些装置和技术可以用于分析在一个级中电耦合到输出网络的逻辑门的电特性。特别地，在分析期间，耦合到逻辑门的输出网络的有效电容被近似为输出网络的总电阻，输出网络的总电容和输出网络的几何参数的函数。使用诸如施加到逻辑门的输入端的电信号的转换速率等有效电容和其他参数，确定诸如输入电容的逻辑门的电特性。

109. 发明授权

US08091049B2 Integrated single spice deck sensitization for gate level tools 有权
标题翻译：综合单一香料甲板敏化门级工具
公开(公告)号：US08091049B2
公开(公告)日：2012-01-03
申请号：US12166630
申请日：2008-07-02
申请人： Jindrich Zejda , Narender Hanchate , Rupesh Nayak , Li Ding
发明人： Jindrich Zejda , Narender Hanchate , Rupesh Nayak , Li Ding
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F17/505
摘要： One embodiment of the present invention provides systems and techniques for generating a transistor-level description of a subcircuit. A user may want to simulate a subcircuit in a circuit using a transistor-level simulator, and one or more cells in the subcircuit may need to be sensitized so that the cells are in a desired state when the subcircuit is simulated. An embodiment modifies the subcircuit by inserting analog switches in front of the cells that need to be sensitized, so that the analog switches can be used to apply a sensitization sequence to the cells during the transistor-level simulation. The embodiment can then generate a transistor-level description of the modified subcircuit. Next, the transistor-level description of the subcircuit can be stored, thereby enabling the transistor-level simulator to simulate the subcircuit.
摘要翻译：本发明的一个实施例提供了用于产生子电路的晶体管级描述的系统和技术。用户可能需要使用晶体管级模拟器来模拟电路中的分支电路，并且子电路中的一个或多个单元可能需要被敏化，使得当模拟子电路时，单元格处于期望状态。实施例通过将模拟开关插入需要敏化的单元前面来修改子电路，使得模拟开关可用于在晶体管级仿真期间向单元施加致敏序列。然后，该实施例可以生成修改后的子电路的晶体管级描述。接下来，可以存储子电路的晶体管级描述，从而使晶体管级模拟器能够模拟子电路。

110. 发明授权

US07917894B2 Constraining source code and objects for analysis tools 有权
标题翻译：限制源代码和分析工具的对象
公开(公告)号：US07917894B2
公开(公告)日：2011-03-29
申请号：US11144092
申请日：2005-06-03
申请人： Xuan Zhang Chen , Kushal Sayeed Munir , David Kenneth McKnight , Li Ding , Vadim Berestetsky
发明人： Xuan Zhang Chen , Kushal Sayeed Munir , David Kenneth McKnight , Li Ding , Vadim Berestetsky
IPC分类号： G06F9/44
CPC分类号： G06F11/3624
摘要： A source container for use in a computer system executing problem determination tools in an integrated environment across a computer network, the source container comprising a list of pathways to a plurality of source files and module objects. A software development may create the source container independently or within the front end of a problem determination tool. The front end of the problem determination tools sends the source container to its engine, and only source files and module objects having a pathway in the source container are analyzed within the engine of the problem determination tool. Furthermore, the results of the analysis of only those source files and module objects having a pathway in the source container are returned to the front end of the problem determination tool for viewing by the software developer. The front ends of the tools of the integrated development environment, the source files, the module objects, the engines of the tools, and different tools may all be located on different servers and/or clients across a computer network.
摘要翻译：一种用于计算机系统的源容器，用于在跨计算机网络的集成环境中执行问题确定工具，所述源容器包括到多个源文件和模块对象的路径列表。软件开发可以独立地或在问题确定工具的前端创建源容器。问题确定工具的前端将源容器发送到其引擎，并且在问题确定工具的引擎内仅分析在源容器中具有路径的源文件和模块对象。此外，只有具有在源容器中的路径的源文件和模块对象的分析结果被返回到问题确定工具的前端，以供软件开发者观看。集成开发环境的工具的前端，源文件，模块对象，工具的引擎和不同的工具可能都位于跨计算机网络的不同服务器和/或客户端上。

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