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101. 发明申请

US20050172692A1 Method of bending pipe and apparatus therefor 失效
标题翻译：弯管及其设备的方法
公开(公告)号：US20050172692A1
公开(公告)日：2005-08-11
申请号：US11016451
申请日：2004-12-17
申请人： Hiroyuki Takahashi , Hiroshi Takada
发明人： Hiroyuki Takahashi , Hiroshi Takada
IPC分类号： B21D7/06 , B21C37/28 , B21D9/07 , B21D9/08
CPC分类号： B21C37/286 , B21D9/08
摘要： A movable die base (2) is moved toward a stationary die base (1). A pressing force is applied by a bending punch (21) disposed on the movable die base to a bending target portion of a pipe (A) which is placed on a die (11) provided on the stationary die base and which has inserted therein a core metal (17). At the time of this bending work, both ends of the pipe are restricted by holding them with restriction pads (22). When the pressing force is applied by the bending punch, the restriction pads are displaced to follow the pressing of the bending punch, whereby restricted state on both ends of the pipe is constantly maintained.
摘要翻译：可动模座（2）朝静止模座（1）移动。通过设置在可动模座上的弯曲冲头（21）将压力施加到管（A）的弯曲目标部分，管（A）放置在设置在固定模座上的模具（11）上并插入其中芯金属（17）。在该弯曲加工时，通过用限制垫（22）保持管的两端受到限制。当通过弯曲冲头施加按压力时，限制垫被移动以跟随弯曲冲头的按压，从而不断地保持管道两端的受限状态。

102. 发明授权

US06925016B2 Semiconductor memory and method for entering its operation mode 失效
标题翻译：半导体存储器和进入其操作模式的方法
公开(公告)号：US06925016B2
公开(公告)日：2005-08-02
申请号：US10467031
申请日：2002-01-30
申请人： Hiroyuki Takahashi , Takato Shimoyama , Takashi Kusakari
发明人： Hiroyuki Takahashi , Takato Shimoyama , Takashi Kusakari
IPC分类号： G11C11/401 , G11C7/10 , G11C11/403 , G11C11/406 , G11C7/00
CPC分类号： G11C7/1045
摘要： There is provided a method of entry of an operation mode of a semiconductor memory during operations without need of any specific timing specification and with effective suppression to any erroneous entry. If read cycles for plural addresses are continued, then, a request for entry of operation mode is accepted. In write cycles following to those read cycles, an operation mode to be entered is decided based on data externally designated, wherein in the first write cycle, the kind of the operation mode is set, and then in the next write cycle, conditions for the operation mode are set for the entry of the operation mode of the semiconductor memory.
摘要翻译：提供了一种在操作期间输入半导体存储器的操作模式的方法，而不需要任何特定的时序指定并有效抑制任何错误的输入。如果持续多个地址的读取周期，则接受进入操作模式的请求。在这些读取周期之后的写入周期中，基于外部指定的数据来决定要输入的操作模式，其中在第一写入周期中，设置操作模式的种类，然后在下一个写入周期中，操作模式被设置用于输入半导体存储器的操作模式。

103. 发明授权

US06919734B2 Cooling fin connected to a cooling unit and a pusher of the testing apparatus 有权
公开(公告)号：US06919734B2
公开(公告)日：2005-07-19
申请号：US10716613
申请日：2003-11-20
申请人： Noboru Saito , Hiroyuki Takahashi , Noriyuki Igarashi , Keiichi Fukumoto , Hiroto Nakamura , Yutaka Watanabe , Kenichi Shimada
发明人： Noboru Saito , Hiroyuki Takahashi , Noriyuki Igarashi , Keiichi Fukumoto , Hiroto Nakamura , Yutaka Watanabe , Kenichi Shimada
IPC分类号： G01R31/26 , G01R1/04 , G01R31/00 , G01R31/01 , G01R31/02 , G01R31/28 , G01R31/303
CPC分类号： G01R31/01 , G01R1/0458 , G01R31/2806 , G01R31/2862 , G01R31/2863 , G01R31/2868 , G01R31/2877
摘要： A device testing apparatus including a connection terminal to which an electronic device under test is detachably attached, a pusher for pushing the electronic device in the direction of the connection terminal so as to connect the electronic device to the connection terminal, and a cooling unit for cooling the electronic device. As the cooling unit, an element cooling the device using electricity is for example used. The cooling unit includes a cooling medium blower for blowing a cooling medium around the electronic device and heat exchange projections or depressions for raising the cooling efficiency by blowing a cooling medium. In the device testing apparatus, even if the electronic device generates heat on its own during testing, the electronic device is cooled through the pusher, connection terminals, or socket, so the effect of the heat generated by the electronic device is canceled out and the electronic device can be tested at the predetermined temperature as prescribed in the specification.

104. 发明授权

US06903717B2 Display device having driving circuit 有权
标题翻译：具有驱动电路的显示装置
公开(公告)号：US06903717B2
公开(公告)日：2005-06-07
申请号：US10243210
申请日：2002-09-13
申请人： Hiroyuki Takahashi , Katsuhiko Yarita
发明人： Hiroyuki Takahashi , Katsuhiko Yarita
IPC分类号： G02F1/1345 , G09F9/00 , G09F9/30 , G09G3/20 , G09G3/36 , G09G5/00
CPC分类号： G02F1/1345 , G02F2001/13456 , G09G3/3648
摘要： A display device of the present invention has a drain driver mounted to a display substrate and having a gate driver and a controller therein, and also has a power source mounted to a flexible printed board and supplying a power voltage to the gate driver. The wiring of a common control signal outputted from the controller and commonly used in control of the gate driver and the power source is formed on the display substrate so that the number of pads for connecting the display substrate and the flexible printed board is reduced. Thus, the construction of the flexible printed board is simplified, and the entire display device can be made compact.
摘要翻译：本发明的显示装置具有安装在显示基板上并具有栅极驱动器和控制器的漏极驱动器，并且还具有安装到柔性印刷电路板的电源并向栅极驱动器提供电源电压。在显示基板上形成从控制器输出的通用控制信号的布线，并且通常用于栅极驱动器和电源的控制，使得用于连接显示基板和柔性印刷电路板的焊盘的数量减少。因此，简化了柔性印刷电路板的结构，并且可以使整个显示装置紧凑。

105. 发明授权

US06898142B2 Semiconductor memory, method for controlling refreshment of it, and method for setting memory cell array specific area for realizing the control method 有权
标题翻译：半导体存储器，其控制刷新的方法以及用于设定用于实现该控制方法的存储单元阵列特定区域的方法
公开(公告)号：US06898142B2
公开(公告)日：2005-05-24
申请号：US10415604
申请日：2001-10-23
申请人： Hiroyuki Takahashi
发明人： Hiroyuki Takahashi
IPC分类号： G11C11/401 , G11C11/403 , G11C11/406 , G11C7/00
CPC分类号： G11C11/40618 , G11C11/406 , G11C11/40622 , G11C2211/4061 , G11C2211/4067
摘要： In accordance with the present invention, in order to reduce an averaged consumption current in a stand-by state, there is provided a semiconductor memory device including a memory cell array area which is divided into a plurality of areas, wherein the semiconductor memory device includes: at least one specific area setting unit being electrically coupled to said memory cell array area and adopted to set at least one area defined in said plurality of areas in accordance with an optional criterion; and at least one refresh operation control unit being electrically coupled to said memory cell array area and adopted to perform a refresh operation to the specific area based on at least one kind of specific refresh control signal, which is longer in cycle than a basic refresh control signal at least in a predetermined state of the semiconductor memory device.
摘要翻译：根据本发明，为了降低待机状态下的平均消耗电流，提供了一种半导体存储器件，其包括被划分为多个区域的存储单元阵列区域，其中半导体存储器件包括至少一个特定区域设定单元电耦合到所述存储单元阵列区域，并被采用以根据可选标准设置在所述多个区域中定义的至少一个区域; 以及至少一个刷新操作控制单元，其电耦合到所述存储单元阵列区域，并且被采用以基于与基本刷新控制相比周期长的至少一种特定刷新控制信号来对所述特定区域执行刷新操作信号至少在半导体存储器件的预定状态。

106. 发明申请

US20050105380A1 Semiconductor memory device and control method thereof 有权
标题翻译：半导体存储器件及其控制方法
公开(公告)号：US20050105380A1
公开(公告)日：2005-05-19
申请号：US10985876
申请日：2004-11-12
申请人： Hiroyuki Takahashi , Takato Shimoyama , Takuya Hirota
发明人： Hiroyuki Takahashi , Takato Shimoyama , Takuya Hirota
IPC分类号： G11C11/407 , G11C5/06 , G11C8/00
CPC分类号： G11C5/066
摘要： A semiconductor memory device has common terminals shared between a part or all of address terminals for receiving n bits of an address signal and data terminals for outputting a data signal with its bit width of n bits or less and dedicated address terminals for receiving m bits of the address signal, wherein at the time of a read, after the n bits of the address signal have been input, a plurality of data signals within a selected page are consecutively read out through the common terminals using the m bits of the address signal input from the dedicated address terminals.
摘要翻译：半导体存储器件具有用于接收地址信号的n位的一部分或所有地址端之间的公共端子，以及用于输出其位宽为n位或更少的数据信号的数据端，以及用于接收m位的专用地址端地址信号，其中在读取时，在输入了地址信号的n位之后，通过地址信号输入的m位，通过公共端连续地读出选定页内的多个数据信号从专用地址终端。

107. 发明申请

US20050101945A1 Treating apparatus and treating device for treating living-body tissue 有权
标题翻译：用于治疗生物体组织的处理装置和处理装置
公开(公告)号：US20050101945A1
公开(公告)日：2005-05-12
申请号：US11011899
申请日：2004-12-14
申请人： Tomohisa Sakurai , Koji Iida , Hiroyuki Takahashi , Eiji Murakami , Akihisa Ogawa , Kenji Noda , Seiichi Hosoda , Takeaki Nakamura
发明人： Tomohisa Sakurai , Koji Iida , Hiroyuki Takahashi , Eiji Murakami , Akihisa Ogawa , Kenji Noda , Seiichi Hosoda , Takeaki Nakamura
IPC分类号： A61B17/00 , A61B17/32 , A61B18/14
CPC分类号： A61B18/08 , A61B17/320068 , A61B18/085 , A61B18/1442 , A61B2017/00084 , A61B2017/2945 , A61B2018/00589 , A61B2018/00702 , A61B2018/00791 , A61B2018/1432
摘要： In a treating apparatus, a forceps body as a treating device is connected to a generator as a control device. The forceps body mainly includes a pair of handle portions, which are used for manipulation by being held by an operator, a pair of jaws provided between the handle portion and the pair of jaws, which are used to coagulate/resect by grasping living-body tissue to be treated and a pair of scissors component members. A heating member, which is a heat generating source as a heat generating portion for applying heat energy to living-body tissue, is embedded at least one of the jaws. A pair of electrode portions, which is a treating energy generator, is provided to the pair of jaws. By supplying bipolar electric surgical knife current between the pair of electrode portions, high frequency current as treating energy is applied to the grasped living-body tissue.
摘要翻译：在处理装置中，作为处理装置的镊子体与作为控制装置的发生器连接。镊子主体包括一对手柄部分，用于通过操作者握持操作，一对钳口设置在手柄部分和一对钳口之间，用于通过抓住活体来凝固/切除待处理的组织和一对剪刀组件。作为用于向生物体组织施加热能的发热部的发热源的加热部件嵌入至少一个夹爪。作为处理能量发生器的一对电极部分被提供给该对钳口。通过在一对电极部之间提供双极电刀手术电流，作为处理能量的高频电流被施加到被抓住的活体组织。

108. 发明授权

US06879537B2 Semiconductor storage device having a plurality of operation modes 失效
标题翻译：具有多种操作模式的半导体存储装置
公开(公告)号：US06879537B2
公开(公告)日：2005-04-12
申请号：US10492765
申请日：2002-10-16
申请人： Hiroyuki Takahashi , Atsushi Nakagawa
发明人： Hiroyuki Takahashi , Atsushi Nakagawa
IPC分类号： G11C11/403 , G11C7/20 , G11C11/406 , G11C11/407 , G11C11/4072 , G11C11/4074 , G11C11/4076 , G11C11/408 , G11C7/00
CPC分类号： G11C11/40615 , G11C7/20 , G11C11/406 , G11C11/4072 , G11C11/4074 , G11C11/4076 , G11C2207/2227 , G11C2211/4067 , G11C2211/4068
摘要： An operation control circuit is provided for shortening a transition time from a deep stand-by mode to a stand-by mode in a pseudo-SRAM having the deep stand-by mode and the stand-by mode. The transition from the deep stand-by mode to the stand-by mode starts first and second timer circuits which respectively output a timer output TN of a constant cycle needed for self-refresh and a timing signal TR of a shorter cycle than a self-refresh cycle. A counter circuit counts the output TR from the second timer circuit immediately after the deep stand-by mode has been transitioned to the stand-by mode. If the counted value corresponds to a value as set, then the counter circuit outputs an operation mode switching signal. A selector circuit comprising a multiplexer is switched and controlled by the output from the counter circuit. The selector circuit remains selecting TR until the counted value of the counter circuit corresponds to the set value, and in the subsequent stand-by mode, the selector circuit selects and outputs TN.
摘要翻译：提供一种操作控制电路，用于在具有深度待机模式和待机模式的伪SRAM中缩短从深度备用模式到待机模式的转换时间。从深度待机模式到待机模式的转变开始分别输出自刷新所需的恒定周期的定时器输出TN和比自动刷新短的周期的定时信号TR的第一和第二定时器电路，刷新周期。在深度待机模式已经转换到待机模式之后，计数器电路立即对来自第二定时器电路的输出TR进行计数。如果计数值对应于设定的值，则计数器电路输出操作模式切换信号。包括多路复用器的选择器电路由计数器电路的输出转换和控制。选择器电路保持选择TR，直到计数器电路的计数值对应于设定值，并且在随后的待机模式中，选择器电路选择和输出TN。

109. 发明授权

US06864991B1 Information processing apparatus for displaying data related to image forming apparatus, and information processing method therefor 有权
标题翻译：用于显示与图像形成装置有关的数据的信息处理装置及其信息处理方法
公开(公告)号：US06864991B1
公开(公告)日：2005-03-08
申请号：US09498627
申请日：2000-02-07
申请人： Hiroyuki Takahashi
发明人： Hiroyuki Takahashi
IPC分类号： G06F3/12 , G06F15/00 , G06F3/00
CPC分类号： G06F3/1229 , G06F3/1204 , G06F3/1232 , G06F3/1259 , G06F3/1285
摘要： According to the present invention, data for all or a part of the MFP devices connected to a network are obtained, and are rearranged as a list or are limited based on a variety of data obtained for each device, such as equipment data, apparatus data, network setup data, job states and employment statuses. As a result, data desired by a user can be provided in real time.
摘要翻译：根据本发明，获得了连接到网络的MFP设备的全部或一部分的数据，并且被重新排列成列表，或者基于为每个设备获得的各种数据（例如设备数据，设备数据，网络设置数据，工作状态和就业状况。结果，可以实时地提供用户期望的数据。

110. 发明申请

US20050047239A1 Semiconductor storage device and refresh control method thereof 有权
标题翻译：半导体存储装置及其刷新控制方法
公开(公告)号：US20050047239A1
公开(公告)日：2005-03-03
申请号：US10500400
申请日：2002-12-25
申请人： Hiroyuki Takahashi , Takuya Hirota , Noriaki Komatsu , Atsushi Nakagawa , Susumu Takano , Masahiro Yoshida , Yuuji Torige , Hideo Inaba
发明人： Hiroyuki Takahashi , Takuya Hirota , Noriaki Komatsu , Atsushi Nakagawa , Susumu Takano , Masahiro Yoshida , Yuuji Torige , Hideo Inaba
IPC分类号： G11C11/403 , G11C11/406 , G11C7/00
CPC分类号： G11C11/40603 , G11C11/406
摘要： Refresh of memory cells is performed periodically by a refresh timer, and collision between memory access and memory refresh is avoided. When memory access occurs, an F/F 163 is set by a one shot pulse from an OS circuit 161, a memory access request is inputted to a memory accessing pulse generator circuit 171 through a NOR gate 167, and a latch control signal LC and an enable signal REN are outputted. When a refresh request from the refresh timer is inputted to an AND gate 168 during the memory access, the output of the NOR gate 167 is at the “L” level, and the refresh request is blocked by the AND gate 168. Thereafter, at the time when the latch control signal LC is turned into the “L” level, F/Fs 163, 164 and 165 are reset, the output of the NOR gate 167 is turned into the “H” level, the refresh request is inputted to a refreshing pulse generator circuit 170, and a refresh enable signal RERF is outputted.
摘要翻译：通过刷新定时器周期性地执行存储器单元的刷新，并避免存储器访问和存储器刷新之间的冲突。当存储器访问发生时，通过来自OS电路161的单触发脉冲设置F / F 163，通过NOR门167将存储器访问请求输入到存储器访问脉冲发生器电路171，以及锁存控制信号LC和输出使能信号REN。当在存储器访问期间来自刷新定时器的刷新请求被输入到与门168时，或非门167的输出处于“L”电平，刷新请求由与门168阻止。此后，当锁存控制信号LC变为“L”电平时，F / F 163,164和165被复位，或非门167的输出变成“H”电平，刷新请求被输入到输出刷新脉冲发生器电路170和刷新使能信号RERF。

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