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101. 发明授权

US07656635B2 Overheat detection in thermally controlled devices 有权
标题翻译：热控装置过热检测
公开(公告)号：US07656635B2
公开(公告)日：2010-02-02
申请号：US10912977
申请日：2004-08-06
申请人： Efraim Rotem
发明人： Efraim Rotem
IPC分类号： H02H5/04 , G01K1/08
CPC分类号： G06F1/206
摘要： Systems and methods of overheat detection provide for generating a control signal on a die containing a processor based on an internal temperature of the processor and a control temperature threshold. It can be determined whether to generate a warning temperature event on the die based on a behavior of the control signal. In one embodiment, the warning temperature event provides for initiation of an automated data saving process, which reduces the abruptness of conventional warning temperature shutdowns. Other embodiments provide the user the option of saving his or her work before a shutdown temperature threshold is reached.
摘要翻译：过热检测的系统和方法提供了在基于处理器的内部温度和控制温度阈值的情况下在包含处理器的管芯上生成控制信号。可以基于控制信号的行为来确定是否在管芯上产生警告温度事件。在一个实施例中，警告温度事件提供启动自动数据保存处理，这减少了常规警告温度关闭的突然性。其他实施例为用户提供在达到关闭温度阈值之前保存他或她的工作的选项。

102. 发明申请

US20090322409A1 Power reduction apparatus and method 审中-公开
标题翻译：减电装置及方法
公开(公告)号：US20090322409A1
公开(公告)日：2009-12-31
申请号：US12215289
申请日：2008-06-26
申请人： Maxim Levit , Efraim Rotem
发明人： Maxim Levit , Efraim Rotem
IPC分类号： G05F1/567
CPC分类号： G06F1/3203 , G06F1/3296 , Y02D10/172
摘要： Provided is an approach to saving active power through lowering a supply voltage when operating temperature goes up, while substantially maintaining operating performance.
摘要翻译：提供了一种通过在工作温度升高时降低电源电压来节省有功功率的方法，同时实质上维持操作性能。

103. 发明申请

US20090172375A1 Operating Point Management in Multi-Core Architectures 有权
标题翻译：多核架构中的操作点管理
公开(公告)号：US20090172375A1
公开(公告)日：2009-07-02
申请号：US12401538
申请日：2009-03-10
申请人： Efraim Rotem , Oren Lamdan , Alon Naveh
发明人： Efraim Rotem , Oren Lamdan , Alon Naveh
IPC分类号： G06F9/00
CPC分类号： G06F1/3287 , G06F1/206 , G06F1/3203 , G06F1/3206 , G06F1/3234 , G06F1/324 , G06F1/3243 , G06F1/3275 , G06F1/3296 , G06F9/30083 , G06F9/3814 , G06F12/0862 , G06F12/0875 , G06F2212/452 , G06F2212/602 , Y02D10/126 , Y02D10/16 , Y02D10/172 , Y02D50/20
摘要： Systems and methods of managing operating points provide for determining the number of active cores in a plurality of processor cores. A maximum operating point is selected for at least one of the active cores based on the number of active cores. In one embodiment, the number of active cores is determined by monitoring an ACPI processor power state signal of each of the plurality of cores.
摘要翻译：管理操作点的系统和方法提供用于确定多个处理器核心中的活动核心的数量。基于活动核心的数量，为至少一个活动核心选择最大工作点。在一个实施例中，通过监视多个核心中的每一个的ACPI处理器功率状态信号来确定活动核心的数量。

104. 发明申请

US20090083551A1 DYNAMICALLY MANAGING THERMAL LEVELS IN A PROCESSING SYSTEM 有权
标题翻译：在处理系统中动态地管理热水平
公开(公告)号：US20090083551A1
公开(公告)日：2009-03-26
申请号：US11861186
申请日：2007-09-25
申请人： Lev Finkelstein , Aviad Cohen , Ronny Ronen , Efraim Rotem
发明人： Lev Finkelstein , Aviad Cohen , Ronny Ronen , Efraim Rotem
IPC分类号： G05D23/00 , G06F1/00
CPC分类号： G06F1/206 , G05D23/1935
摘要： A technique to dynamically maintain the thermal levels of a plurality of cores of a processing system by interleave core hopping with throttling techniques. The interleaving logic may transfer execution of threads from a hot core to a cold if core hopping is applicable. Core hopping may be applicable if there exist a cold core to which the execution of threads can be assigned to from a hot core and if the rate of occurrence of core hopping is within an allowable rate value. The interleaving logic may apply throttling techniques if core hopping is not applicable. The throttling techniques may throttle the throttling parameters, which may comprise voltage, frequency, and micro-architecture throttling parameters provided to the hot core if the core hopping is not applicable.
摘要翻译：通过采用节流技术的交错核心跳跃来动态地维持处理系统的多个核心的热水平的技术。如果核心跳跃可应用，交错逻辑可以将线程的执行从热核心转移到冷。如果存在可以从热核心分配线程的执行的冷核心以及核心跳跃的发生速率在可允许的速率值内的情况下，可以应用核心跳频。如果核心跳频不适用，交错逻辑可以应用节流技术。节流技术可以节流节流参数，其可以包括提供给热核心的电压，频率和微架构节流参数，如果核心跳频不适用。

105. 发明授权

US07363523B2 Method and apparatus for controlling power management state transitions 有权
标题翻译：用于控制电源管理状态转换的方法和装置
公开(公告)号：US07363523B2
公开(公告)日：2008-04-22
申请号：US10931565
申请日：2004-08-31
申请人： Tsvika Kurts , Alon Naveh , Efraim Rotem , Brad M. Dendinger , Jorge P. Rodriguez , Ernest Knoll , David I. Poisner
发明人： Tsvika Kurts , Alon Naveh , Efraim Rotem , Brad M. Dendinger , Jorge P. Rodriguez , Ernest Knoll , David I. Poisner
IPC分类号： G06F1/32 , G06F1/00 , G01R21/06
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： An integrated circuit device, such as a processor initiates a transition to a first power management state. The device then receives a request to exit the first power management state and, in response exits the first power management state at the highest of a reference operating voltage, such as a minimum operating voltage, and a current voltage. For one aspect, an analog to digital converter may be used to determine the current voltage level. Further, for one aspect the first power management state may be a deeper sleep (C4) state, and the processor may quickly exit to a C2 state in response to a bus event such as a bus snoop.
摘要翻译：诸如处理器的集成电路器件启动向第一电源管理状态的转变。然后，设备接收到退出第一电源管理状态的请求，并且响应于退出基准工作电压（例如最小工作电压）和当前电压的最高处的第一电源管理状态。一方面，可以使用模数转换器来确定当前的电压电平。此外，对于一个方面，第一电源管理状态可以是更深的睡眠（C 4）状态，并且处理器可以响应于总线事件（例如总线监听）而快速退出到C 2状态。

106. 发明申请

US20060090086A1 Method and apparatus to monitor power consumption of processor 有权
标题翻译：监控处理器功耗的方法和装置
公开(公告)号：US20060090086A1
公开(公告)日：2006-04-27
申请号：US10973396
申请日：2004-10-27
申请人： Efraim Rotem , Oren Lamdan
发明人： Efraim Rotem , Oren Lamdan
IPC分类号： G06F1/26
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： Briefly, a processor and a method to control a power consumption of the processor are presented. The method may include: counting a micro-architecture event of a component of the processor, estimating the power consumption value of the processor based on a weighted value of the counted micro-architecture event and filtering the weighted value of the counted micro-architecture event.
摘要翻译：简而言之，提出了一种用于控制处理器的功耗的处理器和方法。该方法可以包括：对处理器的组件的微架构事件进行计数，基于计数的微架构事件的加权值来估计处理器的功耗值，并且对计数的微架构事件的加权值进行滤波。

107. 发明申请

US20190204893A1 System, Apparatus And Method For Controlling A Processor Based On Effective Stress Information 审中-公开
公开(公告)号：US20190204893A1
公开(公告)日：2019-07-04
申请号：US15857802
申请日：2017-12-29
申请人： Efraim Rotem , Esfir Natanzon , Doron Rajwan , Eliezer Weissmann , Dorit Shapira , Lily P. Looi , Bart Plackle , Nadav Shulman
发明人： Efraim Rotem , Esfir Natanzon , Doron Rajwan , Eliezer Weissmann , Dorit Shapira , Lily P. Looi , Bart Plackle , Nadav Shulman
IPC分类号： G06F1/32 , G06F11/30 , G06F1/20
CPC分类号： G06F1/324 , G06F1/206 , G06F11/3024 , G06F11/3062
摘要： In one embodiment, a processor includes: at least one core; a stress detector coupled to the at least one core to receive at least one of a voltage and a temperature at which the processor is to operate, calculate an effective stress based at least in part thereon, and maintain an accumulated effective stress; a clock circuit to calculate a lifetime duration of the processor in a platform; a meter to receive the accumulated effective stress, the lifetime duration and a stress model value and generate a control signal based on a comparison of the accumulated effective stress and the stress model value; and a power controller to control at least one parameter of a turbo mode of the processor based at least in part on the control signal. Other embodiments are described and claimed.

108. 发明授权

US10185566B2 Migrating tasks between asymmetric computing elements of a multi-core processor 有权
公开(公告)号：US10185566B2
公开(公告)日：2019-01-22
申请号：US13994142
申请日：2012-04-27
申请人： Alon Naveh , Yuval Yosef , Eliezer Weissmann , Anil Aggarwal , Efraim Rotem , Avi Mendelson , Ronny Ronen , Boris Ginzburg , Michael Mishaeli , Scott D. Hahn , David A. Koufaty , Ganapati Srinivasa , Guy Therien
发明人： Alon Naveh , Yuval Yosef , Eliezer Weissmann , Anil Aggarwal , Efraim Rotem , Avi Mendelson , Ronny Ronen , Boris Ginzburg , Michael Mishaeli , Scott D. Hahn , David A. Koufaty , Ganapati Srinivasa , Guy Therien
IPC分类号： G06F9/30 , G06F9/48 , G06F9/50
摘要： In one embodiment, the present invention includes a multicore processor having first and second cores to independently execute instructions, the first core visible to an operating system (OS) and the second core transparent to the OS and heterogeneous from the first core. A task controller, which may be included in or coupled to the multicore processor, can cause dynamic migration of a first process scheduled by the OS to the first core to the second core transparently to the OS. Other embodiments are described and claimed.

109. 发明申请

US20180336111A1 System, Apparatus And Method For Performing In-Field Self-Testing Of A Processor 审中-公开
公开(公告)号：US20180336111A1
公开(公告)日：2018-11-22
申请号：US15599587
申请日：2017-05-19
申请人： Alexander Gendler , Efraim Rotem , Doron Rajwan , Eliezer Weissmann , Michael Mishaeli , Ilya Zegelman , Krishnakanth V. Sistla
发明人： Alexander Gendler , Efraim Rotem , Doron Rajwan , Eliezer Weissmann , Michael Mishaeli , Ilya Zegelman , Krishnakanth V. Sistla
IPC分类号： G06F11/22 , G06F1/32 , G06F13/16 , G06F11/27
CPC分类号： G06F11/2284 , G06F1/3287 , G06F1/3296 , G06F11/2236 , G06F11/27 , G06F11/321 , G06F13/1663
摘要： In one embodiment, a processor includes a core and a power controller coupled to the core that in turn includes a self-test control circuit. The self-test circuit is adapted to: isolate the core during field operation; cause the core to execute at least one diagnostic test at a first operating voltage to identify a guard band voltage for the core; and cause the core to enter into a low power state after the execution of the at least one diagnostic test. Other embodiments are described and claimed.

110. 发明授权

US10108433B2 Collaborative processor and system performance and power management 有权
公开(公告)号：US10108433B2
公开(公告)日：2018-10-23
申请号：US13977531
申请日：2011-12-30
申请人： Guy M. Therien , Paul S. Diefenbaugh , Anil Aggarwal , Andrew D. Henroid , Jeremy J. Shrall , Efraim Rotem
发明人： Guy M. Therien , Paul S. Diefenbaugh , Anil Aggarwal , Andrew D. Henroid , Jeremy J. Shrall , Efraim Rotem
IPC分类号： G06F1/32 , G06F9/44 , G06F9/4401 , G06F17/30 , G06F9/445 , G06F1/28 , G06F11/36 , G06F1/26 , G06F9/22 , G06F11/30 , G06F11/34 , G06F9/30 , G06F1/20 , G06F15/78 , G06F9/38
摘要： The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.

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