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101. 发明授权

KR100862816B1 반도체 장치 및 그 제조 방법 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：KR100862816B1
公开(公告)日：2008-10-13
申请号：KR1020020060056
申请日：2002-10-02
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 스기야마고이찌 , 다까오요시히로 , 스가따니신지 , 마쯔나가다이스께 , 와다다까유끼 , 후지따도루 , 고꾸라히까루
IPC分类号： H01L21/336
CPC分类号： H01L29/665 , H01L21/26586 , H01L21/76897 , H01L21/823412 , H01L21/823425 , H01L21/823468 , H01L21/823807 , H01L21/823864 , H01L29/1083 , H01L29/6656 , Y10S257/90
摘要： 소스/드레인인 불순물 확산층의 단부에 형성되는 포켓 영역을 갖는 반도체 장치에 관한 것으로, 포켓 형성 시에 경사 이온 주입의 마스크가 되는 게이트 전극의 변동을 방지하는 것을 목적으로 한다.
일도전형 반도체층(1) 상에 게이트 절연막(4)을 통해 형성된 게이트 전극(5)과, 게이트 전극(5)의 양측면에 형성되어 또한 반도체층(1)의 상면 사이에 스페이스(8a)를 가지고 또한 재료가 다른 제1 및 제2 절연막(6,7)으로 이루어지는 이온 주입 제어막(8)과, 반도체층(1) 내의 게이트 전극(5)의 양측방에 형성된 소스/드레인인 제1 및 제2 역도전형 불순물 확산층(10)과, 제1 및 제2 역도전형 불순물 확산층(10)의 사이이고 게이트 전극의 아래쪽에 형성되는 일도전형 채널 영역과, 게이트 전극(5)의 아래쪽의 반도체층(1) 내에서 역도전형 불순물 확산층(10)의 단부에 접합되고 또한 채널 영역보다도 일도전형 불순물 농도가 높은 일도전형 포켓 영역(9)을 포함한다.
반도체 장치, MOS 트랜지스터, 이온 주입, 채널, 불순물
摘要翻译：本发明涉及在作为源极/漏极的杂质扩散层的端部形成有袋状区域的半导体装置，其目的在于防止在形成袋状部时作为离子注入用掩模的栅电极的变动。

102. 发明公开

KR1020080084713A 배선 기판, 전자 부품의 실장 구조 및 반도체 장치 有权
标题翻译：接线板，电子元器件和半导体器件的安装结构
公开(公告)号：KR1020080084713A
公开(公告)日：2008-09-19
申请号：KR1020080023741
申请日：2008-03-14
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 니시무라다카오 , 구마가야요시카즈
IPC分类号： H01L23/12 , H05K1/18 , H01L23/48
CPC分类号： H05K3/3452 , H01L21/563 , H01L23/49816 , H01L23/49838 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/05624 , H01L2224/05647 , H01L2224/1134 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/75743 , H01L2224/81191 , H01L2224/81203 , H01L2224/81385 , H01L2224/81801 , H01L2224/83192 , H01L2224/838 , H01L2224/92125 , H01L2224/92225 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/09701 , H01L2924/10329 , H01L2924/14 , H01L2924/15311 , H01L2924/1579 , H01L2924/19041 , H01L2924/19043 , H05K3/305 , H05K2201/0989 , H05K2201/10674 , H05K2201/10977 , H05K2203/0594 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/013 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A wiring board, a mounting structure for electronic components and a semiconductor device are provided to remove voids formed in underfill material easily by matching the extensional direction of the wiring patterns, exposed in the opening, with the direction to the outer side of the semiconductor. A wiring board(31) comprises a main surface, an insulating layer(37), and an opening part(38). In the main surface, an electronic component is mounted in a face-down manner so that a surface of the electronic component having plurality of external connecting terminals faces the main surface of the wiring board. The electronic component is fixed to the wiring board by an adhesive. The insulating layer is formed on the main surface where the electronic component is mounted. The opening part is formed in the insulating layer so that a plurality of adjacent wiring patterns(34) are commonly and partially opened, and the adjacent wiring patterns have electrodes(36) where electrodes of the electronic component are connected. An outer periphery of the opening part situated at the center of the wiring board is formed in an oblique direction against extending directions of the wiring patters.
摘要翻译：提供一种布线板，电子部件用安装结构和半导体装置，通过使在开口部露出的布线图案的延伸方向与半导体的外侧方向匹配，能够容易地除去在底部填充材料中形成的空隙。布线板（31）包括主表面，绝缘层（37）和开口部分（38）。在主表面中，以面朝下的方式安装电子部件，使得具有多个外部连接端子的电子部件的表面面向布线板的主表面。电子部件通过粘接剂固定在布线基板上。绝缘层形成在安装电子部件的主表面上。开口部形成在绝缘层中，使得多个相邻的布线图案（34）共同且部分地打开，并且相邻的布线图案具有连接电子部件的电极的电极（36）。位于布线基板的中心的开口部的外周沿着布线图案的延伸方向在倾斜方向上形成。

103. 发明公开

KR1020080082914A 반도체 장치 및 그 제조 방법 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：KR1020080082914A
公开(公告)日：2008-09-12
申请号：KR1020080020891
申请日：2008-03-06
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 왕웬셍
IPC分类号： H01L27/105
CPC分类号： H01L27/11507 , H01L27/11502 , H01L28/55 , H01L28/65 , H01L28/75
摘要： A semiconductor device and a method for manufacturing the same are provided to improve retention characteristics by forming an upper electrode of which a crystal state is controlled. A capacitor structure is formed over a semiconductor substrate(1). The capacitor structure is configured by inserting a capacitor layer between an upper electrode(11) and a lower electrode(9). An upper electrode is comprised of a first layer, a second layer, and a third layer. The first layer is made of an oxide that is represented by a chemical formula of M1Ox1 using a composition parameter(x1), and represented by a chemical formula M1Ox2 using a composition parameter(x2). The second layer is formed on the first layer and made of an oxide that is represented by a chemical formula of M2Oy1 using a composition parameter(y1), and represented by a chemical formula of M2oY2 using a composition parameter(y2). The third layer is formed on the second layer and made of an oxide that is represented by a chemical formula of M3Oz1 using a composition parameter(z1), and represented by a chemical formula of M3Oz2 using a composition parameter(z2). The second layer has an oxidation ratio greater than those of the first and third layers, and y2/y1>x2/x1, y2/y1>z2/z1, and z2/z1 x2/x1 are satisfied.
摘要翻译：提供半导体器件及其制造方法，以通过形成控制晶体状态的上电极来改善保持特性。在半导体衬底（1）上形成电容器结构。电容器结构通过在上电极（11）和下电极（9）之间插入电容器层来构成。上电极由第一层，第二层和第三层组成。第一层由使用组成参数（x1）由化学式M1Ox1表示并由组成参数（x2）由化学式M1Ox2表示的氧化物制成。第二层由第一层形成，由使用组成参数（y1）由化学式M2Oy1表示的氧化物形成，并使用组成参数（y2）由化学式M2oY2表示。第三层由第二层形成，由使用组成参数（z1）由化学式M3Oz1表示的氧化物形成，并使用组成参数（z2）由化学式M3Oz2表示。第二层的氧化比大于第一层和第三层的氧化比，并且满足y2 / y1> x2 / x1，y2 / y1> z2 / z1和z2 / z1×2 / x1。

104. 发明公开

KR1020080080953A 반도체 장치 및 그 제조 방법 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：KR1020080080953A
公开(公告)日：2008-09-05
申请号：KR1020080019380
申请日：2008-02-29
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 사꾸마다까시
IPC分类号： H01L21/265
CPC分类号： H01L21/823412 , H01L21/3145
摘要： A semiconductor device is provided to stably form a pocket region by avoiding a shadowing phenomenon caused by a photoresist layer. On a semiconductor substrate(10) having a first region and a second region adjacent to the first region, an isolation layer(12) is formed in the boundary between the first and second regions wherein the isolation layer delimits a first active region in the first region and a second active region in the second region. A gate electrode(20) is formed on the first active region by interposing a gate insulation layer(18). A first photoresist layer is formed on the substrate having the gate electrode, having an opening that covers the second region and exposes the first active region wherein the edge portion of the opening in the boundary is positioned in the second active region rather than in the center of the isolation layer. By using the first photoresist layer and the gate electrode as a mask, an ion implantation process is slantingly performed with respect to the normal direction of the substrate to form a pair of pocket regions(24) in the semiconductor substrate at both sides of the gate electrode.
摘要翻译：提供半导体器件以通过避免由光致抗蚀剂层引起的阴影现象来稳定地形成袋区域。在具有与第一区域相邻的第一区域和第二区域的半导体衬底（10）上，在第一和第二区域之间的边界中形成隔离层（12），其中隔离层限定第一区域中的第一有源区域区域和第二区域中的第二活性区域。通过插入栅绝缘层（18）在第一有源区上形成栅电极（20）。在具有栅电极的基板上形成第一光致抗蚀剂层，具有覆盖第二区域的开口，并露出第一有源区域，其中边界中的开口的边缘部分位于第二有源区域而不是中心的隔离层。通过使用第一光致抗蚀剂层和栅电极作为掩模，相对于衬底的法线方向倾斜地执行离子注入工艺，以在栅极两侧的半导体衬底中形成一对凹穴区域（24）电极。

105. 发明公开

KR1020080078569A 캐리어 테이프, 전자부품 수용체 및 전자부품의 반송 방법 有权
标题翻译：载体带，电子部件容纳部件和运输电子部件的方法
公开(公告)号：KR1020080078569A
公开(公告)日：2008-08-27
申请号：KR1020080015697
申请日：2008-02-21
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 하마나카유우조우 , 안도유키오 , 사사무라게이이치 , 야자키겐이치 , 하세가와유우지 , 신야고우이치
IPC分类号： B65D85/86 , B65D73/02
CPC分类号： H05K13/0084
摘要： A carrier tape having multiple indented receiving parts for electronic components, an electronic components receiving body using the same and a method for returning electronic components are provided to prevent separation and movement of the electronic components in the receiving part by pressurizing them certainly. An electronic component receiving body(40) comprises: a carrier tape(41) which has multiple indented receiving parts(47) formed in longitudinal direction of the tape; a cover tape(42) to cover multiple topside opened holes, which comprises double structure of PET resins and polyethylene derived resins, or olefin derived resins and polyethylene derived resins; and a reel(43) on which the carrier tape is wounded.
摘要翻译：具有多个用于电子部件的缩进接收部件的载带，使用该凹部的电子部件接收体以及返回电子部件的方法被设置成防止电子部件通过对它们进行加压来分离和移动。电子部件接收体（40）包括：载带（41），其具有沿着带的长度方向形成的多个凹部接收部（47）覆盖多个顶侧开孔的盖带（42），其包括PET树脂和聚乙烯衍生树脂的双重结构，或烯烃衍生的树脂和聚乙烯衍生的树脂; 以及卷筒（43），载带被卷绕在该卷轴上。

106. 发明公开

KR1020080077985A 반도체 장치 및 그 제조 방법 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：KR1020080077985A
公开(公告)日：2008-08-26
申请号：KR1020087014660
申请日：2005-12-28
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 스가와라히로키 , 나가이고우이치
IPC分类号： H01L21/8247 , H01L21/768
CPC分类号： H01L28/57 , H01L21/76801 , H01L21/76829 , H01L21/76838 , H01L27/11507 , H01L27/11509
摘要： A ferroelectric capacitor is formed above a semiconductor substrate (1), and wiring (24a) is then formed. A barrier film (25) for covering the wiring (24a) is formed. A silicon oxide film (26) for filling a space between adjacent wirings (24a) is formed. The silicon oxide film (26) is polished by CMP until the surface of the barrier film (25) is exposed. A barrier film (27) is formed on the barrier film (25) and the silicon oxide film (26). An aluminum oxide film is formed as the barrier films (25, 27).
摘要翻译：在半导体基板（1）的上方形成铁电电容器，形成配线（24a）。形成用于覆盖布线（24a）的阻挡膜（25）。形成用于填充相邻布线（24a）之间的空间的氧化硅膜（26）。通过CMP抛光氧化硅膜（26），直到暴露出阻挡膜（25）的表面。在阻挡膜（25）和氧化硅膜（26）上形成阻挡膜（27）。形成氧化铝膜作为阻挡膜（25,27）。

107. 发明公开

KR1020080077557A Ｉ／Ｏ 회로 有权
标题翻译： I / O电路
公开(公告)号：KR1020080077557A
公开(公告)日：2008-08-25
申请号：KR1020080013458
申请日：2008-02-14
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 스즈키데루오
IPC分类号： H01L27/04 , H01L27/088 , H01L21/822 , H03K19/003
摘要： An I/O circuit is provided to reduce the size of a NMOS driver at a ground among NMOS drivers serially connected, and to shorten activation transition time of the NMOS driver at a ground. An I/O circuit comprises a first NMOS driver(10), a second NMOS driver(11), and a level converter, and a first NMOS transistor(26). A drain contacts a pad in the first NMOS driver contacts. The second NMOS driver is installed in a region different from the first NMOS driver. On the second NMOS driver, a drain contacts a source of the first NMOS driver, and a source contacts a ground potential. The level converter is configured to convert inner power potential level into power potential level. The first NMOS transistor includes a drain, a source, and a gate. The drain of the first NMOS transistor contacts one output terminal of the level converter. The source of the first NMOS transistor contacts a ground potential. The gate of the first NMOS transistor contacts the other output terminal of the level converter.
摘要翻译：提供了一个I / O电路，以减小串联连接的NMOS驱动器之间的接地NMOS驱动器的尺寸，并缩短NMOS驱动器在地的激活转换时间。 I / O电路包括第一NMOS驱动器（10），第二NMOS驱动器（11）和电平转换器以及第一NMOS晶体管（26）。漏极接触第一个NMOS驱动器触点中的焊盘。第二NMOS驱动器安装在与第一NMOS驱动器不同的区域中。在第二NMOS驱动器上，漏极接触第一NMOS驱动器的源极，并且源极接地电位。电平转换器被配置为将内部功率电平电平转换为功率电平电平。第一NMOS晶体管包括漏极，源极和栅极。第一NMOS晶体管的漏极接触电平转换器的一个输出端。第一NMOS晶体管的源极接地电位。第一NMOS晶体管的栅极接触电平转换器的另一个输出端。

108. 发明公开

KR1020080076731A 전자부품의 실장 방법 有权
标题翻译：安装电子元件的方法
公开(公告)号：KR1020080076731A
公开(公告)日：2008-08-20
申请号：KR1020080008438
申请日：2008-01-28
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 니시무라다카오 , 나리사와요시아키
IPC分类号： H05K13/04
CPC分类号： H05K3/305 , H01L21/561 , H01L21/563 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/743 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/91 , H01L24/97 , H01L25/0655 , H01L25/50 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/2731 , H01L2224/27901 , H01L2224/29014 , H01L2224/29015 , H01L2224/29019 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/29191 , H01L2224/2929 , H01L2224/29291 , H01L2224/29339 , H01L2224/29355 , H01L2224/3003 , H01L2224/30051 , H01L2224/30131 , H01L2224/30141 , H01L2224/30177 , H01L2224/32055 , H01L2224/32056 , H01L2224/32057 , H01L2224/32225 , H01L2224/3303 , H01L2224/33051 , H01L2224/3313 , H01L2224/3314 , H01L2224/33177 , H01L2224/73204 , H01L2224/75251 , H01L2224/75743 , H01L2224/75841 , H01L2224/81444 , H01L2224/83192 , H01L2224/83194 , H01L2224/8385 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/15311 , H01L2924/15787 , H01L2924/1579 , H05K2201/10674 , H05K2201/10977 , H05K2203/0126 , H05K2203/0545 , Y02P70/613 , H01L2924/07025 , H01L2924/00 , H01L2924/00012 , H01L2924/0695 , H01L2224/0401
摘要： A method for mounting electronic components is provided to improve reliability by equally applying adhesives on mounting parts of the electronic components when mounting the electronic components on a support substrate. A method for mounting electronic components includes the steps of: arranging an adhesive(12-1 to 12-5) on each of a plurality of electronic component mounting parts(S1-S5) on a support substrate(10); and adhering each of the electronic components on each of the plurality of electronic component mounting parts by the adhesive. In the first step, a centroid of volume of the adhesive arranged on the mounting part where the N th electronic component is mounted is arranged adjacently to the mounting part where the N th electronic component is mounted. The centroid is shifted to adjacent direction on the mounting part where the electronic component before the N-1 th is mounted. The n is greater than 1.
摘要翻译：提供了一种用于安装电子部件的方法，以便在将电子部件安装在支撑基板上时，通过在电子部件的安装部上同样地施加粘合剂来提高可靠性。一种用于安装电子部件的方法包括以下步骤：在支撑基板（10）上的多个电子部件安装部（S1-S5）的每一个上布置粘合剂（12-1至12-5）; 并且通过粘合剂将每个电子部件粘附在多个电子部件安装部件中的每一个上。在第一步骤中，安装在安装有第N个电子部件的安装部上的胶粘剂的体积重心与安装第N个电子部件的安装部相邻。在安装N-1之前的电子部件的安装部上，质心向相邻方向移动。 n大于1。

109. 发明公开

KR1020080076725A 직류-직류 변환 회로, 직류-직류 변환 제어 회로,직류-직류 변환 제어 방법 有权
标题翻译： DC-DC转换器，DC-DC转换器控制电路，DC-DC转换器控制方法
公开(公告)号：KR1020080076725A
公开(公告)日：2008-08-20
申请号：KR1020080006649
申请日：2008-01-22
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 하세가와모리히토 , 오자와히데키요
IPC分类号： H02M3/155
CPC分类号： H02M1/36 , H02M1/32 , H02M3/156 , Y10S323/901
摘要： A DC-DC conversion circuit, a DC-DC conversion control circuit, and a DC-DC conversion control method are provided to prevent inrush current by reducing time for converting a control signal related to output control in starting of the DC-DC conversion circuit and removing an uncontrolled state of the DC-DC conversion circuit. In a DC-DC conversion circuit(CNV1), a plurality of control signal generating circuits are installed to correspond to a plurality of control signals. Each of the control signal generating circuits generates the corresponding control signal among the plurality of control signals based on a corresponding output value among a plurality of output values. A plurality of soft start control circuits(CS1,CS2) are installed to correspond to the plurality of control signals. Each of the soft start control circuits controls a variation of the corresponding control signal in starting of the DC-DC conversion circuit. A start control circuit commands the corresponding soft start control circuit to start operation according to a change of the control signal related to output control in the starting of the DC-DC conversion circuit.
摘要翻译：提供DC-DC转换电路，DC-DC转换控制电路和DC-DC转换控制方法，以防止在直流 - 直流转换电路启动时转换与输出控制相关的控制信号的时间的浪涌电流以及去除DC-DC转换电路的不受控状态。在DC-DC转换电路（CNV1）中，安装多个控制信号生成电路以对应于多个控制信号。控制信号生成电路中的每一个基于多个输出值中的对应的输出值，生成多个控制信号中的对应的控制信号。安装多个软启动控制电路（CS1，CS2）以对应于多个控制信号。每个软启动控制电路控制DC-DC转换电路启动时相应控制信号的变化。启动控制电路根据在DC-DC转换电路起动时与输出控制相关的控制信号的变化，命令对应的软启动控制电路开始工作。

110. 发明公开

KR1020080072089A 고체 촬상 소자 및 암전류 성분 제거 방법 有权
标题翻译：固态图像拾取器件和暗电流分量去除方法
公开(公告)号：KR1020080072089A
公开(公告)日：2008-08-05
申请号：KR1020087015797
申请日：2005-12-27
申请人： 후지쯔 세미컨덕터 가부시키가이샤
发明人： 히구치츠요시
IPC分类号： H04N5/357 , H04N5/361
CPC分类号： H04N5/37455 , H03M1/0604 , H03M1/123 , H03M1/56 , H04N5/361
摘要： To remove, from pixel signals, dark current components, which varies with temperature, without degrading the resolution during A/D conversion. A D/A converter (11) generates a reference signal that increases from a predetermined initial signal level at a constant gradient. A comparator (12) compares a pixel signal with the reference signal. A counter (13) performs a counting in synchronization with the increase of the reference signal. A latch circuit (14) holds as a quantized value of the pixel signal. An average value calculating part (15) calculates an average value of the quantized values of the pixel signals read from a plurality of light-shielded pixels. A reference signal adjusting part (16) establishes, based on the average value, the initial signal level of the reference signal to be compared with the pixel signals read from light-receiving pixels.
摘要翻译：从像素信号中去除随温度变化的暗电流分量，而不会降低A / D转换期间的分辨率。 D / A转换器（11）产生以恒定梯度从预定的初始信号电平增加的参考信号。比较器（12）将像素信号与参考信号进行比较。计数器（13）与参考信号的增加同步地进行计数。锁存电路（14）保持像素信号的量化值。平均值计算部（15）计算从多个遮光像素读取的像素信号的量化值的平均值。参考信号调整部（16）基于平均值建立与从受光像素读取的像素信号进行比较的参考信号的初始信号电平。

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