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91. 发明申请

WO1997004326A1 A CIRCUIT PROVIDED WITH FACILITIES FOR IDDQ-TESTING OF A BIAS GENERATOR 审中-公开
标题翻译：提供有关BIID发电机IDDQ测试设备的电路
公开(公告)号：WO1997004326A1
公开(公告)日：1997-02-06
申请号：PCT/IB1996000657
申请日：1996-07-08
申请人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB
发明人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB , SACHDEV, Manoj , ATZEMA, Botjo
IPC分类号： G01R31/28
CPC分类号： H03M1/108 , G01R31/3004 , G01R31/3008 , H03M1/36
摘要： A bias generator is tested in an IDDQ-scheme by applying each respective one of the bias voltages to a respective PFET that is individually gated by a respective NFET. This permits measuring the quiescent currents. Any deviation in the bias voltages is translated into a deviation of the quiescent current.
摘要翻译：通过将各自的偏置电压施加到由相应的NFET单独门控的相应PFET，以IDDQ方案测试偏置发生器。这允许测量静态电流。偏置电压的任何偏差被转换为静态电流的偏差。

92. 发明授权

KR101187065B1 시험 장치, 시험 방법 및 기록 매체 失效
标题翻译：测试装置，测试方法和记录介质
公开(公告)号：KR101187065B1
公开(公告)日：2012-09-28
申请号：KR1020090100965
申请日：2009-10-23
申请人： 가부시키가이샤 어드밴티스트 , 고쿠리츠다이가쿠호우진 도쿄다이가쿠
发明人： 후루카와,야스오 , 페이,고어슈인 , 코마츠,사토시 , 후지타,마사히로
IPC分类号： G01R31/3183 , G01R31/26 , H01L21/66
CPC分类号： G01R31/318307 , G01R31/3008 , G01R31/318342
摘要： 시험 벡터를 순차적으로 생성하는 벡터 전개부와, 각각의 시험 벡터에 따른 시험 신호를 피시험 디바이스에 공급했을 경우에 측정되어야 할 피시험 디바이스의 소정의 특성값에 대해, 피시험 디바이스의 동작을 시뮬레이트하는 것으로, 시험 벡터마다 시뮬레이트값을 산출하는 시뮬레이트부와, 각각의 시험 벡터를 피시험 디바이스에 공급했을 때의, 피시험 디바이스의 소정의 특성값을 측정해, 시험 벡터마다 측정값을 취득하는 측정부와, 각각의 시험 벡터에 대한, 대응하는 시뮬레이트값 및 측정값의 비에 기초하여 피시험 디바이스의 양부를 판정하는 판정부를 포함하는 시험 장치를 제공한다.
시험 장치, 피시험 디바이스, 시험 벡터, 벡터 전개부, 시뮬레이트

93. 发明授权

KR101124665B1 누설전류 측정회로 및 누설전류 비교회로 有权
标题翻译：泄漏电流检测电路和漏电流比较电路
公开(公告)号：KR101124665B1
公开(公告)日：2012-03-28
申请号：KR1020050061782
申请日：2005-07-08
申请人： 삼성전자주식회사
发明人： 정건옥
IPC分类号： G01R31/02
CPC分类号： G01R31/275 , G01R31/2621 , G01R31/3008 , H03K2217/0036
摘要： 모스트랜지스터의 사이즈 변화에 따른 기판누설전류 및 게이트누설전류를 측정하는 누설전류 측정회로 및 상기 기판누설전류 및 상기 게이트누설전류 중에서 어느 것이 지배적인 누설전류인가를 판정하는 누설전류 비교회로를 개시한다. 상기 누설전류 측정회로는, 전하공급원, 누설전류 발생부 및 검출신호 발생부를 구비한다. 상기 누설전류 비교회로는, 전하공급원, 누설전류 비교부 및 검출신호 발생부를 구비한다.
누설전류, 기판 누설전류, 게이트 절연막 누설전류

94. 发明公开

KR1020070112195A 전류 측정 장치, 시험 장치, 전류 측정 방법, 및 시험 방법 失效
标题翻译：电流测量装置，测试装置，电流测量方法和测试方法
公开(公告)号：KR1020070112195A
公开(公告)日：2007-11-22
申请号：KR1020077021248
申请日：2006-02-22
申请人： 주식회사 아도반테스토
发明人： 하시모토요시히로
IPC分类号： G01R31/02 , G01R31/28
CPC分类号： G01R31/31924 , G01R19/0092 , G01R31/3008
摘要： A current measuring device measures a current which an electronic device receives from an input terminal. The current measuring device is provided with a first capacitor which accumulates a reference supply voltage to be a reference of a voltage to be supplied to the electronic device while the current is being measured; a first switch which connects a power supply to the first capacitor before measuring the current, permits the first capacitor to accumulate the reference supply voltage, and cuts the power supply from the first capacitor while the current is being measured; a current supplying section which supplies the electronic device with the current based on the reference supply voltage accumulated in the first capacitor and a terminal voltage of the input terminal; and a first current measuring section which measures a supply current supplied to the electronic device.
摘要翻译：电流测量装置测量电子设备从输入端子接收的电流。电流测量装置设置有第一电容器，该电容器在测量电流的同时，将参考电源电压积累为要提供给电子设备的电压的基准; 在测量电流之前将电源连接到第一电容器的第一开关允许第一电容器累积参考电源电压，并且在测量电流的同时切断来自第一电容器的电源; 电流供应部，其基于在第一电容器中累积的基准电源电压和输入端子的端子电压向电子装置供给电流; 以及第一电流测量部分，其测量供应到电子设备的电源电流。

95. 发明公开

KR1020070006448A 누설전류 측정회로 및 누설전류 비교회로 有权
标题翻译：泄漏电流检测电路和泄漏电流比较电路
公开(公告)号：KR1020070006448A
公开(公告)日：2007-01-11
申请号：KR1020050061782
申请日：2005-07-08
申请人： 삼성전자주식회사
发明人： 정건옥
IPC分类号： G01R31/02
CPC分类号： G01R31/275 , G01R31/2621 , G01R31/3008 , H03K2217/0036
摘要： A leakage current measurement circuit and a leakage current comparison circuit are provided to detect the current leaking through an MOS(Metal Oxide Semiconductor) transistor substrate and a gate insulator and to compare the charge quantity leaking through both the substrate and the gate insulator. A leakage current measurement circuit(100) includes a charge supply source(110) for delivering charge supplied from a first or second power source(VDD,VSS) in response to an enable signal(EN) or an inverse enable signal(ENB) with the opposite phase to the enable signal and a leakage current generating unit(120) for flowing the charge transmitted from the charge supply source to the first or second power source. The first power source has a power level relatively higher than that of the second power source.
摘要翻译：提供泄漏电流测量电路和漏电流比较电路，以检测通过MOS（金属氧化物半导体）晶体管衬底和栅极绝缘体泄露的电流，并比较通过衬底和栅绝缘体泄漏的电荷量。泄漏电流测量电路（100）包括用于响应于使能信号（EN）或反向使能信号（ENB）传送从第一或第二电源（VDD，VSS）提供的电荷的充电源（110）与使能信号相反的相位和用于使从电荷源发送到第一或第二电源的电荷的泄漏电流产生单元（120）。第一电源具有相对高于第二电源的功率电平。

96. 发明授权

KR100265546B1 고장지점을식별하는방법및시스템 失效
标题翻译：运输轮胎和轮胎运输车辆的方法
公开(公告)号：KR100265546B1
公开(公告)日：2000-09-15
申请号：KR1019970035802
申请日：1997-07-29
申请人： 닛본 덴끼 가부시끼가이샤
发明人： 사나다마사루
IPC分类号： G06F17/50
CPC分类号： G01R31/3004 , G01R31/3008
摘要： 본 발명의 고장 지점 식별 방법은 여러 가지 결함에 적용 가능하며 고장 지점을 신속하게 식별할 수 있다. LSI 테스터(4)는 Iddq값을 측정하기 위해, 장전된 LSI(5)의 입력 단자를 통해서 테스트 벡터 파일(1)에 기억된 테스트 벡터들을 순차적으로 인가한다. 비정상적인 Iddq값을 발생했던 테스트 벡터의 테스트 벡터 번호는 고장 블럭 추출기(2)로 전달된다. 고장 블럭 추출기(2)는 테스트 벡터 파일(1)에 기억된 각 테스트 벡터가 LSI(5)의 입력 단자로 입력될 때 LSI(5)의 각 블럭의 입력 논리를 알아내기 위한 논리 시뮬레이션을 행한다. 또한, 각 테스트 벡터 번호를 입력 논리와 연관시킨 덤프 리스트는 블럭 별로 준비된다. 그 후에, 고장 블럭이 각 블럭의 덤프 리스트 및 LSI 테스터로부터의 테스트 벡터 번호의 전달에 기초하여 식별된다.

97. 发明公开

EP2977770A4 LEAKAGE CURRENT DETECTION METHOD AND DEVICE 有权
标题翻译：漏电流检测方法和装置
公开(公告)号：EP2977770A4
公开(公告)日：2016-07-06
申请号：EP14834041
申请日：2014-01-22
申请人： HUAWEI TECH CO LTD
发明人： ZHU QINGSONG , XIE LUJUN
IPC分类号： G01R19/00 , G01R31/02 , G01R31/28 , G01R31/30
CPC分类号： G01R31/025 , G01R31/2812 , G01R31/2813 , G01R31/3008
摘要： The present invention relates to a leakage current detection method and apparatus. The method is applied to leakage current detection for a board-mounted component on a PCBA board, and includes: providing a fixed voltage for a leakage current input end of a board-mounted component under detection, and connecting an leakage current output end to an inverting input end of an operational amplifier of a resistance testing module, where the resistance testing module includes the operational amplifier and a reference resistor that is connected between the inverting input end of the operational amplifier and the leakage current output end; detecting an output voltage of the resistance testing module; and calculating, based on Ohm's law and according to the output voltage and the reference resistor, a leakage current flowing through the board-mounted component under detection. According to the present invention, the board-mounted component under detection is connected to the resistance testing module, and a specific voltage is applied. In this way, the leakage current of the board-mounted component on the PCBA board can be calculated according to the reference resistor of the resistance testing module and the output voltage of the operational amplifier. Batch detection can be implemented without a need of removing the board-mounted component from the board, and the detection has high accuracy, high efficiency, and a great ratio.

98. 发明公开

EP2531866A2 QUIESCENT CURRENT (IDDQ) INDICATION AND TESTING APPARATUS AND METHODS 审中-公开
标题翻译： DEVICE AND METHOD FOR闭合电路显示和测试
公开(公告)号：EP2531866A2
公开(公告)日：2012-12-12
申请号：EP11737456.1
申请日：2011-01-19
申请人： Freescale Semiconductor, Inc.
发明人： JARRIGE, Nicolas, A. , KANDAH, Ibrahim, Shihadeh
IPC分类号： G01R31/02 , G01R31/28
CPC分类号： G01R31/3008 , Y10T29/49155
摘要： An embodiment of an electronic device includes a logic circuit (130), a switching element (132), and a quiescent current (IDDQ) evaluation circuit (134). The logic circuit (130) is coupled to a first ground node (154). The switching element (132) is coupled between the first ground node (154) and a second ground node (156). The switching element (132) is configurable in an electrically non-conductive state when the electronic device is in an IDDQ evaluation state (216), and in an electrically conductive state when the electronic device is not in the IDDQ evaluation state (213). When the electronic device is in the IDDQ evaluation state, the IDDQ evaluation circuit (134) is configured to provide (224) a first output signal when an IDDQ indicating voltage across the first and second ground nodes (154, 156) exceeds a reference voltage (220). Other embodiments include methods (FIG. 2) for producing an indication of IDDQ in an electronic device and methods (FIG. 4) for fabricating an electronic device with the capability of producing an IDDQ indication.

99. 发明授权

EP2093580B1 Supply current based testing of CMOS output stages 有权
标题翻译：提供CMOS输出级的基于电流的测试
公开(公告)号：EP2093580B1
公开(公告)日：2012-08-15
申请号：EP08368004.1
申请日：2008-02-25
申请人： Dialog Semiconductor GmbH
发明人： von Staudt, Hans Martin , Somerville, Alan
IPC分类号： G01R31/319 , G01R31/30
CPC分类号： G01R31/31924 , G01R31/3008

100. 发明授权

EP2064562B1 TESTABLE INTEGRATED CIRCUIT AND IC TEST METHOD 有权
标题翻译：可验证的集成电路和IC测试程序
公开(公告)号：EP2064562B1
公开(公告)日：2010-04-21
申请号：EP07826254.0
申请日：2007-09-04
申请人： NXP B.V.
发明人： RIUS VAZQUEZ, Josep , VILLAGRA, Luis Elvira , MEIJER, Rinze I., M., P.
IPC分类号： G01R31/30
CPC分类号： G01R31/3008

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