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91. 发明申请

US20070069207A1 Method and system of trace pull test 有权
标题翻译：牵引试验方法和系统
公开(公告)号：US20070069207A1
公开(公告)日：2007-03-29
申请号：US11235485
申请日：2005-09-26
申请人： Wen-Kun Yang , Cheng Tai
发明人： Wen-Kun Yang , Cheng Tai
IPC分类号： H01L23/58
CPC分类号： G01R1/07314 , H01L2224/05001 , H01L2224/05022 , H01L2224/05024 , H01L2224/05124 , H01L2224/05548 , H01L2224/11 , H01L2924/00014
摘要： The present invention provides an efficient test method and system for testing the IC package, such as BGA types of packages. With the present invention, manufacturer can have an easier way in testing various types of packages, including newer types. Manufacturer also can get the testing outcome which is more accurate. Furthermore, help the manufacturer to achieve a quite improvement in IC packaging process.
摘要翻译：本发明提供了用于测试IC封装的有效的测试方法和系统，例如BGA类型的封装。通过本发明，制造商可以使用更简单的方法来测试各种类型的包装，包括较新的包装。制造商也可以获得更准确的测试结果。此外，帮助制造商实现IC封装过程的相当改进。

92. 发明申请

US20070059866A1 Fan out type wafer level package structure and method of the same 审中-公开
公开(公告)号：US20070059866A1
公开(公告)日：2007-03-15
申请号：US11595970
申请日：2006-11-13
申请人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
发明人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
IPC分类号： H01L21/00
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/24195 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/15788 , H01L2924/19041 , H01L2224/82 , H01L2924/00
摘要： To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.

93. 发明申请

US20060231958A1 FAN OUT TYPE WAFER LEVEL PACKAGE STRUCTURE AND METHOD OF THE SAME 有权
标题翻译：风扇式水平包装结构及其方法
公开(公告)号：US20060231958A1
公开(公告)日：2006-10-19
申请号：US11456141
申请日：2006-07-07
申请人： Wen-Kun Yang
发明人： Wen-Kun Yang
IPC分类号： H01L23/52
CPC分类号： H01L23/5389 , H01L23/3128 , H01L23/544 , H01L24/19 , H01L24/24 , H01L24/32 , H01L24/73 , H01L24/83 , H01L24/92 , H01L24/97 , H01L2223/54433 , H01L2223/54486 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/24145 , H01L2224/24195 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/83192 , H01L2224/83862 , H01L2224/83874 , H01L2224/92244 , H01L2224/97 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/19041 , H01L2924/19105 , H01L2224/83 , H01L2224/82
摘要： To pick and place standard dice on a new base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type wafer level package. Moreover, the die may be packaged with passive components or other dice with a side by side structure or a stacking structure.
摘要翻译：在新的基础上选择和放置标准骰子，以获得骰子之间适当和更宽的距离，而不是晶片上骰子的原始距离。封装结构具有比通过扇出型晶片级封装的芯片尺寸更大的球阵列尺寸。此外，管芯可以与被动部件或其他具有并排结构或堆叠结构的管芯封装。

94. 发明申请

US20050242408A1 Structure of image sensor module and a method for manufacturing of wafer level package 有权
标题翻译：图像传感器模块的结构和晶圆级封装的制造方法
公开(公告)号：US20050242408A1
公开(公告)日：2005-11-03
申请号：US10833345
申请日：2004-04-28
申请人： Wen-Kun Yang , Wen-Pin Yang
发明人： Wen-Kun Yang , Wen-Pin Yang
IPC分类号： H01L27/14 , H01L21/00 , H01L21/50 , H01L21/56 , H01L23/12 , H01L23/50 , H01L27/144 , H01L27/146 , H01L29/06 , H01L31/00 , H01L31/0203 , H01L31/0232 , H01L31/10 , H04N5/225 , H05K1/18
CPC分类号： H01L27/14687 , H01L21/561 , H01L24/97 , H01L27/14618 , H01L27/14625 , H01L27/14627 , H01L27/14632 , H01L27/14685 , H01L31/0203 , H01L31/02325 , H01L2224/04105 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/32145 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2924/01068 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/15788 , H05K1/189 , H01L2924/00 , H01L2224/83 , H01L2224/82
摘要： The present invention discloses an image sensor module and forming method of wafer level package. The image sensor module comprises an isolating base, a wafer level package, a lens holder, and a F.P.C.. The wafer level package having a plurality of image sensor dies and a plurality of solder balls is attached to the isolating base. A plurality of lens are placed in the lens holder, and the lens holder is located on the image sensor dies. The lens holder is placed in the F.P.C., and the F.P.C. has a plurality of solder joints coupled to the solder balls for conveniently transmitting signal of the image sensor dies. Moreover, the image sensor dies may be packaged with passive components or other dies with a side by side structure or a stacking structure.
摘要翻译：本发明公开了一种图像传感器模块和晶片级封装的形成方法。图像传感器模块包括隔离基座，晶片级封装，透镜保持器和F.P.C。具有多个图像传感器管芯和多个焊球的晶片级封装件附接到隔离基座。多个透镜被放置在透镜保持器中，并且透镜保持器位于图像传感器模具上。镜头架放置在F.P.C.和F.P.C. 具有耦合到焊球的多个焊点，用于方便地传输图像传感器管芯的信号。此外，图像传感器管芯可以与无源部件或具有并排结构或堆叠结构的其它管芯一起封装。

95. 发明授权

US08350377B2 Semiconductor device package structure and method for the same 有权
标题翻译：半导体器件的封装结构和方法相同
公开(公告)号：US08350377B2
公开(公告)日：2013-01-08
申请号：US12855705
申请日：2010-08-13
申请人： Wen-Kun Yang
发明人： Wen-Kun Yang
IPC分类号： H01L23/48
CPC分类号： H01L23/49816 , H01L21/6835 , H01L23/5384 , H01L23/5389 , H01L23/544 , H01L24/16 , H01L24/24 , H01L24/29 , H01L24/31 , H01L24/82 , H01L24/83 , H01L24/97 , H01L25/105 , H01L25/16 , H01L2221/68354 , H01L2221/68359 , H01L2223/54426 , H01L2223/54473 , H01L2223/5448 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/05624 , H01L2224/16225 , H01L2224/16235 , H01L2224/24225 , H01L2224/24227 , H01L2224/2919 , H01L2224/32225 , H01L2224/73267 , H01L2224/82039 , H01L2224/82047 , H01L2224/83101 , H01L2224/83121 , H01L2224/8385 , H01L2224/92244 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15192 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/351 , H01L2224/82 , H01L2224/83 , H01L2924/00 , H01L2924/01022 , H01L2924/01028 , H01L2924/3512 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： The present invention discloses a semiconductor device package and the method for the same. The method includes preparing a first substrate and a second substrate; opening a die opening window through the second substrate by using laser or punching; preparing an adhesion material; attaching the first substrate to the second substrate by the adhesion material; aligning a die by using the aligning mark of the die metal pad and attaching the die onto the die metal pad with force by the adhesion material; forming a first dielectric layer on top surfaces of the second substrate and the die and pushing the first dielectric layer into gap between the side wall of the die and the side wall of the die opening window under vacuum condition; opening a plurality of via openings in the first dielectric layer; and forming a redistribution layer in the plurality of via openings and on the first dielectric layer.
摘要翻译：本发明公开了一种半导体器件封装及其制造方法。该方法包括制备第一衬底和第二衬底; 通过使用激光或冲孔打开通过第二基板的模具开口窗口; 制备粘合材料; 通过粘合材料将第一基板附着到第二基板; 通过使用模具金属垫的对准标记对准模具，并通过粘合材料的力将模具附着在模具金属垫上; 在所述第二基板和所述模具的顶表面上形成第一电介质层，并且在真空条件下将所述第一介电层推压到所述模具的侧壁与所述模具开口窗的侧壁之间的间隙中; 在所述第一电介质层中打开多个通孔; 以及在所述多个通孔中和所述第一介电层上形成再分配层。

96. 发明申请

US20120037935A1 Substrate Structure of LED (light emitting diode) Packaging and Method of the same 审中-公开
标题翻译： LED（发光二极管）的基板结构包装及其方法
公开(公告)号：US20120037935A1
公开(公告)日：2012-02-16
申请号：US12855706
申请日：2010-08-13
申请人： Wen-Kun Yang
发明人： Wen-Kun Yang
IPC分类号： H01L33/48 , H01L33/00
CPC分类号： H01L33/641 , H01L24/73 , H01L31/0203 , H01L33/486 , H01L33/60 , H01L33/62 , H01L33/642 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2933/0033 , H01L2224/48091 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： The present invention provides a substrate for LED packaging and a fabrication method thereof. The substrate can dissipate heat quickly and enhance light emitting efficiency. For this purpose, several via holes are formed in the substrate and metal layers are coated to act as light reflector. In the substrate, the via holes are filled with the material with high thermal conductivity, such as Copper, to conduct the heat efficiently; and the reflector are coated the metal with high reflection factor to visible light, such as Ag, Au, Al, to enhance the light emitting efficiency.
摘要翻译：本发明提供一种LED封装用基板及其制造方法。基板可以快速散热并提高发光效率。为此，在衬底中形成几个通孔，涂覆金属层作为光反射器。在基板中，通孔用诸如铜的高导热性材料填充以有效地传导热量; 并且反射器以高反射率将金属涂覆到诸如Ag，Au，Al的可见光，以增强发光效率。

97. 发明授权

US08106504B2 Stacking package structure with chip embedded inside and die having through silicon via and method of the same 有权
公开(公告)号：US08106504B2
公开(公告)日：2012-01-31
申请号：US12385358
申请日：2009-04-06
申请人： Wen-Kun Yang
发明人： Wen-Kun Yang
IPC分类号： H01L23/48
CPC分类号： H01L23/481 , H01L23/3128 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L24/97 , H01L25/03 , H01L2224/24227 , H01L2224/73267 , H01L2224/82039 , H01L2224/97 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/3011 , H01L2924/351 , H01L2224/82 , H01L2924/00
摘要： The semiconductor device package structure includes a first die with a through silicon via (TSV) open from back side of the first die to expose bonding pads; a build up layer coupled between the bonding pads to terminal metal pads by the through silicon via (TSV); a substrate with a second die embedded inside and top circuit wiring and bottom circuit wiring on top and bottom side of the substrate respectively; and a conductive through hole structure coupled between the terminal metal pads to the top circuit wiring and the bottom circuit wiring.

98. 发明授权

US07687923B2 Semiconductor device package having a back side protective scheme 有权
标题翻译：具有背面保护方案的半导体器件封装
公开(公告)号：US07687923B2
公开(公告)日：2010-03-30
申请号：US11933758
申请日：2007-11-01
申请人： Wen-Kun Yang , Hsien-Wen Hsu
发明人： Wen-Kun Yang , Hsien-Wen Hsu
IPC分类号： H01L23/29
CPC分类号： H01L23/3114 , H01L23/3157 , H01L23/562 , H01L2224/16 , H01L2224/274 , H01L2924/01087
摘要： The present invention provides a semiconductor device package, comprising a die having a back surface and an active surface formed thereon; an adhesive layer formed on the back surface of the die; a protection substrate formed on the adhesive layer; and a plurality of bumps formed on the active surface of the die for electrically connection. The present invention further provides a method for forming a semiconductor device package, comprising providing a plurality of die having a back surface and an active surface on a wafer; forming an adhesive layer on the back surface of the die; forming a protection substrates on the adhesive layer; forming a plurality of bumps on the active surface of each die; and dicing the plurality of die into individual die for singulation.
摘要翻译：本发明提供了一种半导体器件封装，其包括具有形成在其上的后表面和有源表面的管芯; 形成在模具的背面上的粘合剂层; 形成在粘合剂层上的保护基板; 以及形成在所述管芯的所述有源面上的电连接的多个凸点。本发明还提供了一种用于形成半导体器件封装的方法，包括在晶片上提供具有背面和活性表面的多个裸片; 在模具的后表面上形成粘合剂层; 在粘合剂层上形成保护基板; 在每个模具的活性表面上形成多个凸块; 并将多个管芯切割成单个管芯以进行切割。

99. 发明申请

US20100072588A1 Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same 有权
标题翻译：衬底结构，其内嵌有模具，并且在两个侧表面上具有双层叠层及其方法
公开(公告)号：US20100072588A1
公开(公告)日：2010-03-25
申请号：US12232847
申请日：2008-09-25
申请人： Wen-Kun Yang
发明人： Wen-Kun Yang
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L23/5389 , H01L21/568 , H01L23/49816 , H01L23/5384 , H01L24/19 , H01L24/82 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05026 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05569 , H01L2224/12105 , H01L2224/13025 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/82039 , H01L2224/92244 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/351 , H01L2924/3511 , H01L2924/3512 , H01L2924/00 , H01L2924/00014
摘要： The present invention discloses a structure of device package comprising a first substrate with a die metal pad, a first wiring circuit on top surface of said first substrate and a second wiring circuit on bottom surface of said first substrate. A die is disposed on the die metal pad. A second substrate has a die opening window for receiving the die, a third wiring circuit on top surface of the second substrate and a fourth wiring circuit on bottom surface of the second substrate. An adhesive material is filled into the gap between back side of the die and top surface of the first substrate and between the side wall of the die and the side wall of the die receiving through hole and the bottom side of the second substrate.
摘要翻译：本发明公开了一种器件封装的结构，该器件封装包括具有管芯金属焊盘的第一衬底，在所述第一衬底的顶表面上的第一布线电路和在所述第一衬底的底表面上的第二布线电路。模具设置在金属模具上。第二基板具有用于接收管芯的开口窗口，在第二基板的顶表面上的第三布线电路和在第二基板的底表面上的第四布线电路。将粘合剂材料填充到模具的背面和第一基板的顶表面之间以及模具的侧壁和模具的侧壁之间的间隙中，模具的通孔和第二基板的底侧。

100. 发明授权

US07667318B2 Fan out type wafer level package structure and method of the same 有权
标题翻译：扇出式晶圆级封装结构及其方法
公开(公告)号：US07667318B2
公开(公告)日：2010-02-23
申请号：US12255868
申请日：2008-10-22
申请人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
发明人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
IPC分类号： H01L23/12 , H01L23/053
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/24195 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/15788 , H01L2924/19041 , H01L2224/82 , H01L2924/00
摘要： To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
摘要翻译：在新的基座上选择和放置标准模具，以获得模具之间适当和更宽的距离，而不是晶片上的模具的原始距离。包装结构具有比通过扇出型包装的模具尺寸更大的球阵列尺寸。此外，模具可以与被动部件或具有并排结构或堆叠结构的其它模具一起封装。

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