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    • 91. 发明授权
    • Encoder and decoder for an SEC-DED-S4ED rotational code
    • 用于SEC-DED-S4ED旋转码的编码器和解码器
    • US5856987A
    • 1999-01-05
    • US801617
    • 1997-02-18
    • Thomas J. Holman
    • Thomas J. Holman
    • H03M7/36H03M13/15H03M13/00
    • H03M13/151
    • A computer system employs a SEC-DED-S4ED rotational error control code (ECC) wherein all columns of H matrix are linearly independent and have an odd weight, and are arranged to allow detection of 4-bit byte errors. The ECC includes check bits arranged in a specific manner in designated columns of the matrix to permit detection and correction of single bit errors, as well as detection of double, triple and quadruple bit errors. The computer system employing the ECC also includes a data path having a variety of implementations; e.g., a single 72-bit path, two 36-bit paths, or a single 36-bit path.
    • 计算机系统采用SEC-DED-S4ED旋转误差控制码(ECC),其中H矩阵的所有列都是线性独立的并且具有奇数权重,并且被布置为允许检测4位字节错误。 ECC包括以特定方式布置在矩阵的指定列中的校验位,以允许检测和校正单个位错误,以及检测双重,三重和四重位错误。 采用ECC的计算机系统还包括具有各种实现的数据路径; 例如单个72位路径,两个36位路径或单个36位路径。