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91. 发明申请

US20090104072A1 Perfume Compounding Method and Perfume Compounding Device 审中-公开
标题翻译：香水配方及香水复合装置
公开(公告)号：US20090104072A1
公开(公告)日：2009-04-23
申请号：US11792042
申请日：2005-09-27
申请人： Takashi Ando , Shin Akiyama , Naotaka Shouge , Tetsuya Shimizu
发明人： Takashi Ando , Shin Akiyama , Naotaka Shouge , Tetsuya Shimizu
IPC分类号： A61L9/015 , A61L9/12
CPC分类号： A61L9/122 , A61L9/04 , A61L9/125
摘要： An aroma dispensing method and device which includes: an air pump (2) for supplying air; six element smell bottles (5a)-(5f) for containing smell materials and for holding smells generated by blowing the air against the smell materials; and six solenoid valves for controlling of the air to be introduced into the element smell bottles. When the plurality of smells generated in the six element smell bottles are blended in specific mixing proportions, the mixing proportions are determined by numbers or time periods of opening and closing per second of the six solenoid valves respectively connected to the six element smell bottles; and proportions of the numbers or time periods of opening and closing per second of the solenoid valves correspond to the mixing proportions.
摘要翻译：一种香气分配方法和装置，包括：用于供应空气的气泵（2）; 用于含有气味材料和用于保持通过将空气吹向气味材料而产生的气味的六元素气味瓶（5a） - （5f）和六个电磁阀，用于控制要引入元件气味瓶中的空气。当在六种气味瓶中产生的多种气味以特定混合比例混合时，混合比例由分别连接到六元素气味瓶的六个电磁阀的每秒开启和关闭的数量或时间段确定; 并且电磁阀的每秒打开和关闭的数量或时间段的比例对应于混合比例。

92. 发明申请

US20090082571A1 Intermediates of 2-substituted carbapenem derivatives and process for production thereof 审中-公开
标题翻译： 2-取代的碳青霉烯衍生物的中间体及其制备方法
公开(公告)号：US20090082571A1
公开(公告)日：2009-03-26
申请号：US12289750
申请日：2008-11-03
申请人： Toshiro Sasaki , Takashi Ando , Takahiro Imai , Dai Kubota , Eiki Shitara , Kunio Atsumi
发明人： Toshiro Sasaki , Takashi Ando , Takahiro Imai , Dai Kubota , Eiki Shitara , Kunio Atsumi
IPC分类号： C07D513/04
CPC分类号： C07D513/04 , C07F9/6561 , Y02P20/55
摘要： The present invention relates to compounds represented by formula (1) and a process for producing the same. The use of these compounds can realize the production of carbapenem derivatives having potent antimicrobial activity and a wide antimicrobial spectrum in a safe and cost-effective manner.
摘要翻译：本发明涉及由式（1）表示的化合物及其制备方法。这些化合物的使用可以以安全和成本有效的方式实现具有有效抗微生物活性和广谱抗菌谱的碳青霉烯衍生物的生产。

93. 发明申请

US20090036685A1 Process for Producing Imidazothiazole Derivatives 审中-公开
标题翻译：生产咪唑噻唑衍生物的方法
公开(公告)号：US20090036685A1
公开(公告)日：2009-02-05
申请号：US11989139
申请日：2006-07-21
申请人： Dai Kubota , Yasuo Yamamoto , Toshiro Sasaki , Takashi Ando , Eiki Shitara , Katsuya Sakata , Kenji Suzuki
发明人： Dai Kubota , Yasuo Yamamoto , Toshiro Sasaki , Takashi Ando , Eiki Shitara , Katsuya Sakata , Kenji Suzuki
IPC分类号： C07D401/14
CPC分类号： C07D519/00 , C07D513/04
摘要： Disclosed is a process for producing an imidazothiazole derivative of formula (I) useful as an intermediate for the production of carbapenem derivatives having potent antimicrobial activity and a broad antimicrobial spectrum, that is, a novel method for nicotinoylating an imidazo[5,1-b]thiazole ring at its 7-position. The process comprises reacting a compound of formula (II) with a compound of formula (III).
摘要翻译：公开了一种制备式（I）的咪唑并噻唑衍生物的方法，其用作制备具有有效抗微生物活性和广谱抗菌谱的碳青霉烯衍生物的中间体，即咪唑并[5,1-b ]噻唑环。该方法包括使式（II）化合物与式（III）化合物反应。

94. 发明授权

US07390678B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07390678B2
公开(公告)日：2008-06-24
申请号：US11094820
申请日：2005-03-31
申请人： Wensheng Wang , Takashi Ando , Yukinobu Hikosaka
发明人： Wensheng Wang , Takashi Ando , Yukinobu Hikosaka
IPC分类号： H01L21/00
CPC分类号： H01L28/65 , H01L21/32136 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75
摘要： A PLZT film (30) is formed as the material film of a capacitor dielectric film and a top electrode film (31) is formed on the PLZT film (30). The top electrode film (31) comprises two IrOx films having different composition. Subsequently, back face of a semiconductor substrate (11) is cleaned and an Ir adhesion film (32) is formed on the top electrode film (31). Substrate temperature is set at 400° C. or above at that time. Thereafter, a TiN film and a TEOS film are formed sequentially as a hard mask. In such a method, carbon remaining on the top electrode film (31) after cleaning the back face is discharged into the chamber while the temperature of the semiconductor substrate (11) is kept at 400° C. or above in order to form the Ir adhesion film (32). Consequently, adhesion is enhanced between a TiN film being formed subsequently and the Ir adhesion film (32) thus preventing the TiN film from being stripped.
摘要翻译：形成PLZT膜（30）作为电容器电介质膜的材料膜，并且在PLZT膜（30）上形成顶部电极膜（31）。顶部电极膜（31）包括具有不同组成的两个IrO x膜。随后，清洁半导体衬底（11）的背面并在顶部电极膜（31）上形成Ir粘附膜（32）。此时基板温度设定在400℃以上。此后，依次形成TiN膜和TEOS膜作为硬掩模。在这种方法中，清洁背面后残留在顶部电极膜（31）上的碳被排出到室内，同时半导体衬底（11）的温度保持在400℃以上，以形成Ir 粘合膜（32）。因此，随后形成的TiN膜与Ir粘附膜（32）之间的粘附性增强，从而防止TiN膜被剥离。

95. 发明授权

US07336116B2 Clock supply circuit 有权
标题翻译：时钟供电电路
公开(公告)号：US07336116B2
公开(公告)日：2008-02-26
申请号：US11342568
申请日：2006-01-31
申请人： Akio Hirata , Takahiro Ichinomiya , Takashi Ando
发明人： Akio Hirata , Takahiro Ichinomiya , Takashi Ando
IPC分类号： G06F1/04 , H03K3/00
CPC分类号： G06F1/10
摘要： The clock supply circuit of the present invention comprises a plurality of clock supply paths and a clock gate circuit. The clock supply paths branch a clock signal and supply each of the branched clock signals to a plurality of sequential circuits via a buffer. The clock gate circuit is inserted at least to one of the clock supply paths, which lets through the clock signals when a control signal is in a first logic state and, when the control signal is in a second logic state, outputs an inversion signal of a logic level that is outputted in a previous occasion where the control signal in the second logic state is applied.
摘要翻译：本发明的时钟供给电路包括多个时钟供给路径和时钟门电路。时钟供应路径分支时钟信号，并且经由缓冲器将每个分支时钟信号提供给多个顺序电路。时钟门电路至少插入到时钟供给路径中的一个，当控制信号处于第一逻辑状态时，时钟供给路径通过时钟信号，并且当控制信号处于第二逻辑状态时，输出反相信号在施加第二逻辑状态的控制信号的前一时刻输出的逻辑电平。

96. 发明授权

US07330688B2 Fixing device and image forming apparatus including the same 失效
标题翻译：固定装置及包括该固定装置的图像形成装置
公开(公告)号：US07330688B2
公开(公告)日：2008-02-12
申请号：US11263853
申请日：2005-11-02
申请人： Osamu Watanabe , Takashi Ando
发明人： Osamu Watanabe , Takashi Ando
IPC分类号： G03G15/20
CPC分类号： G03G15/2064 , G03G2215/2016 , G03G2215/2032 , G03G2215/2041
摘要： A fixing device and an image forming apparatus are provided that shorten warming-up time, reduce power consumption and deviation of a belt, and surely fix a toner image onto a sheet. Support members and a pressurizing member contact each other with pressure at an upstream side and a downstream side in a carrying direction of a recording medium. A first interposing portion of the belt disposed between the support members is inserted between the support members and the pressurizing member and is installed in a tensed state. A second interposing portion of the belt is installed in a non-tensed state, the pressurizing member contacts the outside of the first interposing portion to form the fixing nip portion. The support members contact the pressurizing member with different pressures at the upstream side and the downstream side in the carrying direction of the recording medium.
摘要翻译：提供一种定影装置和图像形成装置，其缩短预热时间，降低功率消耗和带的偏离，并且可靠地将调色剂图像固定在片材上。支撑构件和加压构件在记录介质的传送方向上的上游侧和下游侧的压力彼此接触。设置在支撑构件之间的带的第一插入部分插入在支撑构件和加压构件之间并且被安装成张紧状态。带的第二插入部分以非张紧状态安装，加压构件接触第一插入部分的外部以形成定影夹持部。支撑构件在记录介质的传送方向的上游侧和下游侧以不同的压力接触加压构件。

97. 发明申请

US20080028953A1 PATTERN TRANSFER METHOD AND IMPRINT DEVICE 失效
标题翻译：图案转印方法和印刷装置
公开(公告)号：US20080028953A1
公开(公告)日：2008-02-07
申请号：US11833284
申请日：2007-08-03
申请人： Takashi Ando , Susumu Komoriya , Masahiko Ogino , Akihiro Miyauchi
发明人： Takashi Ando , Susumu Komoriya , Masahiko Ogino , Akihiro Miyauchi
IPC分类号： B31F1/07 , G01B11/00
CPC分类号： G11B7/263 , B29C33/303 , B29C43/003 , B29C43/021 , B29C43/58 , B29C2043/025 , B29C2043/043 , B29C2043/3602 , B29C2043/3634 , B29C2043/5833 , B29L2011/0075 , B29L2017/005 , B29L2031/756
摘要： In order to allow for aligning a relative position between a transferred object and a stamper with high accuracy without providing an alignment pattern in the transferred object, there are provided: a pattern transfer method, including: when adjusting the relative position between the stamper and the transferred object, a step of detecting at least two or more edge positions of the transferred object and calculating an arbitrary point from the detected edge positions; a step of detecting a position of the stamper from an edge of the stamper or an alignment mark formed in the stamper; and a step of adjusting the relative position between the transferred object and the stamper from the arbitrary point and the position of the stamper; and an imprint device using the same.
摘要翻译：为了允许高精度地对准被转印物体与压模之间的相对位置，而不在被转移物体中提供对准图案，提供了一种图案转印方法，包括：当调节压模与检测被转移对象的至少两个以上边缘位置的步骤，并从检测到的边缘位置计算任意点; 从压模的边缘或形成在压模中的对准标记检测压模的位置的步骤; 以及从任意点和压模的位置调整被转印物体与压模之间的相对位置的步骤; 以及使用其的压印装置。

98. 发明申请

US20070210395A1 SOLID-STATE IMAGING DEVICE, METHOD FOR PRODUCING SAME, AND CAMERA 有权
标题翻译：固态成像装置，其制造方法和相机
公开(公告)号：US20070210395A1
公开(公告)日：2007-09-13
申请号：US11677645
申请日：2007-02-22
申请人： Yasushi Maruyama , Tetsuji Yamaguchi , Takashi Ando , Susumu Hiyama , Yuko Ohgishi
发明人： Yasushi Maruyama , Tetsuji Yamaguchi , Takashi Ando , Susumu Hiyama , Yuko Ohgishi
IPC分类号： H01L27/14
CPC分类号： H01L27/14609 , H01L27/1464 , H01L27/14643 , H01L27/14685 , H01L31/022466 , H01L31/022475
摘要： A solid-state imaging device includes a substrate having a first surface and a second surface, light being incident on the second surface side; a wiring layer disposed on the first surface side; a photodetector formed in the substrate and including a first region of a first conductivity type; a transfer gate disposed on the first surface of the substrate and adjacent to the photodetector, the transfer gate transferring a signal charge accumulated in the photodetector; and at least one control gate disposed on the first surface of the substrate and superposed on the photodetector, the control gate controlling the potential of the photodetector in the vicinity of the first surface.
摘要翻译：固态成像装置包括具有第一表面和第二表面的基板，入射到第二表面侧的光; 布置在所述第一表面侧上的布线层; 形成在所述基板中并且包括第一导电类型的第一区域的光电检测器; 设置在所述基板的所述第一表面上且与所述光电检测器相邻的传输栅极，所述传输栅极传送累积在所述光电检测器中的信号电荷; 以及至少一个控制栅极，其设置在所述基板的所述第一表面上并且重叠在所述光电检测器上，所述控制栅极控制所述光电检测器在所述第一表面附近的电位。

99. 发明申请

US20060170479A1 Clock supply circuit 有权
标题翻译：时钟供电电路
公开(公告)号：US20060170479A1
公开(公告)日：2006-08-03
申请号：US11342568
申请日：2006-01-31
申请人： Akio Hirata , Takahiro Ichinomiya , Takashi Ando
发明人： Akio Hirata , Takahiro Ichinomiya , Takashi Ando
IPC分类号： G06F1/04
CPC分类号： G06F1/10
摘要： The clock supply circuit of the present invention comprises a plurality of clock supply paths and a clock gate circuit. The clock supply paths branch a clock signal and supply each of the branched clock signals to a plurality of sequential circuits via a buffer. The clock gate circuit is inserted at least to one of the clock supply paths, which lets through the clock signals when a control signal is in a first logic state and, when the control signal is in a second logic state, outputs an inversion signal of a logic level that is outputted in a previous occasion where the control signal in the second logic state is applied.
摘要翻译：本发明的时钟供给电路包括多个时钟供给路径和时钟门电路。时钟供应路径分支时钟信号，并且经由缓冲器将每个分支时钟信号提供给多个顺序电路。时钟门电路至少插入到时钟供给路径中的一个，当控制信号处于第一逻辑状态时，时钟供给路径通过时钟信号，并且当控制信号处于第二逻辑状态时，输出反相信号在施加第二逻辑状态的控制信号的前一时刻输出的逻辑电平。

100. 发明申请

US20050244988A1 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20050244988A1
公开(公告)日：2005-11-03
申请号：US11094820
申请日：2005-03-31
申请人： Wensheng Wang , Takashi Ando , Yukinobu Hikosaka
发明人： Wensheng Wang , Takashi Ando , Yukinobu Hikosaka
IPC分类号： H01L21/02 , H01L21/3213 , H01L21/8246 , H01L27/105 , H01L27/115 , H01L21/00
CPC分类号： H01L28/65 , H01L21/32136 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75
摘要： A PLZT film (30) is formed as the material film of a capacitor dielectric film and a top electrode film (31) is formed on the PLZT film (30). The top electrode film (31) comprises two IrOx films having different composition. Subsequently, back face of a semiconductor substrate (11) is cleaned and an Ir adhesion film (32) is formed on the top electrode film (31). Substrate temperature is set at 400° C. or above at that time. Thereafter, a TiN film and a TEOS film are formed sequentially as a hard mask. In such a method, carbon remaining on the top electrode film (31) after cleaning the back face is discharged into the chamber while the temperature of the semiconductor substrate (11) is kept at 400° C. or above in order to form the Ir adhesion film (32). Consequently, adhesion is enhanced between a TiN film being formed subsequently and the Ir adhesion film (32) thus preventing the TiN film from being stripped.
摘要翻译：形成PLZT膜（30）作为电容器电介质膜的材料膜，并且在PLZT膜（30）上形成顶部电极膜（31）。顶部电极膜（31）包括具有不同组成的两个IrO x膜。随后，清洁半导体衬底（11）的背面并在顶部电极膜（31）上形成Ir粘附膜（32）。此时基板温度设定在400℃以上。此后，依次形成TiN膜和TEOS膜作为硬掩模。在这种方法中，清洁背面后残留在顶部电极膜（31）上的碳被排出到室内，同时半导体衬底（11）的温度保持在400℃以上，以形成Ir 粘合膜（32）。因此，随后形成的TiN膜与Ir粘附膜（32）之间的粘附性增强，从而防止TiN膜被剥离。

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