专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

91. 发明授权

US08343870B2 Semiconductor device and method of manufacturing the same 有权
公开(公告)号：US08343870B2
公开(公告)日：2013-01-01
申请号：US12585034
申请日：2009-09-01
申请人： Atsuhiro Kinoshita , Junji Koga
发明人： Atsuhiro Kinoshita , Junji Koga
IPC分类号： H01L21/44
CPC分类号： H01L29/6659 , H01L29/1045 , H01L29/1083 , H01L29/665 , H01L29/6653
摘要： A semiconductor device which can effectively suppress a short channel effect and junction leakage is provided. A semiconductor device includes a field effect transistor. The field effect transistor includes a first semiconductor region of a first conductivity type, a gate electrode formed on a gate insulating film, and source and drain electrodes. The field effect transistor also includes second semiconductor regions of a second conductivity type. The field effect transistor further includes third semiconductor regions of the second conductivity type having an impurity concentration higher than that of the second semiconductor region and formed between the source electrode and the first and second semiconductor regions and between the drain electrode and the first and second semiconductor regions, and side wall insulating films formed on both the side surfaces of the gate electrode. The source electrode and the drain electrode are separated from the side wall insulating films.

92. 发明授权

US07902612B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07902612B2
公开(公告)日：2011-03-08
申请号：US12208730
申请日：2008-09-11
申请人： Takashi Yamauchi , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
发明人： Takashi Yamauchi , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
IPC分类号： H01L29/76
CPC分类号： H01L21/28537 , H01L21/265 , H01L21/28052 , H01L21/28518 , H01L29/41791 , H01L29/66143 , H01L29/66643 , H01L29/66795 , H01L29/7833 , H01L29/7839 , H01L29/785 , H01L29/872 , H01L2029/7858
摘要： It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region; depositing a Ni layer so as to cover the impurity region; changing the surface of the impurity region into a NiSi2 layer through annealing; forming a Ni layer on the NiSi2 layer; and silicidating the NiSi2 layer through annealing.
摘要翻译：可以降低硅化镍膜与硅之间界面处的界面电阻。半导体制造方法包括：在硅衬底上形成杂质区域，杂质被引入杂质区域; 沉积Ni层以覆盖杂质区域; 通过退火将杂质区的表面改变为NiSi2层; 在NiSi2层上形成Ni层; 并通过退火将NiSi2层硅化。

93. 发明申请

US20110049611A1 NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD OF NONVOLATILE SEMICONDUCTOR STORAGE DEVICE 审中-公开
标题翻译：非挥发性半导体存储器件的非线性半导体存储器件的制造方法和非易失性半导体存储器件的制造方法
公开(公告)号：US20110049611A1
公开(公告)日：2011-03-03
申请号：US12769951
申请日：2010-04-29
申请人： Masahiro Kiyotoshi , Atsuhiro Kinoshita , Kiwamu Sakuma , Koichi Muraoka , Ichiro Mizushima
发明人： Masahiro Kiyotoshi , Atsuhiro Kinoshita , Kiwamu Sakuma , Koichi Muraoka , Ichiro Mizushima
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/792 , H01L27/11526 , H01L27/11529 , H01L27/11548 , H01L27/11551 , H01L27/11556 , H01L27/11573 , H01L27/11575 , H01L27/11578 , H01L29/40114 , H01L29/40117 , H01L29/42324 , H01L29/4234 , H01L29/66825 , H01L29/66833 , H01L29/785 , H01L29/7881
摘要： In a memory cell portion, a stacked structure, in which dielectric layers and semiconductor layers are alternately stacked, is arranged in a fin shape on a semiconductor substrate, and in a peripheral circuit portion, a gate electrode is arranged on the semiconductor substrate via a gate dielectric film so that a height of an upper surface of the gate electrode is set to be substantially equal to a height of an upper surface of the stacked structure in which the dielectric layers and the semiconductor layers are alternately stacked.
摘要翻译：在存储单元部分中，电介质层和半导体层交替层叠的堆叠结构在半导体衬底上以翅片形状布置，并且在外围电路部分中，栅电极经由使得栅极电极的上表面的高度被设定为与电介质层和半导体层交替层叠的层叠结构的上表面的高度大致相等。

94. 发明申请

US20100224916A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20100224916A1
公开(公告)日：2010-09-09
申请号：US12714841
申请日：2010-03-01
申请人： Tatsuo SHIMIZU , Atsuhiro Kinoshita
发明人： Tatsuo SHIMIZU , Atsuhiro Kinoshita
IPC分类号： H01L29/78 , H01L29/92 , H01L29/417
CPC分类号： H01L29/6659 , H01L21/28176 , H01L21/283 , H01L21/28518 , H01L21/2855 , H01L21/28556 , H01L21/31604 , H01L28/75 , H01L29/41775 , H01L29/45 , H01L29/456 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/7881
摘要： It is made possible to optimize the effective work function of the metal for a junction and suppress the resistance as far as possible at the interface between a semiconductor or a dielectric material and a metal. A semiconductor device includes: a semiconductor film; a Ti oxide film formed on the semiconductor film, and including at least one element selected from the group consisting of V, Cr, Mn, Fe, Co, Ni, Nb, Mo, Tc, Ru, Rh, Pd, Ta, W, Re, Os, Ir, and Pt; and a metal film formed on the Ti oxide film.
摘要翻译：可以优化用于结的金属的有效功函数，并且尽可能地在半导体或电介质材料与金属之间的界面处抑制电阻。半导体器件包括：半导体膜; 形成在所述半导体膜上的Ti氧化膜，并且包括选自V，Cr，Mn，Fe，Co，Ni，Nb，Mo，Tc，Ru，Rh，Pd，Ta，W中的至少一种元素， Re，Os，Ir和Pt; 以及形成在Ti氧化物膜上的金属膜。

95. 发明申请

US20090008727A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090008727A1
公开(公告)日：2009-01-08
申请号：US12208730
申请日：2008-09-11
申请人： Takashi YAMAUCHI , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
发明人： Takashi YAMAUCHI , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
IPC分类号： H01L29/78
CPC分类号： H01L21/28537 , H01L21/265 , H01L21/28052 , H01L21/28518 , H01L29/41791 , H01L29/66143 , H01L29/66643 , H01L29/66795 , H01L29/7833 , H01L29/7839 , H01L29/785 , H01L29/872 , H01L2029/7858
摘要： It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region; depositing a Ni layer so as to cover the impurity region; changing the surface of the impurity region into a NiSi2 layer through annealing; forming a Ni layer on the NiSi2 layer; and silicidating the NiSi2 layer through annealing.
摘要翻译：可以降低硅化镍膜与硅之间界面处的界面电阻。半导体制造方法包括：在硅衬底上形成杂质区域，杂质被引入杂质区域; 沉积Ni层以覆盖杂质区域; 通过退火将杂质区的表面改变为NiSi2层; 在NiSi2层上形成Ni层; 并通过退火将NiSi2层硅化。

96. 发明授权

US07348591B2 Switch element, memory element and magnetoresistive effect element 失效
标题翻译：开关元件，存储元件和磁阻效应元件
公开(公告)号：US07348591B2
公开(公告)日：2008-03-25
申请号：US11502432
申请日：2006-08-11
申请人： Takashi Yamauchi , Chika Tanaka , Hideyuki Sugiyama , Atsuhiro Kinoshita , Junji Koga , Yuichi Motoi , Yoshihiko Nakano , Seiichi Suenaga
发明人： Takashi Yamauchi , Chika Tanaka , Hideyuki Sugiyama , Atsuhiro Kinoshita , Junji Koga , Yuichi Motoi , Yoshihiko Nakano , Seiichi Suenaga
IPC分类号： H01L29/06
CPC分类号： G11C13/025 , B82Y10/00 , G11C11/54 , G11C23/00 , H01H1/0094 , H01L43/08 , Y10S977/762
摘要： A switch element includes a substrate; a plurality of carbon nanotubes provided upright on the substrate; magnetic particles arranged at tip ends of the carbon nanotubes respectively; and a plurality of conductive layers formed between base ends of the carbon nanotubes and the substrate. A switching operation of the switching element is performed in such a manner that the carbon nanotubes or the magnetic particles are brought into contact with each other according to an electrical potential between the conductive layers, and the carbon nanotubes are separated from each other when an electrical current flows through the carbon nanotubes with the carbon nanotubes or the magnetic particles brought into contact with each other.
摘要翻译：开关元件包括基板; 设置在基板上的多个碳纳米管; 分别布置在碳纳米管尖端的磁性颗粒; 以及形成在碳纳米管和基板的基端之间的多个导电层。按照导电层之间的电位使碳纳米管或磁性粒子彼此接触的方式进行开关元件的开关动作，并且当电子元件电流流过碳纳米管，碳纳米管或磁性颗粒彼此接触。

97. 发明申请

US20070228485A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20070228485A1
公开(公告)日：2007-10-04
申请号：US11761271
申请日：2007-06-11
申请人： Yoshinori Tsuchiya , Toshifumi Irisawa , Atsuhiro Kinoshita , Junji Koga
发明人： Yoshinori Tsuchiya , Toshifumi Irisawa , Atsuhiro Kinoshita , Junji Koga
IPC分类号： H01L27/092
CPC分类号： H01L29/4908 , H01L21/28052 , H01L21/28097 , H01L21/823835 , H01L21/823842 , H01L21/82385 , H01L21/84 , H01L27/092 , H01L27/1203 , H01L29/4975 , H01L29/517 , H01L29/66643 , H01L29/785
摘要： A semiconductor device comprises n-type and p-type semiconductor devices formed on the substrate, the n-type device including an n-channel region formed on the substrate, n-type source and drain regions formed opposite to each other interposing the n-channel region therebetween, a first gate insulator formed on the n-channel region, and a first gate electrode formed on the first gate insulator and including a compound of a metal M and a first group-IV elements Si1-a Gea (0≦a≦1), the p-type device including a p-channel region formed on the substrate, p-type source and drain regions formed opposite to each other interposing the p-channel region therebetween, a second gate insulator formed on the p-channel region, and a second gate electrode formed on the second gate insulator, and including a compound of the metal M and a second group-IV element Si1-c Gec (0≦c≦1, a≠c).

98. 发明申请

US20070141836A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070141836A1
公开(公告)日：2007-06-21
申请号：US11530724
申请日：2006-09-11
申请人： Takashi Yamauchi , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
发明人： Takashi Yamauchi , Atsuhiro Kinoshita , Yoshinori Tsuchiya , Junji Koga , Koichi Kato , Nobutoshi Aoki , Kazuya Ohuchi
IPC分类号： H01L21/4763
CPC分类号： H01L21/28537 , H01L21/265 , H01L21/28052 , H01L21/28518 , H01L29/41791 , H01L29/66143 , H01L29/66643 , H01L29/66795 , H01L29/7833 , H01L29/7839 , H01L29/785 , H01L29/872 , H01L2029/7858
摘要： It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region; depositing a Ni layer so as to cover the impurity region; changing the surface of the impurity region into a NiSi2 layer through annealing; forming a Ni layer on the NiSi2 layer; and silicidating the NiSi2 layer through annealing.
摘要翻译：可以降低硅化镍膜与硅之间界面处的界面电阻。半导体制造方法包括：在硅衬底上形成杂质区域，杂质被引入杂质区域; 沉积Ni层以覆盖杂质区域; 通过退火将杂质区的表面改变成NiSi 2层; 在NiSi 2层上形成Ni层; 并通过退火对NiSi 2层进行硅化。

99. 发明申请

US20070037414A1 Switch element, memory element and magnetoresistive effect element 失效
标题翻译：开关元件，存储元件和磁阻效应元件
公开(公告)号：US20070037414A1
公开(公告)日：2007-02-15
申请号：US11502432
申请日：2006-08-11
申请人： Takashi Yamauchi , Chika Tanaka , Hideyuki Sugiyama , Atsuhiro Kinoshita , Junji Koga , Yuichi Motoi , Yoshihiko Nakano , Seiichi Suenaga
发明人： Takashi Yamauchi , Chika Tanaka , Hideyuki Sugiyama , Atsuhiro Kinoshita , Junji Koga , Yuichi Motoi , Yoshihiko Nakano , Seiichi Suenaga
IPC分类号： H01L21/00
CPC分类号： G11C13/025 , B82Y10/00 , G11C11/54 , G11C23/00 , H01H1/0094 , H01L43/08 , Y10S977/762
摘要： A switch element includes a substrate; a plurality of carbon nanotubes provided upright on the substrate; magnetic particles arranged at tip ends of the carbon nanotubes respectively; and a plurality of conductive layers formed between base ends of the carbon nanotubes and the substrate. A switching operation of the switching element is performed in such a manner that the carbon nanotubes or the magnetic particles are brought into contact with each other according to an electrical potential between the conductive layers, and the carbon nanotubes are separated from each other when an electrical current flows through the carbon nanotubes with the carbon nanotubes or the magnetic particles brought into contact with each other.
摘要翻译：开关元件包括基板; 设置在基板上的多个碳纳米管; 分别布置在碳纳米管尖端的磁性颗粒; 以及形成在碳纳米管的基端和基板之间的多个导电层。按照导电层之间的电位使碳纳米管或磁性粒子彼此接触的方式进行开关元件的开关动作，并且当电子元件电流流过碳纳米管，碳纳米管或磁性颗粒彼此接触。

100. 发明申请

US20070029577A1 Field effect transistor and method of manufacturing the same 审中-公开
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20070029577A1
公开(公告)日：2007-02-08
申请号：US11440150
申请日：2006-05-25
申请人： Atsuhiro Kinoshita , Junji Koga
发明人： Atsuhiro Kinoshita , Junji Koga
IPC分类号： H01L29/76
CPC分类号： H01L29/0847 , H01L21/28097 , H01L29/458 , H01L29/6653 , H01L29/6659 , H01L29/66772 , H01L29/7833 , H01L29/785 , H01L29/78609
摘要： A field effect transistor includes a first semiconductor region of a first conduction type, a gate electrode formed on the channel region of the first semiconductor region via a gate insulating film, source and drain electrodes formed to interpose the channel region, second semiconductor regions of a second conduction type formed between the source and drain electrodes and the channel region, the second semiconductor regions giving rise to an extension region of the source and drain electrodes, and third semiconductor regions of the second conduction type formed between the source and drain electrodes and each of the first and second semiconductor regions, the third semiconductor regions formed by segregation from the source and drain electrodes and having an impurity concentration higher than that of the second semiconductor regions.
摘要翻译：场效应晶体管包括第一导电类型的第一半导体区域，经由栅极绝缘膜形成在第一半导体区域的沟道区上的栅极电极，形成为插入沟道区域的源极和漏极电极，第二半导体区域形成在源电极和漏电极之间的第二导电类型和沟道区，引起源电极和漏电极的延伸区域的第二半导体区域以及形成在源电极和漏电极之间的第二导电类型的第三半导体区域，的第一和第二半导体区域的第三半导体区域，所述第三半导体区域通过从所述源极和漏极电极偏析形成，并且具有比所述第二半导体区域的杂质浓度更高的杂质浓度。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式