专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

91. 发明申请

US20080311722A1 METHOD FOR FORMING POLYCRYSTALLINE THIN FILM BIPOLAR TRANSISTORS 有权
标题翻译：形成多晶薄膜双极晶体管的方法
公开(公告)号：US20080311722A1
公开(公告)日：2008-12-18
申请号：US11763876
申请日：2007-06-15
申请人： Christopher J. Petti , S. Brad Herner
发明人： Christopher J. Petti , S. Brad Herner
IPC分类号： H01L21/331
CPC分类号： H01L29/66265 , G11C17/16 , H01L29/7317
摘要： A method is described for forming a semiconductor device comprising a bipolar transistor having a base region, an emitter region and a collector region, wherein the base region comprises polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide. The emitter region and collector region also may be formed from polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide forming metal. The polycrystalline semiconductor material is preferably silicided polysilicon, which is formed in contact with C49 phase titanium silicide.
摘要翻译：描述了一种用于形成半导体器件的方法，该半导体器件包括具有基极区域，发射极区域和集电极区域的双极晶体管，其中，所述基极区域包括通过使硅，锗或硅锗与硅化物，锗化锗接触而形成的多晶半导体材料或锗化锗。发射极区域和集电极区域也可以由通过使硅，锗或硅锗与硅化物，锗化锗或锗化锗形成金属接触而形成的多晶半导体材料形成。多晶半导体材料优选为与C49相钛硅化物接触形成的硅化多晶硅。

92. 发明申请

US20080308903A1 POLYCRYSTALLINE THIN FILM BIPOLAR TRANSISTORS 有权
标题翻译：多晶薄膜双极晶体管
公开(公告)号：US20080308903A1
公开(公告)日：2008-12-18
申请号：US11763816
申请日：2007-06-15
申请人： Christopher J. Petti , S. Brad Herner
发明人： Christopher J. Petti , S. Brad Herner
IPC分类号： H01L27/082 , H01L31/112
CPC分类号： H01L29/7317 , G11C5/025 , G11C11/416 , H01L27/0688 , H01L27/1022 , H01L29/456 , H01L29/735
摘要： A semiconductor device comprising a bipolar transistor having a base region, an emitter region and a collector region, wherein the base region comprises polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide is described. The emitter region and collector region also may comprise polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide forming metal. The polycrystalline semiconductor material is preferably silicided polysilicon, which is formed in contact with C49 phase titanium silicide.
摘要翻译：一种半导体器件，包括具有基极区域，发射极区域和集电极区域的双极晶体管，其中所述基极区域包括通过使与硅化物，锗化物或硅化物锗化物接触的硅，锗或锗锗结晶而形成的多晶半导体材料。发射极区域和集电极区域还可以包括通过使硅，锗或锗锗与硅化物，锗化锗或锗化锗形成金属接触而形成的多晶半导体材料。多晶半导体材料优选为与C49相钛硅化物接触形成的硅化多晶硅。

93. 发明申请

US20080179685A1 EMBEDDED MEMORY IN A CMOS CIRCUIT AND METHODS OF FORMING THE SAME 有权
标题翻译： CMOS电路中的嵌入式存储器及其形成方法
公开(公告)号：US20080179685A1
公开(公告)日：2008-07-31
申请号：US11669850
申请日：2007-01-31
申请人： Christopher J. Petti
发明人： Christopher J. Petti
IPC分类号： H01L29/76
CPC分类号： H01L27/105 , H01L27/0629 , H01L27/0811 , H01L27/1021 , H01L27/112 , H01L27/11206 , Y10S257/91
摘要： In some aspects, a memory circuit is provided that includes (1) a two-terminal memory element formed on a substrate; and (2) a CMOS transistor formed on the substrate and adapted to program the two-terminal memory element. The two-terminal memory element is formed between a gate layer and a first metal layer of the memory circuit. Numerous other aspects are provided.
摘要翻译：在一些方面，提供一种存储器电路，其包括（1）形成在衬底上的两端存储元件; 和（2）形成在所述衬底上并适于编程所述两端存储元件的CMOS晶体管。两端存储元件形成在存储电路的栅极层和第一金属层之间。提供了许多其他方面。

94. 发明申请

US20080025132A1 METHOD FOR USING A PASSIVE ELEMENT MEMORY ARRAY INCORPORATING REVERSIBLE POLARITY WORD LINE AND BIT LINE DECODERS 有权
标题翻译：使用无源元件存储器阵列的方法，包含可反映的极性字线和位线解码器
公开(公告)号：US20080025132A1
公开(公告)日：2008-01-31
申请号：US11461364
申请日：2006-07-31
申请人： Luca G. Fasoli , Christopher J. Petti , Roy E. Scheuerlein
发明人： Luca G. Fasoli , Christopher J. Petti , Roy E. Scheuerlein
IPC分类号： G11C11/00 , G11C8/00
CPC分类号： G11C17/18 , G11C8/08 , G11C8/10 , G11C17/16 , G11C17/165
摘要： Circuits and methods are described for decoding exemplary memory arrays of programmable and, in some embodiments, re-writable passive element memory cells, which are particularly useful for extremely dense three-dimensional memory arrays having more than one memory plane. In addition, circuits and methods are described for selecting one or more array blocks of such a memory array, for selecting one or more word lines and bit lines within selected array blocks, for conveying data information to and from selected memory cells within selected array blocks, and for conveying unselected bias conditions to unselected array blocks.
摘要翻译：描述了用于解码可编程的示例性存储器阵列的电路和方法，在一些实施例中，可重写无源元件存储器单元，其对于具有多于一个存储器平面的非常密集的三维存储器阵列特别有用。此外，描述了用于选择这种存储器阵列的一个或多个阵列块的电路和方法，用于选择所选择的阵列块内的一个或多个字线和位线，用于将数据信息传送到选定的阵列块内的选定的存储器单元并且用于将未选择的偏置条件传送到未选择的阵列块。

95. 发明授权

US06946719B2 Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide 有权
标题翻译：包括结二极管接触的半导体器件接触 - 反熔丝单元包括硅化物
公开(公告)号：US06946719B2
公开(公告)日：2005-09-20
申请号：US10728230
申请日：2003-12-03
申请人： Christopher J. Petti , S. Brad Herner
发明人： Christopher J. Petti , S. Brad Herner
IPC分类号： G11C17/16 , H01L23/525 , H01L27/10 , H01L27/102 , H01L29/00
CPC分类号： H01L27/101 , G11C17/16 , H01L23/5252 , H01L27/1021 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： The invention provides for a vertically oriented junction diode having a contact-antifuse unit in contact with one of its electrodes. The contact-antifuse unit is formed either above or below the junction diode, and comprises a silicide with a dielectric antifuse layer formed on and in contact with it. In preferred embodiments, the silicide is cobalt silicide, and the antifuse preferably silicon oxide, silicon nitride, or silicon oxynitride grown on the colbalt silicide. The junction diode and contact-antifuse unit can be used as a memory cell, which is advantageously used in a monolithic three dimensional memory array.
摘要翻译：本发明提供了一种垂直取向的结二极管，其具有与其电极之一接触的接触 - 反熔丝单元。接触 - 反熔丝单元形成在结二极管上方或下方，并且包括形成在其上并与其接触的介电反熔丝层的硅化物。在优选的实施方案中，硅化物是硅化钴，反熔丝优选在硅化钴上生长的氧化硅，氮化硅或氮氧化硅。结二极管和接触 - 反熔丝单元可用作存储单元，其有利地用于单片三维存储器阵列中。

96. 发明授权

US08921686B2 Back-contact photovoltaic cell comprising a thin lamina having a superstrate receiver element 有权
标题翻译：背接触光伏电池，包括具有上覆接收元件的薄层
公开(公告)号：US08921686B2
公开(公告)日：2014-12-30
申请号：US13425870
申请日：2012-03-21
申请人： Steven M. Zuniga , Christopher J. Petti , Gopal Prabhu
发明人： Steven M. Zuniga , Christopher J. Petti , Gopal Prabhu
IPC分类号： H01L31/00 , H01L31/02 , H01L21/04 , H01L27/142 , H01L31/0392 , H01L31/042 , H01L31/18
CPC分类号： H01L27/142 , H01L31/03921 , H01L31/042 , H01L31/0682 , H01L31/1804 , H01L31/1896 , Y02E10/547 , Y02P70/521
摘要： A method to fabricate a photovoltaic device includes forming first and second contact regions at the first surface of a semiconductor donor body. A cleave plane may be formed by implanting ions into the donor body, and a lamina that includes the contact regions is cleaved from the donor body at the cleave plane. The first surface of the lamina may be contacted with a temporary support and fabricated into a photovoltaic device, wherein the lamina comprises the base of the photovoltaic device.
摘要翻译：制造光伏器件的方法包括在半导体施主体的第一表面形成第一和第二接触区域。可以通过将离子注入给体体中形成切割平面，并且包括接触区域的层在分裂面处从施主体断裂。薄片的第一表面可以与临时支撑件接触并制成光伏器件，其中薄片包括光伏器件的基极。

97. 发明授权

US08338209B2 Photovoltaic cell comprising a thin lamina having a rear junction and method of making 有权
标题翻译：光伏电池包括具有后连接的薄层和制造方法
公开(公告)号：US08338209B2
公开(公告)日：2012-12-25
申请号：US12189158
申请日：2008-08-10
申请人： Mohamed M. Hilali , Christopher J. Petti
发明人： Mohamed M. Hilali , Christopher J. Petti
IPC分类号： H01L21/00 , H01L31/00
CPC分类号： H01L31/0248 , H01L31/022425 , H01L31/068 , H01L31/1804 , H01L31/1896 , Y02E10/547 , Y02P70/521
摘要： Fabrication of a photovoltaic cell comprising a thin semiconductor lamina may require additional processing after the semiconductor lamina is bonded to a receiver. To minimize high-temperature steps after bonding, the p−n junction is formed at the back of the cell, at the bonded surface. In some embodiments, the front surface of the semiconductor lamina is not doped or is locally doped using low-temperature methods. The base resistivity of the photovoltaic cell may be reduced, allowing a front surface field to be reduced or omitted.
摘要翻译：在半导体层结合到接收器之后，包括薄半导体层的光伏电池的制造可能需要额外的处理。为了使结合后的高温步骤最小化，在接合表面处，在电池背面形成p-n结。在一些实施例中，半导体薄片的前表面不是掺杂的或使用低温方法局部掺杂。可以减小光伏电池的基极电阻率，从而可以减小或省略前表面场。

98. 发明申请

US20120220068A1 Method to Form a Device by Constructing a Support Element on a Thin Semiconductor Lamina 失效
标题翻译：通过在薄型半导体层上构造支撑元件来形成器件的方法
公开(公告)号：US20120220068A1
公开(公告)日：2012-08-30
申请号：US13450414
申请日：2012-04-18
申请人： Christopher J. Petti , Mohamed M. Hilali , Theodore Smick , Venkatesan Murali , Kathy J. Jackson , Zhiyong Li , Gopalakrishna Prabhu
发明人： Christopher J. Petti , Mohamed M. Hilali , Theodore Smick , Venkatesan Murali , Kathy J. Jackson , Zhiyong Li , Gopalakrishna Prabhu
IPC分类号： H01L31/0376 , H01L31/18
CPC分类号： H01L31/1892 , H01L31/0747 , H01L31/1864 , Y02E10/50
摘要： A semiconductor assembly is described in which a support element is constructed on a surface of a semiconductor lamina. Following formation of the thin lamina, which may have a thickness about 50 microns or less, the support element is formed, for example by plating, or by application of a precursor and curing in situ, resulting in a support element which may be, for example, metal, ceramic, polymer, etc. This is in contrast to pre-formed support element which is affixed to the lamina following its formation, or to a donor wafer from which the lamina is subsequently cleaved.Fabricating the support element in situ may avoid the use of adhesives to attach the lamina to a permanent support element. In some embodiments, this process flow allows the lamina to be annealed at high temperature, then to have an amorphous silicon layer formed on each face of the lamina following that anneal.
摘要翻译：描述了半导体组件，其中在半导体层的表面上构造支撑元件。形成厚度约为50微米或更小的薄层之后，例如通过镀覆或通过施加前体和原位固化来形成支撑元件，得到支撑元件，其可以用于例如，金属，陶瓷，聚合物等。这与预先形成的支撑元件形成对比，该预制形成的支撑元件在其形成之后固定到层板上，或者与施加器晶片相接触，该晶片随后被切割。原位制造支撑元件可以避免使用粘合剂将薄片附着到永久支撑元件上。在一些实施例中，该工艺流程允许薄层在高温下退火，然后在该退火之后具有在层的每个表面上形成的非晶硅层。

99. 发明授权

US08173452B1 Method to form a device by constructing a support element on a thin semiconductor lamina 有权
标题翻译：通过在薄半导体层上构造支撑元件来形成器件的方法
公开(公告)号：US08173452B1
公开(公告)日：2012-05-08
申请号：US12980424
申请日：2010-12-29
申请人： Christopher J. Petti , Mohamed M. Hilali , Theodore Smick , Venkatesan Murali , Kathy J. Jackson , Zhiyong Li , Gopalakrishna Prabhu
发明人： Christopher J. Petti , Mohamed M. Hilali , Theodore Smick , Venkatesan Murali , Kathy J. Jackson , Zhiyong Li , Gopalakrishna Prabhu
IPC分类号： H01L21/00
CPC分类号： H01L31/1892 , H01L31/0747 , H01L31/1864 , Y02E10/50
摘要： A semiconductor assembly is described in which a support element is constructed on a surface of a semiconductor lamina. Following formation of the thin lamina, which may have a thickness about 50 microns or less, the support element is formed, for example by plating, or by application of a precursor and curing in situ, resulting in a support element which may be, for example, metal, ceramic, polymer, etc. This is in contrast to a rigid or semi-rigid pre-formed support element which is affixed to the lamina following its formation, or to a donor wafer from which the lamina is subsequently cleaved. Fabricating the support element in situ may avoid the use of adhesives to attach the lamina to a permanent support element; such adhesives may be unable to tolerate processing temperatures and conditions required to complete the device. In some embodiments, this process flow allows the lamina to be annealed at high temperature, then to have an amorphous silicon layer formed on each face of the lamina following that anneal. A device may be formed which comprises the lamina, such as a photovoltaic cell.
摘要翻译：描述了半导体组件，其中在半导体层的表面上构造支撑元件。形成厚度约为50微米或更小的薄层之后，例如通过镀覆或通过施加前体和原位固化来形成支撑元件，得到支撑元件，其可以用于例如，金属，陶瓷，聚合物等。这与刚性或半刚性的预成形支撑元件形成对比，该刚性或半刚性的预成型支撑元件在其形成之后固定到层板上，或者与施加器晶片相接触，其中层板随后被切割。原位制造支撑元件可以避免使用粘合剂将薄片附着到永久支撑元件上; 这种粘合剂可能不能容忍完成装置所需的加工温度和条件。在一些实施例中，该工艺流程允许薄层在高温下退火，然后在该退火之后具有在层的每个表面上形成的非晶硅层。可以形成包括层的器件，例如光伏电池。

100. 发明授权

US07888200B2 Embedded memory in a CMOS circuit and methods of forming the same 有权
标题翻译： CMOS电路中的嵌入式存储器及其形成方法
公开(公告)号：US07888200B2
公开(公告)日：2011-02-15
申请号：US11669859
申请日：2007-01-31
申请人： Christopher J. Petti
发明人： Christopher J. Petti
IPC分类号： H01L21/8234
CPC分类号： H01L27/105 , H01L27/1052 , Y10S257/91
摘要： In some aspects, a method of forming a memory circuit is provided that includes (1) forming a two-terminal memory element on a substrate between a gate layer and a first metal layer of the memory circuit; and (2) forming a CMOS transistor on the substrate, the CMOS transistor for programming the two-terminal memory element. Numerous other aspects are provided.
摘要翻译：在一些方面，提供一种形成存储器电路的方法，其包括（1）在存储电路的栅极层和第一金属层之间的衬底上形成二端存储元件; 和（2）在衬底上形成CMOS晶体管，用于编程两端存储元件的CMOS晶体管。提供了许多其他方面。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式