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    • 91. 发明授权
    • Resistance change type memory
    • 电阻变化型存储器
    • US08324606B2
    • 2012-12-04
    • US12563470
    • 2009-09-21
    • Takayuki TsukamotoReika IchiharaHiroshi KannoKenichi Murooka
    • Takayuki TsukamotoReika IchiharaHiroshi KannoKenichi Murooka
    • H01L47/00
    • G11C11/5678G11C11/5685G11C13/0004G11C13/0007G11C13/0069G11C2213/72H01L27/101H01L27/2409H01L27/2481
    • A resistance change type memory of an aspect of the present invention including a first wiring configured to extend in a first direction, a second wiring configured to extend in a second direction crossing the first direction, a series circuit configured to connect to the first and second wirings, the series circuit including a non-ohmic element being more conductive in the first to second wiring direction than in the second to first direction and a resistance change type storage element in which data is stored according to a change of a resistance state, an energy supplying circuit configured to connect to the first wiring to supply energy to the first wiring, the energy being used to store the data in the resistance change type storage element, and a capacitance circuit configured to include a capacitive element and being connected to the second wiring.
    • 本发明的一个方面的电阻变化型存储器包括:构造成沿第一方向延伸的第一布线,沿与第一方向交叉的第二方向延伸的第二布线;串联电路,被配置为连接到第一和第二端 布线,包括在第一至第二布线方向上比在第二至第一方向上更加导电的非欧姆元件的串联电路和根据电阻状态的变化存储数据的电阻变化型存储元件, 能量供给电路,被配置为连接到所述第一布线以向所述第一布线供应能量,所述能量用于将所述数据存储在所述电阻变化型存储元件中;以及电容电路,被配置为包括电容元件并连接到所述第二布线 接线。
    • 92. 发明授权
    • Nonvolatile semiconductor memory device
    • 非易失性半导体存储器件
    • US08320158B2
    • 2012-11-27
    • US12882685
    • 2010-09-15
    • Hiroshi KannoReika IchiharaTakayuki TsukamotoKenichi MurookaHirofumi Inoue
    • Hiroshi KannoReika IchiharaTakayuki TsukamotoKenichi MurookaHirofumi Inoue
    • G11C11/00
    • G11C7/02G11C13/0004G11C13/0007G11C13/0011G11C13/0064G11C13/0097G11C2213/31G11C2213/71G11C2213/72
    • Nonvolatile semiconductor memory device of an embodiment includes: a memory cell array including a plurality of first and second lines intersecting each other and plural memory cells provided at intersections of the first and second lines and having data written and erased upon application of voltages of the same polarity; and a writing circuit configured to select first and second lines and supply a set or reset pulse to the memory cell through the selected first and second lines. In an erase operation, the writing circuit repeatedly supplies the reset pulse to a selected memory cell until data is erased, by increasing or decreasing voltage level and voltage application time of the reset pulse within a reset region. The reset region, or an aggregate of combinations of voltage level and voltage application time of the reset pulse, is a region where voltage level and voltage application time are negatively correlated.
    • 一个实施例的非易失性半导体存储器件包括:存储单元阵列,包括彼此相交的多个第一和第二线,以及设置在第一和第二线的交点处的多个存储单元,并且在施加相同的电压时写入和擦除数据 极性; 以及写入电路,被配置为选择第一和第二行,并且通过所选择的第一和第二行向存储器单元提供置位或复位脉冲。 在擦除操作中,写入电路通过增加或减小复位区域内的复位脉冲的电压电平和电压施加时间,将复位脉冲重复地提供给所选择的存储单元,直到数据被擦除。 复位区域或复位脉冲的电压电平和电压施加时间的组合的总和是电压电平和电压施加时间呈负相关的区域。
    • 95. 发明授权
    • Semiconductor integrated circuit device
    • 半导体集成电路器件
    • US08138893B2
    • 2012-03-20
    • US12057671
    • 2008-03-28
    • Takefumi EndoTakayuki Tsukamoto
    • Takefumi EndoTakayuki Tsukamoto
    • H04Q5/22
    • H04B5/02H04B5/0031H04B5/0037
    • In an IC tag, when a semiconductor integrated circuit device is activated, an operation control unit sets existence/nonexistence of a communication distance limitation for reducing a communication distance to a state management unit. If the communication distance limitation is not set, a switch unit is turned ON and a demodulated command is inputted from a command demodulation circuit to a command decode unit. If the communication distance limitation is set, a power intensity monitor unit judges whether the power of a rectification circuit is greater than or equal to a predetermined arbitrary field intensity. If the power is less than the predetermined arbitrary field intensity, the switch unit is turned OFF and various commands demodulated by the command demodulation circuit are not inputted to the command decode unit. As a result, the semiconductor integrated circuit device does not operate.
    • 在IC标签中,当半导体集成电路器件被激活时,操作控制单元设置存在/不存在通信距离限制,以减少与状态管理单元的通信距离。 如果没有设定通信距离限制,则开关单元被接通,并且解调命令从命令解调电路输入到命令解码单元。 如果设置了通信距离限制,则功率强度监视单元判断整流电路的功率是否大于或等于预定的任意场强。 如果功率小于预定的任意场强,则切换单元关闭,并且由命令解调电路解调的各种命令不被输入到命令解码单元。 结果,半导体集成电路器件不工作。