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91. 发明授权

US07875560B2 Semiconductor having optimized insulation structure and process for producing the semiconductor 有权
标题翻译：半导体具有优化的绝缘结构和制造半导体的工艺
公开(公告)号：US07875560B2
公开(公告)日：2011-01-25
申请号：US11392363
申请日：2006-03-29
申请人： Markus Zundel , Norbert Krischke
发明人： Markus Zundel , Norbert Krischke
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/76243 , H01L29/42384 , H01L29/66787 , H01L29/78696
摘要： A semiconductor having an optimized insulation structure which is simple and inexpensive to produce and can be made smaller than LOCOS insulation structures is disclosed. An implantation mask on a surface of a semiconductor substrate is used to implant elements into the semiconductor substrate, which elements, on thermal activation, form an insulation region together with the further elements of the semiconductor substrate. The thermal activation is effected by means of laser irradiation, during which the semiconductor substrate is briefly melted and then recrystallizes during the subsequent cooling, so that the implanted elements form the insulation region together with the further elements of the semiconductor substrate.
摘要翻译：公开了具有优化的绝缘结构的半导体，该绝缘结构简单且便宜并且可以制造成小于LOCOS绝缘结构。在半导体衬底的表面上的注入掩模用于将元件注入到半导体衬底中，这些元件在热激活时与半导体衬底的其它元件一起形成绝缘区域。热激活通过激光照射来实现，在此期间半导体衬底被短暂熔化，然后在随后的冷却期间再结晶，使得注入的元件与半导体衬底的其它元件一起形成绝缘区域。

92. 发明授权

US07868363B2 Semiconductor component arrangement comprising a trench transistor 有权
标题翻译：半导体元件布置包括沟槽晶体管
公开(公告)号：US07868363B2
公开(公告)日：2011-01-11
申请号：US11715275
申请日：2007-03-07
申请人： Markus Zundel , Franz Hirler , Norbert Krischke
发明人： Markus Zundel , Franz Hirler , Norbert Krischke
IPC分类号： H01L29/76
CPC分类号： H01L29/7816 , H01L21/743 , H01L27/0733 , H01L28/40 , H01L29/0696 , H01L29/407 , H01L29/41766 , H01L29/66734 , H01L29/7803 , H01L29/7804 , H01L29/7809 , H01L29/7813 , H01L29/945
摘要： Disclosed is a semiconductor component arrangement and a method for producing a semiconductor component arrangement. The method comprises producing a trench transistor structure with at least one trench disposed in the semiconductor body and with at least a gate electrode disposed in the at least one trench. An electrode structure is disposed in at least one further trench and comprises an at least one electrode. The at least one trench of the transistor structure and the at least one further trench are produced by common process steps. Furthermore, the at least one electrode of the electrode structure and the gate electrode are produced by common process steps.
摘要翻译：公开了一种用于制造半导体元件布置的半导体元件布置和方法。该方法包括产生沟槽晶体管结构，其中至少一个沟槽设置在半导体本体中，并且至少一个栅电极设置在该至少一个沟槽中。电极结构设置在至少一个另外的沟槽中，并且包括至少一个电极。晶体管结构的至少一个沟槽和至少一个另外的沟槽通过公共工艺步骤产生。此外，电极结构的至少一个电极和栅电极通过常规的工艺步骤制造。

93. 发明授权

US07867879B2 Method for dividing a semiconductor substrate and a method for producing a semiconductor circuit arrangement 有权
标题翻译：用于分割半导体衬底的方法和用于制造半导体电路装置的方法
公开(公告)号：US07867879B2
公开(公告)日：2011-01-11
申请号：US12188232
申请日：2008-08-08
申请人： Hans Weber , Markus Zundel
发明人： Hans Weber , Markus Zundel
IPC分类号： H01L21/304
CPC分类号： H01L21/78
摘要： A method for dividing a semiconductor substrate involves providing a semiconductor substrate. At least one separating trench is produced at a front side of the semiconductor substrate. A layer is produced at least at the bottom of the at least one separating trench. The semiconductor substrate is thinned at a rear side of the semiconductor substrate at least as far as the layer at the bottom of the at least one separating trench. The layer is severed in order to divide the semiconductor substrate into individual pieces.
摘要翻译：用于分割半导体衬底的方法包括提供半导体衬底。在半导体衬底的前侧产生至少一个分离沟槽。至少在至少一个分离槽的底部产生一层。半导体衬底在半导体衬底的后侧至少与至少一个分离沟槽的底部的层一样薄化。为了将半导体衬底分成单独的部分，该层被切断。

94. 发明授权

US07843006B2 Semiconductor component arrangement having a power transistor and a temperature measuring arrangement 有权
标题翻译：具有功率晶体管和温度测量装置的半导体元件布置
公开(公告)号：US07843006B2
公开(公告)日：2010-11-30
申请号：US11701248
申请日：2007-02-01
申请人： Rainald Sander , Markus Zundel
发明人： Rainald Sander , Markus Zundel
IPC分类号： H01L27/12
CPC分类号： H01L29/7813 , G01K3/005 , G01K7/226 , H01L29/0696 , H01L29/7803 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor component arrangement includes a power transistor and a temperature measurement circuit. The power transistor includes a gate electrode, a source zone, a drain zone and a body zone. The body zone is arranged in a first semiconductor zone of a first conduction type. The temperature measuring circuit comprises a temperature-dependent resistor and an evaluation circuit coupled to the temperature-dependent resistor. The resistor is formed by a portion of said first semiconductor zone.
摘要翻译：半导体元件布置包括功率晶体管和温度测量电路。功率晶体管包括栅电极，源极区，漏区和体区。身体区域布置在第一导电类型的第一半导体区域中。温度测量电路包括温度依赖电阻器和耦合到温度依赖电阻器的评估电路。电阻器由所述第一半导体区域的一部分形成。

95. 发明申请

US20100270620A1 System and Method for Constructing Shielded Seebeck Temperature Difference Sensor 有权
标题翻译：用于构建屏蔽塞贝克温差传感器的系统和方法
公开(公告)号：US20100270620A1
公开(公告)日：2010-10-28
申请号：US12431504
申请日：2009-04-28
申请人： Donald Dibra , Christoph Kadow , Markus Zundel
发明人： Donald Dibra , Christoph Kadow , Markus Zundel
IPC分类号： H01L35/28 , H01L35/34
CPC分类号： H01L35/32 , G01K1/08 , G01K7/02
摘要： An embodiment of the invention relates to a Seebeck temperature difference sensor that may be formed in a trench on a semiconductor device. A portion of the sensor may be substantially surrounded by an electrically conductive shield. A plurality of junctions may be included to provide a higher Seebeck sensor voltage. The shield may be electrically coupled to a local potential, or left electrically floating. A portion of the shield may be formed as a doped well in the semiconductor substrate on which the semiconductor device is formed, or as a metal layer substantially covering the sensor. The shield may be formed as a first oxide layer on a sensor trench wall with a conductive shield formed on the first oxide layer, and a second oxide layer formed on the conductive shield. An absolute temperature sensor may be coupled in series with the Seebeck temperature difference sensor.
摘要翻译：本发明的实施例涉及可以形成在半导体器件上的沟槽中的塞贝克温差传感器。传感器的一部分可以被导电屏蔽件基本上包围。可以包括多个结以提供更高的塞贝克传感器电压。屏蔽可以电耦合到局部电位，或者电耦合到电浮置。屏蔽的一部分可以形成为半导体器件形成的半导体衬底中的掺杂阱，或者形成为基本覆盖传感器的金属层。屏蔽件可以形成为在传感器沟槽壁上的第一氧化物层，其中形成在第一氧化物层上的导电屏蔽层和形成在导电屏蔽上的第二氧化物层。绝对温度传感器可以与塞贝克温差传感器串联耦合。

96. 发明授权

US07675114B2 Trench transistor with increased avalanche strength 有权
标题翻译：具有雪崩强度增加的沟槽晶体管
公开(公告)号：US07675114B2
公开(公告)日：2010-03-09
申请号：US11393092
申请日：2006-03-30
申请人： Markus Zundel
发明人： Markus Zundel
IPC分类号： H01L29/94 , H01L31/113
CPC分类号： H01L29/7813 , H01L29/0626 , H01L29/0878 , H01L29/42368
摘要： In order to obtain an increased avalanche strength, a trench transistor is proposed in which the breakdown location is defined in a trench bottom region below body contact zones. This is done by means of a modulation of the dopant concentration in a drift zone and an insulation layer thickness modulation in the bottom region of the trenches.
摘要翻译：为了获得增加的雪崩强度，提出了一种沟槽晶体管，其中击穿位置被限定在主体接触区域下方的沟槽底部区域中。这通过调制漂移区中的掺杂剂浓度和在沟槽的底部区域中的绝缘层厚度调制来完成。

97. 发明授权

US07655975B2 Power trench transistor 有权
标题翻译：功率沟槽晶体管
公开(公告)号：US07655975B2
公开(公告)日：2010-02-02
申请号：US11264756
申请日：2005-10-31
申请人： Franz Hirler , Wolfgang Werner , Markus Zundel , Frank Pfirsch
发明人： Franz Hirler , Wolfgang Werner , Markus Zundel , Frank Pfirsch
IPC分类号： H01L29/94
CPC分类号： H01L29/7811 , H01L29/0696 , H01L29/0878 , H01L29/407 , H01L29/42368 , H01L29/7813
摘要： A power trench transistor comprises a semiconductor body in which a cell array and an edge region surrounding the cell array are formed. First edge trenches are formed within the edge region. The first edge trenches contain field electrodes and the longitudinal orientations of the first edge trenches run from the cell array towards the edge of the trench transistor.
摘要翻译：功率沟槽晶体管包括其中形成有单元阵列和围绕单元阵列的边缘区域的半导体本体。第一边缘沟槽形成在边缘区域内。第一边缘沟槽包含场电极，并且第一边缘沟槽的纵向取向从单元阵列朝向沟槽晶体管的边缘延伸。

98. 发明授权

US07439579B2 Power semiconductor with functional element guide structure 有权
标题翻译：功能元件引导结构的功率半导体
公开(公告)号：US07439579B2
公开(公告)日：2008-10-21
申请号：US11137942
申请日：2005-05-26
申请人： Rainald Sander , Markus Zundel
发明人： Rainald Sander , Markus Zundel
IPC分类号： H01L29/94
CPC分类号： H01L29/7813 , H01L27/0211 , H01L29/0696 , H01L29/1095 , H01L29/42368 , H01L29/7803
摘要： A trench transistor is described. In one aspect, the trench transistor has a cell array having a plurality of cell array trenches and a plurality of mesa zones arranged between the cell array trenches, and a semiconductor functional element formed in one of the mesa zones. A current flow guiding structure is provided in the mesa zone in which the semiconductor functional element is formed, said structure being formed at least partly below the semiconductor functional element and being configured such that vertically oriented current flows out of the semiconductor functional element or into the semiconductor functional element are made more difficult and horizontally oriented current flows through the semiconductor functional element are promoted.
摘要翻译：描述了沟槽晶体管。在一个方面，沟槽晶体管具有具有多个单元阵列沟槽的单元阵列和布置在单元阵列沟槽之间的多个台面区，以及形成在台面区之一中的半导体功能元件。电流引导结构设置在其中形成有半导体功能元件的台面区域中，所述结构至少部分地形成在半导体功能元件下方，并且被配置为使得垂直取向的电流流出半导体功能元件或者形成为使半导体功能元件变得更加困难，并促进流过半导体功能元件的水平取向的电流。

99. 发明申请

US20080121991A1 SEMICONDUCTOR COMPONENT ARRANGEMENT AND METHOD FOR PRODUCING THEREOF 审中-公开
标题翻译：半导体元件配置及其生产方法
公开(公告)号：US20080121991A1
公开(公告)日：2008-05-29
申请号：US11771375
申请日：2007-06-29
申请人： Markus Zundel , Norbert Krischke
发明人： Markus Zundel , Norbert Krischke
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7827 , H01L21/26586 , H01L21/823487 , H01L27/088 , H01L27/092 , H01L29/4236 , H01L29/42368 , H01L29/66348 , H01L29/66666 , H01L29/7397 , H01L29/7803 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor component arrangement and method for producing thereof is disclosed. One embodiment provides at least one power semiconductor component integrated in a semiconductor body and at least one logic component integrated in the semiconductor body. The logic component includes a trench extending into the semiconductor body proceeding from a first side, at least one gate electrode arranged in the trench and insulated from the semiconductor body by a gate dielectric, and at least one source zone and at least one drain zone of a first conduction type, which are formed in the semiconductor body in a manner adjacent to the gate dielectric and in a manner spaced apart from one another in a peripheral direction of the trench and between which at least one body zone of a second conduction type is arranged.
摘要翻译：公开了一种半导体元件布置及其制造方法。一个实施例提供集成在半导体本体中的至少一个功率半导体元件和集成在半导体本体中的至少一个逻辑元件。逻辑部件包括从第一侧延伸到半导体本体中的沟槽，布置在沟槽中的至少一个栅极电极，并通过栅极电介质与半导体本体绝缘，以及至少一个源极区和至少一个漏极区第一导电类型，其以与栅极电介质相邻的方式形成在半导体本体中，并且在沟槽的周向方向上彼此间隔开，并且其中至少一个第二导电类型的体区是安排。

100. 发明申请

US20080088355A1 INTEGRATED CIRCUIT INCLUDING A SEMICONDUCTOR DEVICE 有权
标题翻译：集成电路，包括半导体器件
公开(公告)号：US20080088355A1
公开(公告)日：2008-04-17
申请号：US11870750
申请日：2007-10-11
申请人： Mathias Von Borcke , Markus Zundel , Thorsten Meyer , Uwe Schmalzbauer
发明人： Mathias Von Borcke , Markus Zundel , Thorsten Meyer , Uwe Schmalzbauer
IPC分类号： H03K17/687
CPC分类号： H01L29/7815 , H01L29/0653 , H01L29/0696 , H01L29/407 , H01L29/42368 , H01L29/7811 , H01L29/7813 , H03K17/18 , H03K17/687
摘要： An integrated circuit including a semiconductor device is disclosed. One embodiment provides a load current component, having a multiplicity of trenches in a cell array. A sensor component is integrated into the cell array of the load current component and has a sensor cell array, the area of which is smaller than the area of the cell array of the load current component by a specific factor. The trenches forming the cell array of the sensor component correspond to the trenches of the cell array of the load current component, configured such that the trenches of the sensor component at the at least one side merge uniformly into the trenches of the cell array of the load current component without interruptions or disturbances of the trench geometry.
摘要翻译：公开了一种包括半导体器件的集成电路。一个实施例提供负载电流分量，其具有单元阵列中的多个沟槽。传感器组件被集成到负载电流分量的单元阵列中，并且具有传感器单元阵列，其区域小于负载电流分量的单元阵列的面积的特定因子。形成传感器组件的单元阵列的沟槽对应于负载电流分量的单元阵列的沟槽，其被配置为使得至少一侧的传感器组件的沟槽均匀地合并到单元阵列的沟槽中负载电流分量，不影响沟槽几何形状的干扰或干扰。

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