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    • 91. 发明授权
    • Semiconductor memory device and method of writing into the same
    • 半导体存储器件及其写入方法
    • US08411484B2
    • 2013-04-02
    • US12262577
    • 2008-10-31
    • Masaki Aoki
    • Masaki Aoki
    • G11C11/00G11C7/00G11C7/22
    • H01L27/101G11C13/0007G11C13/0069G11C2013/0071G11C2013/009G11C2213/32G11C2213/34G11C2213/79H01L27/24
    • A method of writing into a semiconductor memory device, which includes a resistance memory element 14 which memorizes a high resistance state and a low resistance state and switches between the high resistance state and the low resistance state by an application of a voltage; a transistor 12 including a drain terminal connected to one terminal of the resistance memory element 14 and a source terminal connected to a reference voltage; and a transistor 16 including a source terminal connected to the other terminal of the resistance memory element 14. When a write voltage is applied to the resistance memory element 14 via the transistor 16 to switch the resistance memory element 14 from the low resistance state to the high resistance state, a voltage to be applied to the resistance memory element 14 is controlled at a value which is not less than a reset voltage of the resistance memory element 14 and less than a set voltage of the resistance memory element 14 by controlling a voltage to be applied to a gate terminal of the transistor 16 so as to be set at a value which is not less than a total of the reset voltage and a threshold voltage of the transistor 16 and is less than a total of the set voltage and the threshold voltage of the transistor 16.
    • 一种写入半导体存储器件的方法,其包括存储高电阻状态和低电阻状态的电阻存储元件14,并通过施加电压在高电阻状态和低电阻状态之间切换; 包括连接到电阻存储元件14的一个端子的漏极端子和与参考电压相连的源极端子的晶体管12; 以及晶体管16,其包括连接到电阻存储元件14的另一端的源极端子。当经由晶体管16将写入电压施加到电阻存储元件14时,将电阻存储元件14从低电阻状态切换到 高电阻状态时,施加到电阻存储元件14的电压被控制为不小于电阻存储元件14的复位电压并且小于电阻存储元件14的设定电压的值,通过控制电压 施加到晶体管16的栅极端子,以便被设置为不小于复位电压和晶体管16的阈值电压的总和并且小于设定电压的总和的值,并且 晶体管16的阈值电压。
    • 92. 发明授权
    • Resistive memory and data write-in method
    • 电阻记忆和数据写入方式
    • US07924601B2
    • 2011-04-12
    • US12561797
    • 2009-09-17
    • Masaki Aoki
    • Masaki Aoki
    • G11C11/00
    • G11C13/0007G11C13/0069G11C2213/31G11C2213/79
    • An ReRAM of the present invention includes a high speed write-in region and a main memory region, only memory cells designated to have the storage state out of the memory cells corresponded to data are set to the storage state in the high speed write-in region. The data written in the memory cell array are transferred to the main memory region, the memory cells of the memory cell array corresponded to the data transferred from the high speed write-in region are reset to the no-storage state in the main memory region, only the memory cells designated to have the storage state out of the memory cells are set, and all memory cells are reset to the no-storage state, or the initial state, in the high speed write-in region.
    • 本发明的ReRAM包括高速写入区域和主存储区域,仅将指定为具有对应于数据的存储单元中的存储状态的存储单元设置为高速写入中的存储状态 地区。 写入存储单元阵列的数据被传送到主存储区域,对应于从高速写入区传送的数据的存储单元阵列的存储单元被复位到主存储区域中的非存储状态 只有存储单元被指定为具有存储状态的存储单元才被设置,并且所有存储单元都被复位到高速写入区域中的无存储状态或初始状态。
    • 93. 发明申请
    • RESISTIVE MEMORY AND DATA WRITE-IN METHOD
    • 电阻记忆和数据写入方法
    • US20100157655A1
    • 2010-06-24
    • US12561797
    • 2009-09-17
    • Masaki Aoki
    • Masaki Aoki
    • G11C11/00G11C8/00G11C7/00
    • G11C13/0007G11C13/0069G11C2213/31G11C2213/79
    • An ReRAM of the present invention includes a high speed write-in region and a main memory region, only memory cells designated to have the storage state out of the memory cells corresponded to data are set to the storage state in the high speed write-in region. The data written in the memory cell array are transferred to the main memory region, the memory cells of the memory cell array corresponded to the data transferred from the high speed write-in region are reset to the no-storage state in the main memory region, only the memory cells designated to have the storage state out of the memory cells are set, and all memory cells are reset to the no-storage state, or the initial state, in the high speed write-in region.
    • 本发明的ReRAM包括高速写入区域和主存储区域,仅将指定为具有对应于数据的存储单元中的存储状态的存储单元设置为高速写入中的存储状态 地区。 写入存储单元阵列的数据被传送到主存储区域,对应于从高速写入区传送的数据的存储单元阵列的存储单元被复位到主存储区域中的非存储状态 只有存储单元被指定为具有存储状态的存储单元才被设置,并且所有存储单元都被复位到高速写入区域中的无存储状态或初始状态。
    • 94. 发明授权
    • Magnetic memory device and method of writing into the same
    • 磁记忆装置及其写入方法
    • US07613035B2
    • 2009-11-03
    • US12135529
    • 2008-06-09
    • Masaki Aoki
    • Masaki Aoki
    • G11C11/00
    • H01L27/228B82Y10/00G11C11/1655G11C11/1657G11C11/1659G11C11/1673G11C11/1675
    • A magnetic memory device includes a memory cell including magnetoresistance effect elements MTJ1, MTJ2 and a select transistor connected to the connection node of the magnetoresistance effect elements MTJ1, MTJ2, a first signal line extended in a first direction and connected to the magnetoresistance effect element MTJ1, a second signal line extended in the first direction and connected to the magnetoresistance effect element MTJ2, and a third signal line extended in a second direction and crossing the first signal line in a region where the magnetoresistance effect element MTJ1 is formed and crossing the second signal line in a region where the magnetoresistance effect element MTJ2 is formed. When memory information is written into the memory cell, the memory information to be memorized is switched by directions of write currents to be flowed to the first and the second signal lines.
    • 磁存储器件包括存储单元,其包括磁阻效应元件MTJ1,MTJ2和连接到磁阻效应元件MTJ1,MTJ2的连接节点的选择晶体管,第一信号线在第一方向上延伸并连接到磁阻效应元件MTJ1 在第一方向上延伸并连接到磁阻效应元件MTJ2的第二信号线和在第二方向上延伸的第三信号线,并且在形成有磁阻效应元件MTJ1的区域中与第一信号线交叉并与第二信号线交叉, 形成磁阻效应元件MTJ2的区域的信号线。 当将存储器信息写入存储单元时,要存储的存储器信息通过要流向第一和第二信号线的写入电流的方向来切换。
    • 96. 发明授权
    • Plasma display panel with superior light-emitting characteristics, and method and apparatus for producing the plasma display panel
    • 具有优异发光特性的等离子体显示面板,以及用于制造等离子体显示面板的方法和装置
    • US07172482B2
    • 2007-02-06
    • US10943697
    • 2004-09-17
    • Hiroyuki KadoMitsuhiro OhtaniMasaki AokiKanako Miyashita
    • Hiroyuki KadoMitsuhiro OhtaniMasaki AokiKanako Miyashita
    • H01J9/44
    • H01J9/38H01J9/241H01J9/261H01J9/385H01J11/12H01J11/36H01J11/42H01J11/48H01J11/54H01J2211/48
    • A PDP with superior light-emitting characteristics and color reproduction is achieved by setting the chromaticity coordinate y (the CIE color specification) of light to 0.08 or less, more preferably to 0.07 or less, or 0.06 or less, enabling the color temperature of light to be set to 7,000K or more, and further to 8,000K or more, 9,000K or more, or 10,000K or more. The PDP is manufactured by a method in which the processes for heating the fluorescent substances such as the fluorescent substance baking, sealing material temporary baking, bonding, and exhausting processes are performed in the dry gas atmosphere, or in an atmosphere in which a dry gas is circulated at a pressure lower than the atmospheric pressure. This PDP is also manufactured by: a method in which after the front and back panels are bonded together, the exhausting process for exhausting gas from the inner space between panels is started while the panels are not cooled to room temperature; or a method in which after the front and back panels are temporarily baked, the process for bonding the panels is started while the panels are not cooled to room temperature. This reduces the time and energy required for heating, resulting in reduction of manufacturing cost.
    • 通过将光的色度坐标y(CIE颜色规格)设定为0.08以下,更优选为0.07以下或0.06以下,能够实现具有优异的发光特性和色彩再现的PDP,能够实现光的色温 设定为7000K以上,进一步为8,000K以上,9000K以上,10,000K以上。 PDP的制造方法是,在干燥气体气氛中,或在干燥气体的气氛中进行荧光物质烘烤,密封材料的暂时烘烤,粘合,排出等荧光物质的加热处理 在低于大气压的压力下循环。 该PDP也通过以下方法制造:其中在前面板和后面板结合在一起之后,在面板未冷却至室温的同时开始从面板之间的内部空间排出气体的排气过程; 或者在将前面板和后面板暂时烘烤之后,在面板未冷却至室温的同时开始接合面板的工序。 这减少了加热所需的时间和能量,从而降低制造成本。