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91. 发明授权

US5783336A Mask for exposure 失效
标题翻译：面具曝光
公开(公告)号：US5783336A
公开(公告)日：1998-07-21
申请号：US729281
申请日：1996-10-10
申请人： Masami Aoki , Yusuke Kohyama , Soichi Inoue , Akiko Nikki
发明人： Masami Aoki , Yusuke Kohyama , Soichi Inoue , Akiko Nikki
IPC分类号： G03F1/00 , G03F9/00
CPC分类号： G03F1/30 , G03F1/26
摘要： A mask for exposure includes a light transmitting substrate, a plurality of substantially oblong, island-like light transmitting sections arranged periodically on the substrate, an opaque section formed on the substrate except where the light transmitting sections are arranged, and a plurality of phase shifter layers selectively formed in the light transmitting sections. The light transmitting sections include paired light transmitting sections opposed to each other at one end portion, and one of the phase shifter layers is formed in one of the paired light transmitting sections. An interval between the paired light transmitting sections at one end portion is smaller than an interval between adjacent ones of the light transmitting sections at portions other than the one end portion.
摘要翻译：用于曝光的掩模包括透光基板，在基板周期性地布置的多个基本上长方形的岛状光透射部分，形成在基板上的不透明部分，除了布置有透光部分之外的多个移相器在透光部中选择性地形成层。光透射部分包括在一个端部处彼此相对的成对的光透射部分，并且一个移相器层形成在一个光发射部分之一中。在一个端部的一对光传输部之间的间隔小于在一个端部以外的部分的相邻的透光部之间的间隔。

92. 发明授权

US5745388A Profile simulation method and pattern design method 失效
标题翻译：轮廓模拟方法和模式设计方法
公开(公告)号：US5745388A
公开(公告)日：1998-04-28
申请号：US551803
申请日：1995-11-07
申请人： Shoji Mimotogi , Soichi Inoue
发明人： Shoji Mimotogi , Soichi Inoue
IPC分类号： G01B11/24 , G03F7/26 , G06F17/50 , G06F19/00 , G06T11/20 , H01L21/00 , H01L21/027 , H01L21/302 , H01L21/3065
CPC分类号： G06F17/5018 , G06T11/203
摘要： A profile simulation method of predicting a profile of a surface of a film to be processed which changes when the surface of the film on a substrate is physically or chemically processed, is characterized by comprising the steps of setting a plurality of representative points on the surface of the film before a process, moving the plurality of representative points in a first direction perpendicular to the surface of the film on the substrate in accordance with processing velocities at the plurality of representative points, switching the moving direction of the representative points from the first direction to a second direction parallel to the surface of the film on the substrate, and moving the plurality of representative points in the second direction in accordance with processing velocities at the plurality of representative points, and setting all loci of the plurality of representative points, which have moved from the first direction to the second direction in a predetermined processing time, as paths, and obtaining a envelope or surface for all the paths as a profile after the process.
摘要翻译：一种轮廓模拟方法，其特征在于包括以下步骤：在所述表面上设置多个代表点，所述轮廓模拟方法用于预测在基材上的所述膜的表面物理或化学处理时改变的被处理膜表面的轮廓，在所述处理之前，根据所述多个代表点处的处理速度，在与所述基板上的所述膜的表面垂直的第一方向上移动所述多个代表点，将所述代表点的移动方向从所述第一方向到平行于基板上的膜表面的第二方向，并且根据多个代表点处的处理速度在第二方向上移动多个代表点，并且设置多个代表点的所有轨迹，它们以预定的p从第一方向移动到第二方向处理时间作为路径，并且在所有过程之后获得用于所有路径的包络或表面作为简档。

93. 发明授权

US08183119B2 Semiconductor device fabrication method using multiple mask patterns 有权
标题翻译：使用多个掩模图案的半导体器件制造方法
公开(公告)号：US08183119B2
公开(公告)日：2012-05-22
申请号：US12724118
申请日：2010-03-15
申请人： Koji Hashimoto , Soichi Inoue , Kazuhiro Takahata , Kei Yoshikawa
发明人： Koji Hashimoto , Soichi Inoue , Kazuhiro Takahata , Kei Yoshikawa
IPC分类号： H01L22/321
CPC分类号： G03F7/0035 , H01L21/0338 , H01L21/28123 , H01L21/32139 , H01L21/823456 , H01L21/823475 , H01L27/10873 , H01L27/10894 , H01L27/10897
摘要： A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.
摘要翻译：在工作薄膜（3）上的硬掩模材料膜（4）上的曝光分辨率的限制的尺寸形成抗蚀剂图案（5）。使用抗蚀剂图案（5）作为掩模来处理材料膜（4）。由此形成硬掩模图案（6）。由此，在非选择区域（6b）上形成具有露出掩模图案中的选择区域（6a）的开口（7a）的抗蚀剂图案（7）。通过进行选择蚀刻，只有通过开口（7a）露出的掩模图案（6a）变薄，通过使用掩模图案（6）蚀刻工作膜（3）。由此形成工作胶片图案（8），其包括具有限制曝光分辨率的尺寸宽度的宽图案部分（8a）和尺寸不超过限制的尺寸的纤薄图案部分（8a）曝光分辨率。

94. 发明授权

US07499582B2 Method for inspecting a defect in a photomask, method for manufacturing a semiconductor device and method for producing a photomask 失效
标题翻译：用于检查光掩模中的缺陷的方法，用于制造半导体器件的方法和用于制造光掩模的方法
公开(公告)号：US07499582B2
公开(公告)日：2009-03-03
申请号：US10878384
申请日：2004-06-29
申请人： Toshiya Kotani , Suigen Kyoh , Shinji Yamaguchi , Soichi Inoue
发明人： Toshiya Kotani , Suigen Kyoh , Shinji Yamaguchi , Soichi Inoue
IPC分类号： G06K9/00
CPC分类号： G03F1/84 , G06T7/001 , G06T2207/30148
摘要： There is disclosed a method for inspecting a defect in a photomask which is produced by using a graphic data, that matches mask data or is produced by subjecting mask data to correction of a process conversion difference relating to at least a line width. The method includes the following steps. Inspection data is produced by correcting a pattern of mask data so as to substantially match a planar shape of a pattern of a photomask to be produced by using the graphic data. A pattern of a produced photomask is compared with a pattern of the inspection data. Portions where planar shapes of the pattern of the inspection data and the pattern of the produced photomask do not match are extracted. A defect is distinguished from the portions where the planer shapes do not match.
摘要翻译：公开了一种用于检查光掩模中的缺陷的方法，其通过使用匹配掩模数据的图形数据或通过对掩模数据进行校正至少与线宽相关的处理转换差来产生。该方法包括以下步骤。通过校正掩模数据的图案以便通过使用图形数据基本上匹配要产生的光掩模的图案的平面形状来产生检查数据。将生成的光掩模的图案与检查数据的图案进行比较。提取检查数据的图案的平面形状和所生成的光掩模的图案不匹配的部分。缺陷与刨床形状不匹配的部分不同。

95. 发明申请

US20090021711A1 METHOD OF INSPECTING EXPOSURE SYSTEM AND EXPOSURE SYSTEM 审中-公开
标题翻译：检查曝光系统和曝光系统的方法
公开(公告)号：US20090021711A1
公开(公告)日：2009-01-22
申请号：US12173943
申请日：2008-07-16
申请人： Takashi Sato , Soichi Inoue
发明人： Takashi Sato , Soichi Inoue
IPC分类号： G03B27/42 , G01B11/14
CPC分类号： G03F7/706 , G03B27/42 , G03F1/44
摘要： A method of inspecting an exposure system uses a mask pattern including a first and a second mask pattern, the first pattern being formed in a line-and-space of a first pitch, the second pattern being disposed in parallel with the first mask pattern and formed in a line-and-space of a second pitch. The method includes illuminating the mask pattern with inspection light at a first angle with the optical axis of the illumination light from a light source, allowing the first mask pattern to diffract the inspection light to generate first diffraction light, and allowing the second mask pattern to diffract the inspection light to generate second diffraction light. The first angle is to allow the first diffraction light to be diffracted asymmetrically with the optical axis into the projection optical system and the second diffraction light to be diffracted symmetrically with the optical axis into the projection optical system.
摘要翻译：检查曝光系统的方法使用包括第一和第二掩模图案的掩模图案，第一图案形成在第一间距的直线和间隔中，第二图案与第一掩模图案平行设置，形成在第二间距的线和空间中。该方法包括用来自光源的照明光的光轴以第一角度的检查光照亮掩模图案，允许第一掩模图案衍射检查光以产生第一衍射光，并允许第二掩模图案衍射检查光以产生第二衍射光。第一角度是允许第一衍射光被光轴不对称地衍射到投影光学系统中，并且第二衍射光将被光轴对称地衍射到投影光学系统中。

96. 发明授权

US07371483B2 Method for manufacturing mask for focus monitoring, and method for manufacturing semiconductor device 失效
标题翻译：用于制造焦点监视用掩模的方法以及半导体装置的制造方法
公开(公告)号：US07371483B2
公开(公告)日：2008-05-13
申请号：US10830399
申请日：2004-04-23
申请人： Shingo Kanamitsu , Takashi Hirano , Kyoko Izuha , Soichi Inoue , Shinichi Ito
发明人： Shingo Kanamitsu , Takashi Hirano , Kyoko Izuha , Soichi Inoue , Shinichi Ito
IPC分类号： G03F9/00
CPC分类号： G03F1/32 , G03F1/44 , Y10S430/143
摘要： Disclosed is a method for manufacturing a mask for focus monitoring, comprising forming a first opening portion and a second opening portion in a surface region of a transparent substrate, the second opening portion having a pattern shape corresponding to a pattern shape of the first opening portion, and being surrounded by a stack film formed of a halftone film on the transparent substrate and an opaque film on the halftone film, and radiating a charged beam onto a first region which includes an edge of the second opening portion and inside and outside regions which are respectively located inward and outward of the edge of the second opening portion, to etch that part of the transparent substrate which corresponds to the inside region.
摘要翻译：本发明公开了一种制造用于聚焦监测的掩模的方法，包括在透明基板的表面区域中形成第一开口部分和第二开口部分，所述第二开口部分具有与第一开口部分的图案形状对应的图案形状并且被由透明基板上的半色调膜形成的叠层膜和半色调膜上的不透明膜包围，并且将带电束辐射到包括第二开口部分的边缘和内部和外部区域的第一区域上，分别位于第二开口部分的边缘的内侧和外侧，以蚀刻对应于内部区域的透明基板的那部分。

97. 发明申请

US20070177127A1 Wafer flatness evaluation method, wafer flatness evaluation apparatus carrying out the evaluation method, wafer manufacturing method using the evaluation method, wafer quality assurance method using the evaluation method, semiconductor device manufacturing method using the evaluation method and semiconductor device manufacturing method using a wafer evaluated by the evaluation method 有权
标题翻译：晶片平坦度评估方法，执行评估方法的晶片平整度评估装置，使用评估方法的晶片制造方法，使用评估方法的晶片质量保证方法，使用评估方法的半导体器件制造方法和使用由评估方法
公开(公告)号：US20070177127A1
公开(公告)日：2007-08-02
申请号：US11710552
申请日：2007-02-26
申请人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
发明人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
IPC分类号： G03B27/58
CPC分类号： G01B21/30 , G01B11/306 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
摘要翻译：公开了一种晶片平坦度评估方法，其包括测量晶片的前后表面形状。测量的晶圆正面分为几个部位。然后，根据要评估的位置的位置选择平坦度计算方法，并获得晶片表面的平坦度。

98. 发明授权

US07230680B2 Wafer flatness evaluation method, wafer flatness evaluation apparatus carrying out the evaluation method, wafer manufacturing method using the evaluation method, wafer quality assurance method using the evaluation method, semiconductor device manufacturing method using the evaluation method and semiconductor device manufacturing method using a wafer evaluated by the evaluation method 有权
公开(公告)号：US07230680B2
公开(公告)日：2007-06-12
申请号：US10739275
申请日：2003-12-19
申请人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
发明人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
IPC分类号： G03B27/58 , G03B27/42
CPC分类号： G01B21/30 , G01B11/306 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.

99. 发明授权

US07208423B2 Semiconductor device fabrication method and semiconductor device 有权
标题翻译：半导体器件制造方法和半导体器件
公开(公告)号：US07208423B2
公开(公告)日：2007-04-24
申请号：US10107298
申请日：2002-03-28
申请人： Koji Hashimoto , Soichi Inoue , Kazuhiro Takahata , Kei Yoshikawa
发明人： Koji Hashimoto , Soichi Inoue , Kazuhiro Takahata , Kei Yoshikawa
IPC分类号： H01L21/302 , G03C5/00 , B44C1/22
CPC分类号： G03F7/0035 , H01L21/0338 , H01L21/28123 , H01L21/32139 , H01L21/823456 , H01L21/823475 , H01L27/10873 , H01L27/10894 , H01L27/10897
摘要： A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.
摘要翻译：在工作薄膜（3）上的硬掩模材料膜（4）上的曝光分辨率的限制的尺寸形成抗蚀剂图案（5）。使用抗蚀剂图案（5）作为掩模来处理材料膜（4）。由此形成硬掩模图案（6）。由此，在非选择区域（6b）上形成具有开口（7a）的抗蚀剂图案（7），掩模图案中的选择区域（6a）通过该开口暴露。仅通过开口（7a）暴露的掩模图案（6a）通过进行选择蚀刻而变薄，通过使用掩模图案（6）蚀刻工作膜（3）。由此形成工作胶片图案（8），其包括具有限制曝光分辨率的尺寸宽度的宽图案部分（8a）和尺寸不大于该尺寸的尺寸的纤薄图案部分（8a）曝光分辨率的限制。

100. 发明授权

US07061603B2 Method for inspecting exposure apparatus 失效
标题翻译：检查曝光装置的方法
公开(公告)号：US07061603B2
公开(公告)日：2006-06-13
申请号：US10806448
申请日：2004-03-23
申请人： Kazuya Sato , Soichi Inoue
发明人： Kazuya Sato , Soichi Inoue
IPC分类号： G01N21/88
CPC分类号： G03F7/70591 , G01N21/956 , G03F7/70941
摘要： Light emitted from an illumination optical system is guided to a photomask where a pattern is formed of an optical member including a light transmission pattern as a diffraction grating pattern, in which a light transmission part and a opaque part are repeated in a finite period and a periphery of the light transmission pattern is shielded by a opaque area, such that a plurality of ratios are given between the light transmission part and the opaque part. Diffraction light, which has passed through the photomask, is irradiated on a projection optical system, thereby to transfer a pattern reflecting an intensity distribution of the diffraction light to a wafer. A change of transmittance depending on a light path of the projection optical system is measured, based on a pattern image of the diffraction light transferred to the wafer. Pattern transfer is carried out in a non-conjugate state.
摘要翻译：从照明光学系统发射的光被引导到光掩模，其中图案由包括作为衍射光栅图案的光透射图案的光学构件形成，其中在有限的周期内重复光透射部分和不透明部分，透光图案的周边被不透明区域屏蔽，使得在透光部分和不透明部分之间具有多个比率。已经通过光掩模的衍射光被照射在投影光学系统上，从而将反射衍射光的强度分布的图案传送到晶片。基于传输到晶片的衍射光的图案图像，测量根据投影光学系统的光路的透射率的变化。模式转移在非共轭状态下进行。

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