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91. 发明申请

US20130260232A1 Alkali and Alkaline-Earth Ion Batteries with Hexacyanometallate Cathode and Non-Metal Anode 有权
标题翻译：碱金属和碱金属离子电池与六金属金属阴极和非金属阳极
公开(公告)号：US20130260232A1
公开(公告)日：2013-10-03
申请号：US13449195
申请日：2012-04-17
申请人： Yuhao Lu , Jong-Jan Lee , Motoaki Nishijima , Seizoh Kakimoto
发明人： Yuhao Lu , Jong-Jan Lee , Motoaki Nishijima , Seizoh Kakimoto
IPC分类号： H01M4/58 , B05D5/12 , H01M4/64
CPC分类号： H01M4/58 , H01M4/0404 , H01M4/0438 , H01M4/0445 , H01M4/0459 , H01M4/136 , H01M4/139 , H01M4/587 , H01M10/054 , H01M10/36 , H01M2004/028 , Y02E60/122
摘要： A battery structure is provided for making alkali ion and alkaline-earth ion batteries. The battery has a hexacyanometallate cathode, a non-metal anode, and non-aqueous electrolyte. A method is provided for forming the hexacyanometallate battery cathode and non-metal battery anode prior to the battery assembly. The cathode includes hexacyanometallate particles overlying a current collector. The hexacyanometallate particles have the chemical formula A′n, AmM1xM2y(CN)6, and have a Prussian Blue hexacyanometallate crystal structure.
摘要翻译：提供用于制造碱性离子和碱土离子电池的电池结构。电池具有六金属金属阴极，非金属阳极和非水电解质。提供了一种用于在电池组装之前形成六氰基金属元素电池阴极和非金属电池阳极的方法。阴极包括覆盖集电器的六氰基金属盐颗粒。六氰基金属盐颗粒具有化学式A'n，AmM1xM2y（CN）6，并具有普鲁士蓝六氰基金属酸盐晶体结构。

92. 发明申请

US20100102366A1 Integrated Infrared and Color CMOS Imager Sensor 有权
标题翻译：集成红外和彩色CMOS成像传感器
公开(公告)号：US20100102366A1
公开(公告)日：2010-04-29
申请号：US12258347
申请日：2008-10-24
申请人： Jong-Jan Lee , Douglas J. Tweet , Jon M. Speigle
发明人： Jong-Jan Lee , Douglas J. Tweet , Jon M. Speigle
IPC分类号： H01L31/112 , H01L31/18
CPC分类号： H01L27/14645 , H01L27/14609 , H01L27/14621 , H01L27/1463
摘要： An integrated infrared (IR) and full color complementary metal oxide semiconductor (CMOS) imager array is provided. The array is built upon a lightly doped p doped silicon (Si) substrate. Each pixel cell includes at least one visible light detection pixel and an IR pixel. Each visible light pixel includes a moderately p doped bowl with a bottom p doped layer and p doped sidewalls. An n doped layer is enclosed by the p doped bowl, and a moderately p doped surface region overlies the n doped layer. A transfer transistor has a gate electrode overlying the p doped sidewalls, a source formed from the n doped layer, and an n+ doped drain connected to a floating diffusion region. The IR pixel is the same, except that there is no bottom p doped layer. An optical wavelength filter overlies the visible light and IR pixels.
摘要翻译：提供集成红外（IR）和全色互补金属氧化物半导体（CMOS）成像器阵列。阵列建立在轻掺杂的p掺杂硅（Si）衬底上。每个像素单元包括至少一个可见光检测像素和IR像素。每个可见光像素包括具有底部p掺杂层和p掺杂侧壁的中等P掺杂的碗。 n掺杂层被p掺杂的碗封闭，并且中等P掺杂的表面区域覆盖在n掺杂层上。传输晶体管具有覆盖p掺杂侧壁的栅电极，由n掺杂层形成的源和连接到浮置扩散区的n +掺杂漏极。 IR像素是相同的，除了没有底部p掺杂层。光学波长滤光器覆盖可见光和IR像素。

93. 发明申请

US20070290288A1 Floating body germanium phototransistor having a photo absorption threshold bias region 有权
标题翻译：具有光吸收阈值偏置区域的浮体锗光电晶体管
公开(公告)号：US20070290288A1
公开(公告)日：2007-12-20
申请号：US11894938
申请日：2007-08-22
申请人： Sheng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet
发明人： Sheng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet
IPC分类号： H01L31/10
CPC分类号： H01L31/1136
摘要： A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a first surface of the Si substrate; forming an epitaxial Ge layer overlying the insulator layer; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers; forming source/drain (S/D) regions in the Ge layer; and, forming a photo absorption threshold bias region in the Ge layer, adjacent the channel region. In one aspect, the second S/D region has a length, longer than the first S/D length. The photo absorption threshold bias region underlies the second S/D region. Alternately, the second S/D region is separated from the channel by an offset, and the photo absorption threshold bias region is the offset in the Ge layer, after a light p-doping.
摘要翻译：提出了具有光吸收阈值偏置区域的浮体锗（Ge）光电晶体管，以及相关的制造工艺。该方法包括：提供p掺杂硅（Si）衬底; 选择性地形成覆盖在所述Si衬底的第一表面上的绝缘体层; 形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成栅极电介质，栅电极和栅极间隔物; 在Ge层中形成源极/漏极（S / D）区域; 并且在Ge层中形成邻近沟道区的光吸收阈值偏置区域。在一个方面，第二S / D区域具有比第一S / D长度更长的长度。光吸收阈值偏置区域位于第二S / D区域的下方。或者，第二S / D区域与沟道分离偏移，光吸收阈值偏置区域是在光p掺杂之后的Ge层中的偏移。

94. 发明申请

US20070218579A1 Wide output swing CMOS imager 审中-公开
标题翻译：宽输出摆幅CMOS成像器
公开(公告)号：US20070218579A1
公开(公告)日：2007-09-20
申请号：US11416742
申请日：2006-05-03
申请人： Jong-Jan Lee , Sheng Hsu
发明人： Jong-Jan Lee , Sheng Hsu
IPC分类号： H01L21/00
CPC分类号： H01L27/14647 , H01L27/14603 , H01L27/14632 , H01L27/14645 , H01L27/14683 , H01L27/14689
摘要： A CMOS active pixel sensor (APS) imager cell is provided on a silicon-on-insulator (SOI) substrate. The APS imager cell is made from a SOI substrate including a silicon (Si) substrate, a silicon dioxide insulator overlying the substrate, and a Si top layer overlying the insulator. A pixel sensor cell including a photodiode is formed in the Si top layer of the SOI substrate. A pixel transistor set is formed in the SOI top Si layer and connected to the pixel sensor cell. The pixel transistor set includes at least one p-channel MOS (PMOS) transistor and at least one n-channel MOS (NMOS) transistor. In the case of a three-transistor (3T) pixel transistor set, the selected transistor is NMOS, the reset transistor is PMOS, and the source follower may be either NMOS or PMOS.
摘要翻译：在绝缘体上硅（SOI）衬底上提供CMOS有源像素传感器（APS）成像器单元。 APS成像器单元由包括硅（Si）衬底，覆盖衬底的二氧化硅绝缘体和覆盖绝缘体的Si顶层的SOI衬底制成。在SOI衬底的Si顶层中形成包括光电二极管的像素传感器单元。像素晶体管组形成在SOI顶部Si层中并连接到像素传感器单元。像素晶体管组包括至少一个p沟道MOS（PMOS）晶体管和至少一个n沟道MOS（NMOS）晶体管。在三晶体管（3T）像素晶体管组的情况下，所选择的晶体管是NMOS，复位晶体管是PMOS，源极跟随器可以是NMOS或PMOS。

95. 发明申请

US20060281232A1 Method of growing a germanium epitaxial film on insulator for use in fabrication of a CMOS integrated circuit 有权
标题翻译：在绝缘体上生长用于制造CMOS集成电路的锗外延膜的方法
公开(公告)号：US20060281232A1
公开(公告)日：2006-12-14
申请号：US11149891
申请日：2005-06-10
申请人： Sheng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet
发明人： Sheng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet
IPC分类号： H01L21/84
CPC分类号： H01L21/8221 , H01L21/84 , H01L27/0688 , H01L27/1203 , H01L29/78684
摘要： A method of fabricating a silicon-germanium CMOS includes preparing a silicon substrate wafer; depositing an insulating layer on the silicon substrate wafer; patterning and etching the insulating layer; depositing a layer of polycrystalline germanium on the insulating layer and on at least a portion of the silicon substrate wafer; patterning and etching the polycrystalline germanium; encapsulating the polycrystalline germanium with an insulating material; rapidly thermally annealing the wafer at a temperature sufficient to melt the polycrystalline germanium; cooling the wafer to promote liquid phase epitaxy of the polycrystalline germanium, thereby forming a single crystal germanium layer; and completing the CMOS device.
摘要翻译：制造硅 - 锗CMOS的方法包括制备硅衬底晶片; 在硅衬底晶片上沉积绝缘层; 图案化和蚀刻绝缘层; 在所述绝缘层和所述硅衬底晶片的至少一部分上沉积多晶锗层; 图案化和蚀刻多晶锗; 用绝缘材料封装多晶锗; 在足以熔化多晶锗的温度下快速热退火晶片; 冷却晶片以促进多晶锗的液相外延，从而形成单晶锗层; 并完成CMOS设备。

96. 发明申请

US20060194415A1 Germanium infrared sensor for CMOS imagers 有权
标题翻译：锗红外传感器用于CMOS成像器
公开(公告)号：US20060194415A1
公开(公告)日：2006-08-31
申请号：US11069422
申请日：2005-02-28
申请人： Jong-Jan Lee , Jer-Shen Maa , Sheng Hsu , Douglas Tweet
发明人： Jong-Jan Lee , Jer-Shen Maa , Sheng Hsu , Douglas Tweet
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L27/14634 , H01L27/14649 , H01L27/14689 , H01L27/1469 , H01L31/028 , H01L31/103 , H01L31/1804 , H01L31/1808 , H01L31/1864 , Y02E10/547 , Y02P70/521
摘要： A method of fabricating a germanium infrared sensor for a CMOS imager includes preparation a donor wafer, including: ion implantation into a silicon wafer to form a P+ silicon layer; growing an epitaxial germanium layer on the P+ silicon layer, forming a silicon-germanium interface; cyclic annealing; and implanting hydrogen ions to a depth at least as deep as the P+ silicon layer to form a defect layer; preparing a handling wafer, including: fabricating a CMOS integrated circuit on a silicon substrate; depositing a layer of refractory metal; treating the surfaces of the donor wafer and the handling wafer for bonding; bonding the handling wafer and the donor wafer to form a bonded structure; splitting the bonded structure along the defect layer; depositing a layer of indium tin oxide on the germanium layer; completing the IR sensor.
摘要翻译：制造用于CMOS成像器的锗红外传感器的方法包括制备施主晶片，其包括：离子注入到硅晶片中以形成P +硅层; 在P +硅层上生长外延锗层，形成硅 - 锗界面; 循环退火; 以及将氢离子注入至少与P +硅层一样深的深度以形成缺陷层; 制备处理晶片，包括：在硅衬底上制造CMOS集成电路; 沉积难熔金属层; 处理供体晶片的表面和用于结合的处理晶片; 结合处理晶片和施主晶片以形成结合结构; 沿着缺陷层分离粘结结构; 在锗层上沉积一层氧化铟锡; 完成IR传感器。

97. 发明申请

US20060172475A1 Ultrathin SOI transistor and method of making the same 失效
标题翻译：超薄SOI晶体管及其制作方法
公开(公告)号：US20060172475A1
公开(公告)日：2006-08-03
申请号：US11050495
申请日：2005-02-01
申请人： Sheng Hsu , Jong-Jan Lee
发明人： Sheng Hsu , Jong-Jan Lee
IPC分类号： H01L21/336 , H01L21/84
CPC分类号： H01L29/66772 , Y10S438/926
摘要： A method of fabricating an ultrathin SOI memory transistor includes preparing a substrate, including forming an ultrathin SOI layer of the substrate; adjusting the threshold voltage of the SOI layer; depositing a layer of silicon oxide on the SOI layer; patterning and etching the silicon oxide layer to form a sacrificial oxide gate in a gate region; depositing a layer of silicon nitride and forming the silicon nitride into a silicon nitride sidewall for the sacrificial oxide gate; depositing and smoothing a layer of amorphous silicon; selectively etching the sacrificial gate oxide; growing a layer of oxide in the gate region; depositing and smoothing a second layer of amorphous silicon; patterning and etching the second layer of amorphous silicon; implanting ion to form a source region and a drain region; annealing the structure; and depositing a layer of passivation oxide.
摘要翻译：制造超薄SOI存储晶体管的方法包括：制备衬底，包括形成衬底的超薄SOI层; 调整SOI层的阈值电压; 在SOI层上沉积一层氧化硅; 图案化和蚀刻氧化硅层以在栅极区域中形成牺牲氧化物栅极; 沉积氮化硅层并将氮化硅形成用于牺牲氧化物栅极的氮化硅侧壁; 沉积和平滑一层非晶硅; 选择性地蚀刻牺牲栅极氧化物; 在栅极区生长一层氧化物; 沉积和平滑第二层非晶硅; 图案化和蚀刻第二层非晶硅; 注入离子以形成源区和漏区; 退火结构; 并沉积一层钝化氧化物。

98. 发明申请

US20060038242A1 Semiconductive metal oxide thin film ferroelectric memory transistor 有权
标题翻译：半导体金属氧化物薄膜铁电存储晶体管
公开(公告)号：US20060038242A1
公开(公告)日：2006-02-23
申请号：US10922712
申请日：2004-08-20
申请人： Sheng Hsu , Tingkai Li , Jong-Jan Lee
发明人： Sheng Hsu , Tingkai Li , Jong-Jan Lee
IPC分类号： H01L29/94 , H01L29/76
CPC分类号： H01L29/7869 , H01L29/516 , H01L29/66545 , H01L29/66553 , H01L29/78621
摘要： The present invention discloses a novel transistor structure employing semiconductive metal oxide as the transistor conductive channel. By replacing the silicon conductive channel with a semiconductive metal oxide channel, the transistors can achieve simpler fabrication process and could realize 3D structure to increase circuit density. The disclosed semiconductive metal oxide transistor can have great potential in ferroelectric non volatile memory device with the further advantages of good interfacial properties with the ferroelectric materials, possible lattice matching with the ferroelectric layer, reducing or eliminating the oxygen diffusion problem to improve the reliability of the ferroelectric memory transistor. The semiconductive metal oxide film is preferably a metal oxide exhibiting semiconducting properties at the transistor operating conditions, for example, In2O3 or RuO2. The present invention ferroelectric transistor can be a metal-ferroelectric-semiconductive metal oxide FET having a gate stack of a top metal electrode disposed on a ferroelectric layer disposed on a semiconductive metal oxide channel on a substrate. Using additional layer of bottom electrode and gate dielectric, the present invention ferroelectric transistor can also be a metal-ferroelectric-metal (optional)-gate dielectric (optional)-semiconductive metal oxide FET.
摘要翻译：本发明公开了一种采用半导体金属氧化物作为晶体管导电通道的新型晶体管结构。通过用半导体金属氧化物沟道代替硅导电通道，晶体管可以实现更简单的制造工艺，并且可以实现3D结构以增加电路密度。所公开的半导体金属氧化物晶体管可以在铁电非易失性存储器件中具有很大的潜力，具有与铁电材料良好的界面性质，与铁电层的可能的晶格匹配，减少或消除氧扩散问题以提高可靠性的另外的优点铁电存储晶体管。半导体金属氧化物膜优选是在晶体管工作条件下表现出半导体性质的金属氧化物，例如在二氧化铈或RuO 2 。本发明的铁电晶体管可以是金属铁电半导体金属氧化物FET，其具有设置在设置在基板上的半导体金属氧化物沟道上的铁电层上的顶部金属电极的栅极堆叠。使用附加的底部电极和栅极电介质层，本发明的铁电晶体管也可以是金属 - 铁电 - 金属（可选） - 门电介质（可选） - 导电金属氧化物FET。

99. 发明申请

US20050070115A1 Method of making relaxed silicon-germanium on insulator via layer transfer with stress reduction 失效
标题翻译：通过层压转移在绝缘体上制备松弛硅锗的方法
公开(公告)号：US20050070115A1
公开(公告)日：2005-03-31
申请号：US10677005
申请日：2003-09-30
申请人： Jer-Shen Maa , Jong-Jan Lee , Douglas Tweet , Sheng Hsu
发明人： Jer-Shen Maa , Jong-Jan Lee , Douglas Tweet , Sheng Hsu
IPC分类号： H01L21/20 , H01L21/302 , H01L21/461 , H01L21/762
CPC分类号： H01L21/76254
摘要： A method of forming a silicon-germanium layer on an insulator includes depositing a layer of silicon-germanium on a silicon substrate to form a silicon/silicon-germanium portion; implanting hydrogen ions into the silicon substrate between about 500 Å to 1 μm below a silicon-germanium/silicon interface; bonding the silicon/silicon-germanium portion to an insulator substrate to form a couplet; thermally annealing the couplet in a first thermal annealing step to split the couplet; patterning and etching the silicon-germanium-on-insulator portion to remove portions of the silicon and SiGe layers; etching the silicon-germanium-on-insulator portion to remove the remaining silicon layer; thermally annealing the silicon-germanium-on-insulator portion in a second annealing step to relaxed the SiGe layer; and depositing a layer of strained silicon about the SiGe layer.
摘要翻译：在绝缘体上形成硅 - 锗层的方法包括在硅衬底上沉积硅 - 锗层以形成硅/硅 - 锗部分; 在硅 - 锗/硅界面之下的约500埃至1微米处将氢离子注入到硅衬底中; 将硅/硅锗部分接合到绝缘体基板上以形成对联体; 在第一热退火步骤中对联接件进行热退火以分离联接件; 图案化和蚀刻绝缘体上硅部分以去除部分硅和SiGe层; 蚀刻绝缘体上硅部分以除去剩余的硅层; 在第二退火步骤中对绝缘体上硅部分进行热退火以松弛SiGe层; 以及在SiGe层周围沉积一层应变硅。

100. 发明授权

US09537192B2 Battery with low temperature molten salt (LTMS) cathode 有权
标题翻译：电池与低温熔盐（LTMS）阴极
公开(公告)号：US09537192B2
公开(公告)日：2017-01-03
申请号：US13564015
申请日：2012-08-01
申请人： Yuhao Lu , Sean Andrew Vail , Gregory M. Stecker , Jong-Jan Lee
发明人： Yuhao Lu , Sean Andrew Vail , Gregory M. Stecker , Jong-Jan Lee
IPC分类号： H01M12/08 , H01M2/40 , H01M4/58 , H01M10/39 , H01M8/04276 , H01M8/04
CPC分类号： H01M12/08 , H01M2/40 , H01M4/58 , H01M8/04276 , H01M10/399 , Y02E60/128 , Y02E60/50
摘要： A battery is provided with an associated method for transporting metal-ions in the battery using a low temperature molten salt (LTMS). The battery comprises an anode, a cathode formed from a LTMS having a liquid phase at a temperature of less than 150° C., a current collector submerged in the LTMS, and a metal-ion permeable separator interposed between the LTMS and the anode. The method transports metal-ions from the separator to the current collector in response to the LTMS acting simultaneously as a cathode and an electrolyte. More explicitly, metal-ions are transported from the separator to the current collector by creating a liquid flow of LTMS interacting with the current collector and separator.
摘要翻译：电池具有使用低温熔融盐（LTMS）在电池中输送金属离子的相关方法。电池包括阳极，由LTMS形成的阴极，其温度低于150℃时具有液相，浸没在LTMS中的集电体以及介于LTMS和阳极之间的金属离子可渗透隔板。响应于同时作为阴极和电解质的LTMS，该方法将金属离子从分离器输送到集电器。更明确地说，通过产生与集电器和分离器相互作用的LTMS的液体流，将金属离子从分离器输送到集电器。

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