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91. 发明申请

US20060068099A1 Grading PrxCa1-xMnO3 thin films by metalorganic chemical vapor deposition 审中-公开
标题翻译：通过金属有机化学气相沉积法分级PrxCa1-xMnO3薄膜
公开(公告)号：US20060068099A1
公开(公告)日：2006-03-30
申请号：US10957304
申请日：2004-09-30
申请人： Tingkai Li , Lawrence Charneski , Wei-Wei Zhuang , David Evans , Sheng Hsu
发明人： Tingkai Li , Lawrence Charneski , Wei-Wei Zhuang , David Evans , Sheng Hsu
IPC分类号： C23C16/00
CPC分类号： C23C16/40 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1616
摘要： The present invention discloses a method to achieve grading PCMO thin film for use in RRAM memory devices since the contents of Ca, Mn and Pr in a PCMO film can have great influence on its switching property. By choosing precursors for Pr, Ca and Mn having different deposition rate behaviors with respect to deposition temperature or vaporizer temperature, PCMO thin film of grading Pr, Ca or Mn distribution can be achieved by varying that process condition during deposition. The present invention can also be broadly applied to the fabrication of any multicomponent grading thin film process by varying any of the deposition parameters after preparing multiple precursors to have different deposition rate behaviors with respect to that particular process parameter. The present invention starts with a proper selection of precursors in which the selected precursors have different deposition rates with respect to at least one deposition condition such as deposition temperature or vaporizer temperature. The precursors can then be arranged in different delivery systems, or can be pre-mixed in a proper ratio for use in a delivery system, or in any other combinations such as a mixture of two or three liquid precursors using a direct liquid injection and a separate gaseous precursor delivery system for gaseous process gas. Then by varying the appropriate deposition condition, a grading thin film can be achieved.
摘要翻译：本发明公开了一种用于RRAM存储器件中的PCMO薄膜分级的方法，因为PCMO薄膜中Ca，Mn和Pr的含量对其开关性能有很大的影响。通过选择相对于沉积温度或蒸发器温度具有不同沉积速率行为的Pr，Ca和Mn的前体，可以通过在沉积期间改变该工艺条件来实现分级Pr，Ca或Mn分布的PCMO薄膜。本发明还可以广泛地应用于任何多组分分级薄膜工艺的制造，其通过在制备多种前体之后改变任何沉积参数以相对于该特定工艺参数具有不同的沉积速率行为。本发明开始于适当选择前体，其中所选择的前体相对于至少一个沉积条件例如沉积温度或蒸发器温度具有不同的沉积速率。然后可将前体布置在不同的递送系统中，或者可以以适当的比例预先混合以用于递送系统，或者以任何其它组合例如使用直接液体注射的两种或三种液体前体的混合物用于气态工艺气体的单独的气态前体输送系统。然后通过改变适当的沉积条件，可以实现分级薄膜。

92. 发明申请

US20060052313A1 Selective dipeptide inhibitors of kallikrein 有权
标题翻译：激肽释放酶的选择性二肽抑制剂
公开(公告)号：US20060052313A1
公开(公告)日：2006-03-09
申请号：US10506535
申请日：2003-03-04
申请人： David Evans
发明人： David Evans
IPC分类号： A61K38/04 , C07K5/04 , C07D211/56
CPC分类号： C07K5/0606 , A61K38/00 , C07K5/06034 , C07K5/06078
摘要： Compounds of general formula 1, or a pharmaceutically acceptable salt thereof, wherein R1 is selected from H, lower alkyl, R4—CO, R4—O2CCH2, R5—OCO and R5—SO2; R2 is selected from lower alkyl, cycloalkyl optionally substituted with an alkyl or alkyloxy group, (C5-C12)cycloalkylalkyl optionally substituted with an alkyl or alkyloxy group, aralkyl optionally substituted with up to three groups chosen from F, Cl, Br, I, OH, lower alkyl, O-(lower alkyl), O-benzyl, NH2, NO2, NH-acyl, CN and CF3, and aralkyloxymethyl optionally substituted with up to three groups chosen from F, Cl, Br, OH, lower alkyl and O-(lower alkyl); or R1 and R2 together are an o-xylylene group optionally substituted on the aromatic ring with a group selected from F, Cl, Br, OH, lower alkyl and O-(lower alkyl); R3 is selected from H, OH and O-lower alkyl; R4 is selected from H, lower alkyl and phenyl; and R5 is selected from lower alkyl, phenyl and benzyl. The compounds are useful as pharmaceutical compositions.
摘要翻译：通式1的化合物或其药学上可接受的盐，

93. 发明申请

US20060026054A1 Method, apparatus, and program for implementing an automation computing evaluation scale to generate recommendations 审中-公开
标题翻译：用于实现自动化计算评估量表以产生建议的方法，装置和程序
公开(公告)号：US20060026054A1
公开(公告)日：2006-02-02
申请号：US10900959
申请日：2004-07-28
申请人： Miles Barel , Sandra Carter , James Crosskey , Leslie Ernest , David Evans , Lori Ford , Ronald Liles , Dwight Spence , Albert Swett
发明人： Miles Barel , Sandra Carter , James Crosskey , Leslie Ernest , David Evans , Lori Ford , Ronald Liles , Dwight Spence , Albert Swett
IPC分类号： G06Q90/00
CPC分类号： G06Q30/00 , G06Q10/06375 , G06Q10/0639 , G06Q30/0201 , G06Q30/0203
摘要： An automation assessment tool is provided that defines autonomic technology, processes, organization, and skill sets that apply to autonomic computing. The automation assessment tool provides educational material about autonomic computing and a scale of maturity levels, which is used to assess on-demand preparedness. The automation assessment tool presents a survey and collects answers to the survey questions. The automation assessment tool then determines solutions and recommendations to achieve a target level of on-demand preparedness.
摘要翻译：提供了自动化评估工具，该工具定义了适用于自主计算的自主技术，流程，组织和技能集。自动化评估工具提供有关自主计算的教育材料和成熟度级别，用于评估按需准备。自动化评估工具提供调查问卷并收集调查问题的答案。然后，自动化评估工具确定解决方案和建议，以达到目标水平的按需准备。

94. 发明申请

US20050282399A1 Electroformed metallization 失效
标题翻译：电铸金属化
公开(公告)号：US20050282399A1
公开(公告)日：2005-12-22
申请号：US10871938
申请日：2004-06-17
申请人： David Evans , John Hartzell
发明人： David Evans , John Hartzell
IPC分类号： C23C18/16 , C23C18/54 , C25D1/04 , C25D5/02 , C25D5/54 , G02F1/13 , H01L21/288 , H01L21/768 , H01J1/02 , H01L21/31 , H01L21/44 , H01L21/469
CPC分类号： H01L21/288 , C23C18/1605 , C23C18/165 , C23C18/1657 , C25D1/003 , C25D5/022 , C25D5/50 , H01L21/2885 , H01L21/76885
摘要： A method is provided for electroforming metal integrated circuit structures. The method comprises: forming an opening such as a via or line through an interlevel insulator, exposing a substrate surface; forming a base layer overlying the interlevel insulator and substrate surface; forming a strike layer overlying the base layer; forming a top layer overlying the strike layer; selectively etching to remove the top layer overlying the substrate surface, exposing a strike layer surface; and, electroforming a metal structure overlying the strike layer surface. The electroformed metal structure is deposited using an electroplating or electroless deposition process. Typically, the metal is Cu, Au, Ir, Ru, Rh, Pd, Os, Pt, or Ag. The base, strike, and top layers can be deposited using physical vapor deposition (PVD), evaporation, reactive sputtering, or metal organic chemical vapor deposition (MOCVD).
摘要翻译：提供了一种电铸金属集成电路结构的方法。该方法包括：通过层间绝缘体形成诸如通孔或线的开口，暴露衬底表面; 形成覆盖层间绝缘体和衬底表面的基层; 形成覆盖基层的冲击层; 形成覆盖所述冲击层的顶层; 选择性蚀刻以去除覆盖在衬底表面上的顶层，暴露出一层击打层表面; 并且电铸在覆盖着撞击层表面的金属结构。使用电镀或无电沉积工艺沉积电铸金属结构。通常，金属是Cu，Au，Ir，Ru，Rh，Pd，Os，Pt或Ag。可以使用物理气相沉积（PVD），蒸发，反应溅射或金属有机化学气相沉积（MOCVD）来沉积基底，打击和顶层。

95. 发明申请

US20050266686A1 Method of substrate surface treatment for RRAM thin film deposition 有权
标题翻译： RRAM薄膜沉积的基板表面处理方法
公开(公告)号：US20050266686A1
公开(公告)日：2005-12-01
申请号：US10855088
申请日：2004-05-27
申请人： Wei-Wei Zhuang , Tingkai Li , Wei Pan , David Evans , Sheng Hsu
发明人： Wei-Wei Zhuang , Tingkai Li , Wei Pan , David Evans , Sheng Hsu
IPC分类号： C23C18/12 , C30B23/02 , C30B29/24 , H01L21/44 , H01L45/00
CPC分类号： C23C18/1216 , C23C18/1225 , C23C18/1241 , C23C18/1283 , C30B23/02 , C30B29/24 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/147 , H01L45/1608
摘要： A method of fabricating a CMR thin film for use in a semiconductor device includes preparing a CMR precursor in the form of a metal acetate based acetic acid solution; preparing a wafer; placing a wafer in a spin-coating chamber; spin-coating and heating the wafer according to the following: injecting the CMR precursor into a spin-coating chamber and onto the surface of the wafer in the spin-coating chamber; accelerating the wafer to a spin speed of between about 1500 RPM to 3000 RPM for about 30 seconds; baking the wafer at a temperature of about 180° C. for about one minute; ramping the temperature to about 230° C.; baking the wafer for about one minute at the ramped temperature; annealing the wafer at about 500° C. for about five minutes; repeating said spin-coating and heating steps at least three times; post-annealing the wafer at between about 500° C. to 600° C. for between about one to six hours in dry, clean air; and completing the semiconductor device.
摘要翻译：制造用于半导体器件的CMR薄膜的方法包括制备基于金属乙酸酯的乙酸溶液形式的CMR前体; 准备晶圆; 将晶片放置在旋涂室中; 根据以下步骤旋涂和加热晶片：将CMR前体注入旋涂室并在旋涂室中的晶片表面上; 将晶片加速至约1500RPM至3000RPM之间的旋转速度约30秒; 在约180℃的温度下烘烤晶片约1分钟; 将温度升高至约230℃; 在升温下烘烤晶片约1分钟; 在约500℃退火晶片约5分钟; 重复所述旋涂和加热步骤至少三次; 在约500℃至600℃之间将晶片退火约1至6小时，在干燥，干净的空气中进行退火; 并完成半导体器件。

96. 发明申请

US20050110471A1 Single inductor dual output buck converter with frequency and time varying offset control 有权
标题翻译：单电感双输出降压转换器，具有频率和时变偏移控制
公开(公告)号：US20050110471A1
公开(公告)日：2005-05-26
申请号：US10722270
申请日：2003-11-25
申请人： Valerian Mayega , Jun Chen , James Krug , David Evans
发明人： Valerian Mayega , Jun Chen , James Krug , David Evans
IPC分类号： G05F1/577 , H02M3/155 , H02M3/156
CPC分类号： H02M3/156 , H02M3/155
摘要： A single-inductor dual-output buck converter and control method that facilitates power conversion by converting a single DC power source/supply into two separate DC outputs, each of which can be configured to provide a selected/desired voltage by selection of respective duty cycles. The topology of the inverter includes a pair of diodes or switches that can selectively re-circulate inductor current. The converter is generally operated at a fixed frequency with four stages of operation. A first and third stage of operation provide power to a first and second output, respectively. A second and fourth stage of operation re-circulate inductor current and can partially recharge a battery type power source. The power output for each stage (voltage and current) can be selectively obtained by computing and employing appropriate time periods for the stages of operation that correspond to appropriate duty cycles.
摘要翻译：单电感双输出降压转换器和控制方法，通过将单个DC电源/电源转换为两个独立的直流输出来促进功率转换，每个直流输出可以被配置为通过选择相应的占空比来提供选定/期望的电压。逆变器的拓扑结构包括一对二极管或开关，可以选择性地重新循环电感电流。转换器通常以固定频率工作，具有四个操作阶段。第一和第三操作阶段分别为第一和第二输出提供电力。第二和第四阶段的操作重新循环电感电流，并且可以部分地为电池型电源充电。可以通过对与适当的占空比相对应的操作阶段计算和采用适当的时间周期来选择性地获得每个级的电力输出（电压和电流）。

97. 发明申请

US20050048246A1 Titanium foil ply replacement in layup of composite skin 有权
标题翻译：复合皮层复合皮层替代钛箔层
公开(公告)号：US20050048246A1
公开(公告)日：2005-03-03
申请号：US10650231
申请日：2003-08-28
申请人： Williard Westre , David Evans , Edward Li , Marc Piehl , Eric Sager
发明人： Williard Westre , David Evans , Edward Li , Marc Piehl , Eric Sager
IPC分类号： B32B3/14 , B32B15/08 , B32B3/00
CPC分类号： B32B15/08 , B32B3/14 , B32B7/12 , B32B38/08 , B32B2260/021 , B32B2260/046 , Y02T50/43 , Y10T156/1089 , Y10T156/109 , Y10T156/1092 , Y10T156/1093 , Y10T428/1234 , Y10T428/12444 , Y10T428/19 , Y10T428/192 , Y10T428/197 , Y10T428/24752
摘要： Laminate structures and methods for forming same are disclosed. In one embodiment, a laminate structure includes a metal-polymer composite lamina. The metal-polymer composite lamina has a first face and a second face spaced apart, and extends to a terminal edge. The lamina includes a ply of fiber-reinforced polymer that extends between the first face and the second face and has an interior edge. The interior edge defines at least one cutout. A ply of metal foil extends between the first face and the second face substantially from the interior edge filling the at least one cutout.
摘要翻译：公开了层合结构及其形成方法。在一个实施方案中，层压结构包括金属 - 聚合物复合层。金属 - 聚合物复合薄片具有间隔开的第一表面和第二表面，并且延伸到末端边缘。薄片包括在第一面和第二面之间延伸并具有内部边缘的纤维增强聚合物层。内部边缘限定至少一个切口。一层金属箔基本上从填充至少一个切口的内边缘在第一面和第二面之间延伸。

98. 发明申请

US20050003663A1 Integrated circuit having barrier metal surface treatment prior to Cu deposition 审中-公开
标题翻译：在Cu沉积之前具有阻挡金属表面处理的集成电路
公开(公告)号：US20050003663A1
公开(公告)日：2005-01-06
申请号：US10903610
申请日：2004-07-29
申请人： Wei Pan , Jer-Shen Maa , David Evans , Sheng Hsu
发明人： Wei Pan , Jer-Shen Maa , David Evans , Sheng Hsu
IPC分类号： H01L21/3205 , C23C16/02 , C23C16/18 , H01L21/28 , H01L21/285 , H01L21/768 , H01L21/4763 , H01L21/44
CPC分类号： H01L21/76843 , C23C16/0209 , C23C16/18 , H01L21/28556 , H01L21/76864 , H01L21/76876
摘要： A rapid thermal process (RTP) provides steps wherein silicon wafers that are pre-coated with barrier metal films by either in-situ or ex-situ CVD or physical vapor deposition (PVD) are pre-treated, prior to deposition of a Cu film thereon, in a temperature range of between 250 and 550 degrees Celsius in a non-reactive gas such as hHydrogen gas (H2), argon (Ar), or helium (He), or in an ambient vacuum. The chamber pressure typically is between 0.1 mTorr and 20 Torr, and the RTP time typically is between 30 to 100 seconds. Performing this rapid thermal process before deposition of the Cu film results in a thin, shiny, densely nucleated, and adhesive Cu film deposited on a variety of barrier metal surfaces. The pre-treatment process eliminates variations in the deposited Cu film caused by Cu precursors and is insensitive to variation in precursor composition, volatility, and other precursor variables. Accordingly, the process disclosed herein is an enabling technology for the use of metal organic CVD (MOCVD) Cu in IC fabrication.
摘要翻译：快速热处理（RTP）提供了在沉积Cu膜之前预处理通过原位或原位CVD或物理气相沉积（PVD）预涂覆有阻挡金属膜的硅晶片的步骤在非反应性气体例如氢气（H 2），氩气（Ar）或氦气（He）中，或在环境真空中，在250-550℃的温度范围内。室压力通常在0.1mTorr和20Torr之间，并且RTP时间通常在30至100秒之间。在沉积Cu膜之前进行这种快速热处理会导致沉积在各种阻挡金属表面上的薄而有光泽，致密成核和粘附的Cu膜。预处理过程消除了由Cu前体引起的沉积的Cu膜的变化，并且对前体组成，挥发性和其它前体变量的变化不敏感。因此，本文公开的方法是在IC制造中使用金属有机CVD（MOCVD）Cu的使能技术。

99. 发明授权

US06410889B1 Method and apparatus for reducing contamination in a wafer loadlock of a semiconductor wafer processing system 有权
公开(公告)号：US06410889B1
公开(公告)日：2002-06-25
申请号：US09961152
申请日：2001-09-21
申请人： Matthew F. Davis , Douglas R. McAllister , David Evans
发明人： Matthew F. Davis , Douglas R. McAllister , David Evans
IPC分类号： F27D1100
摘要： A method and apparatus for heating a loadlock to inhibit the formation of contaminants within the loadlock. At least one heater is attached to the walls of the loadlock to boil contaminants from the surfaces within the loadlock. These desorbed contaminants are exhausted from the loadlock by a vacuum pump. Alternatively, a purge gas can be supplied to the loadlock while the loadlock is being heated. The flow of purge gas flushes the desorbed contaminants from the loadlock.

100. 发明授权

US06323463B1 Method and apparatus for reducing contamination in a wafer loadlock of a semiconductor wafer processing system 失效
标题翻译：用于减少半导体晶片处理系统的晶片负载锁中的污染的方法和装置
公开(公告)号：US06323463B1
公开(公告)日：2001-11-27
申请号：US09539158
申请日：2000-03-29
申请人： Matthew F. Davis , Douglas R. McAllister , David Evans
发明人： Matthew F. Davis , Douglas R. McAllister , David Evans
IPC分类号： F27D1100
CPC分类号： C23C16/4408 , C23C14/566 , H01L21/67028
摘要： A method and apparatus for heating a loadlock to inhibit the formation of contaminants within the loadlock. At least one heater is attached to the walls of the loadlock to boil contaminants from the surfaces within the loadlock. These desorbed contaminants are exhausted from the loadlock by a vacuum pump. Alternatively, a purge gas can be supplied to the loadlock while the loadlock is being heated. The flow of purge gas flushes the desorbed contaminants from the loadlock.
摘要翻译：一种用于加热负载锁以抑制负载锁中的污染物形成的方法和装置。至少一个加热器连接到负载锁的壁上以从负载锁中的表面沸腾污染物。这些脱附的污染物通过真空泵从装载锁中排出。或者，在负载锁被加热的同时，可以向负载锁提供净化气体。净化气体的流动会从装载锁中冲洗解吸的污染物。

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