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    • 92. 发明授权
    • Nanotube-on-gate FET structures and applications
    • 纳米管栅极FET结构和应用
    • US07294877B2
    • 2007-11-13
    • US10811373
    • 2004-03-26
    • Thomas RueckesBrent M. SegalBernard VogeliDarren K. BrockVenkatachalam C. JaiprakashClaude L. Bertin
    • Thomas RueckesBrent M. SegalBernard VogeliDarren K. BrockVenkatachalam C. JaiprakashClaude L. Bertin
    • H01L51/30
    • H01L51/055B82Y10/00G11C13/025G11C16/0416G11C23/00G11C2213/17H01L29/0665H01L29/0673H01L29/42324H01L51/0048H01L51/0052
    • Nanotube on gate FET structures and applications of such, including n2 crossbars requiring only 2n control lines. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and a channel region of a second semiconductor type of material disposed between the source and drain region. A gate structure is made of at least one of semiconductive or conductive material and is disposed over an insulator over the channel region. A control gate is made of at least one of semiconductive or conductive material. An electromechanically-deflectable nanotube switching element is in fixed contact with one of the gate structure and the control gate structure and is not in fixed contact with the other of the gate structure and the control gate structure. The device has a network of inherent capacitances, including an inherent capacitance of an undeflected nanotube switching element in relation to the gate structure. The network is such that the nanotube switching element is deflectable into contact with the other of the gate structure and the control gate structure in response to signals being applied to the control gate and one of the source region and drain region. Certain embodiments of the device have an area of about 4 F2. Other embodiments include a release line is positioned in spaced relation to the nanotube switching element, and having a horizontal orientation that is parallel to the orientation of the source and drain diffusions. Other embodiments provide an n2 crossbar array having n2 non-volatile transistor devices, but require only 2n control lines.
    • 纳米管栅极FET结构及其应用,包括只需要2n条控制线的n 2条交叉。 非挥发性晶体管器件包括第一半导体类型的材料的源极区域和漏极区域以及设置在源极和漏极区域之间的第二半导体类型的材料的沟道区域。 栅极结构由半导体或导电材料中的至少一种制成,并且设置在沟道区域上方的绝缘体上。 控制门由半导体或导电材料中的至少一种制成。 机电偏转型纳米管开关元件与栅极结构和控制栅极结构中的一个固定接触,并且不与栅极结构和控制栅极结构中的另一个固定接触。 该器件具有固有电容的网络,包括相对于栅极结构的未折射的纳米管开关元件的固有电容。 网络使得纳米管开关元件响应于施加到控制栅极和源极区域和漏极区域之一的信号而偏转成与栅极结构和控制栅极结构中的另一个接触。 该装置的某些实施例具有约4F 2的面积。 其他实施例包括释放线与纳米管开关元件间隔开定位,并且具有平行于源极和漏极扩散的取向的水平取向。 其他实施例提供了具有n 2个非易失性晶体管器件的n≥2的交叉开关阵列,但是仅需要2n个控制线。
    • 94. 发明授权
    • Nanotube-based switching elements
    • 基于纳米管的开关元件
    • US07115960B2
    • 2006-10-03
    • US10917794
    • 2004-08-13
    • Claude L. BertinThomas RueckesBrent M. Segal
    • Claude L. BertinThomas RueckesBrent M. Segal
    • H01L29/84
    • H01L29/0665B82Y10/00G11C13/025G11C23/00H01H1/0094H01H2001/0005H01L27/28H01L29/0673H01L29/73H01L29/78H01L51/0048H01L51/0508Y10S977/708Y10S977/762
    • Nanotube-based switching elements and logic circuits. Under one embodiment of the invention, a switching element includes an input node, an output node, a nanotube channel element having at least one electrically conductive nanotube, and a control electrode. The control electrode is disposed in relation to the nanotube channel element to controllably form an electrically conductive channel between the input node and the output node. The channel at least includes said nanotube channel element. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. Under another embodiment of the invention, the control electrode is arranged in relation to the nanotube channel element to form said conductive channel by causing electromechanical deflection of said nanotube channel element. Under another embodiment of the invention, the output node includes an isolation structure disposed in relation to the nanotube channel element so that channel formation is substantially invariant from the state of the output node. Under another embodiment of the invention, the isolation structure includes electrodes disposed on opposite sides of the nanotube channel element and said electrodes produce substantially the same electric field. Under another embodiment of the invention, a Boolean logic circuit includes at least one input terminal and an output terminal, and a network of nanotube switching elements electrically disposed between said at least one input terminal and said output terminal. The network of nanotube switching elements effectuates a Boolean function transformation of Boolean signals on said at least one input terminal. The Boolean function transformation includes a Boolean inversion within the function, such as a NOT or NOR function.
    • 基于纳米管的开关元件和逻辑电路。 在本发明的一个实施例中,开关元件包括输入节点,输出节点,具有至少一个导电纳米管的纳米管通道元件和控制电极。 控制电极相对于纳米管通道元件设置,以在输入节点和输出节点之间可控制地形成导电通道。 通道至少包括所述纳米管通道元件。 输出节点的构造和布置使得通道形成基本上不受输出节点的电气状态的影响。 在本发明的另一实施例中,控制电极相对于纳米管通道元件布置,以通过引起所述纳米管通道元件的机电偏转而形成所述导电通道。 在本发明的另一个实施例中,输出节点包括相对于纳米管通道元件设置的隔离结构,使得通道形成从输出节点的状态基本上是不变的。 在本发明的另一个实施例中,隔离结构包括设置在纳米管通道元件的相对侧上的电极,所述电极产生基本上相同的电场。 在本发明的另一个实施例中,布尔逻辑电路包括至少一个输入端子和输出端子,以及电气地布置在所述至少一个输入端子和所述输出端子之间的纳米管开关元件网络。 纳米管切换元件的网络在所述至少一个输入端上实现布尔信号的布尔函数变换。 布尔函数变换包括函数内的布尔反转,如NOT或NOR函数。
    • 95. 发明授权
    • Non-volatile RAM cell and array using nanotube switch position for information state
    • 非易失性RAM单元和阵列使用纳米管开关位置进行信息状态
    • US07113426B2
    • 2006-09-26
    • US10810963
    • 2004-03-26
    • Thomas RueckesBrent M. SegalBernard VogeliDarren BrockVenkatachalam C. JaiprakashClaude L. Bertin
    • Thomas RueckesBrent M. SegalBernard VogeliDarren BrockVenkatachalam C. JaiprakashClaude L. Bertin
    • G11C11/34G11C11/00
    • G11C23/00B82Y10/00G11C13/025
    • Non-Volatile RAM Cell and Array using Nanotube Switch Position for Information State. A non-volatile memory array includes a plurality of memory cells, each cell receiving a bit line, word line, and release line. Each memory cell includes a cell selection transistor with first, second and third nodes. The first and second nodes are in respective electrical communication with the bit line and the word line. Each cell further includes an electromechanically deflectable switch, having a first, second and third node. The first node is in electrical communication with the release line, and a third node is in electrical communication with the third node of the cell selection transistor. The electromechanically deflectable switch includes a nanotube switching element physically positioned between the first and third nodes of the switch and in electrical communication with the second node of the switch. The second node of the switch is in communication with a reference signal. Each nanotube switching element is deflectable into contact with the third node of the switch in response to signals at the first and second node of the cell selection transistor and is releasable from such contact in response to a signal at the release line. In preferred embodiments, the cell selection transistor is a FET and the second node of the transistor is a gate of the FET.
    • 非易失性RAM单元和阵列使用纳米管切换位置信息状态。 非易失性存储器阵列包括多个存储器单元,每个单元接收位线,字线和释放线。 每个存储单元包括具有第一,第二和第三节点的单元选择晶体管。 第一和第二节点与位线和字线分别电气通信。 每个单元还包括具有第一,第二和第三节点的机电偏转开关。 第一节点与释放线电连通,第三节点与小区选择晶体管的第三节点电通信。 机电可偏转开关包括物理地位于开关的第一和第三节点之间并与开关的第二节点电通信的纳米管开关元件。 交换机的第二个节点与参考信号通信。 每个纳米管开关元件响应于电池选择晶体管的第一和第二节点处的信号而偏转成与开关的第三节点接触,并且响应于释放线处的信号而可从该接触件释放。 在优选实施例中,电池选择晶体管是FET,晶体管的第二节点是FET的栅极。