会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 91. 发明申请
    • ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING THE SAME
    • 有机发光二极管显示器及其制造方法
    • US20110297951A1
    • 2011-12-08
    • US13113279
    • 2011-05-23
    • Min-Chul SHINJong-Moo HUHBong-Ju KIMYun-Gyu LEE
    • Min-Chul SHINJong-Moo HUHBong-Ju KIMYun-Gyu LEE
    • H01L51/50H01L51/40
    • H01L51/56H01L27/1288H01L27/3248
    • An organic light emitting diode (OLED) display and a manufacturing method thereof, the OLED display includes: a substrate main body; a polycrystalline silicon layer pattern including a polycrystalline active layer formed on the substrate main body and a first capacitor electrode; a gate insulating layer pattern formed on the polycrystalline silicon layer pattern; a first conductive layer pattern including a gate electrode and a second capacitor electrode that are formed on the gate insulating layer pattern; an interlayer insulating layer pattern formed on the first conductive layer pattern; and a second conductive layer pattern including a source electrode, a drain electrode and a pixel electrode that are formed on the interlayer insulating layer pattern. The gate insulating layer pattern is patterned at a same time with any one of the polycrystalline silicon layer pattern and the first conductive layer pattern.
    • 一种有机发光二极管(OLED)显示器及其制造方法,所述OLED显示器包括:基板主体; 包括形成在所述基板主体上的多晶有源层和第一电容器电极的多晶硅层图案; 形成在所述多晶硅层图案上的栅极绝缘层图案; 形成在所述栅极绝缘层图案上的包括栅电极和第二电容电极的第一导电层图案; 形成在所述第一导电层图案上的层间绝缘层图案; 以及包括形成在层间绝缘层图案上的源电极,漏电极和像素电极的第二导电层图案。 栅极绝缘层图案与多晶硅层图案和第一导电层图案中的任何一个同时被图案化。
    • 98. 发明授权
    • Input circuit of semiconductor memory apparatus and controlling method thereof
    • 半导体存储装置的输入电路及其控制方法
    • US08031533B2
    • 2011-10-04
    • US12333143
    • 2008-12-11
    • Young Ju KimSu Jeong Sim
    • Young Ju KimSu Jeong Sim
    • G11C7/10
    • G11C8/06G11C7/1078G11C7/109
    • Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal.
    • 公开了一种半导体存储装置的输入电路。 输入电路包括第一缓冲器和第二缓冲器。 第一缓冲器具有与第一输入引脚连接的输入端子,用于接收用于通过划分整个存储区域来控制整个存储区域的多控制模式中使用的控制信号,以及根据控制的具有第一电平的输出端子 模式信号。 第二缓冲器具有与第二输入引脚连接的输入端子,用于接收在单个控制模式中使用的多个信号中的一个,用于控制整个存储区域而不划分整个存储区域,以及根据控制的具有第二电平的输出端子 模式信号。
    • 99. 发明授权
    • Thin film transistor substrate, method of manufacturing the same, and liquid crystal display panel having the same
    • 薄膜晶体管基板及其制造方法以及具有该薄膜晶体管基板的液晶显示面板
    • US08031285B2
    • 2011-10-04
    • US11860864
    • 2007-09-25
    • Bong Ju KimChun Gi You
    • Bong Ju KimChun Gi You
    • G02F1/136
    • G02F1/134363G02F1/136227H01L27/124H01L29/41733
    • This invention relates to a thin film transistor substrate, a method of manufacturing the same, and a liquid crystal display panel including the same. The thin film transistor substrate includes a substrate, gate lines disposed on the substrate and extending in one direction, common voltage lines disposed on the substrate and spaced apart from the gate lines, and a gate insulating film disposed on the gate lines and the common voltage lines, the gate insulating film having first contact holes exposing a part of each common voltage line. Common electrodes are disposed on the gate insulating film and are connected to the common voltage lines through the first contact holes. Data lines are disposed on the gate insulating film and extend in a direction crossing the gate lines and thin film transistors are disposed at crossings of the gate lines and the data lines. The thin film transistors are connected to the gate lines and the data lines and include source electrodes and drain electrodes. Pixel electrodes are connected to the thin film transistors.
    • 本发明涉及一种薄膜晶体管基板及其制造方法以及包括该薄膜晶体管基板的液晶显示面板。 薄膜晶体管基板包括基板,设置在基板上并沿一个方向延伸的栅极线,设置在基板上并与栅极线间隔开的公共电压线,以及设置在栅极线上的栅极绝缘膜和公共电压 线路,栅极绝缘膜具有暴露每个公共电压线的一部分的第一接触孔。 公共电极设置在栅极绝缘膜上,并通过第一接触孔连接到公共电压线。 数据线设置在栅极绝缘膜上并沿与栅极线交叉的方向延伸,并且薄膜晶体管设置在栅极线和数据线的交叉处。 薄膜晶体管连接到栅极线和数据线,并且包括源电极和漏电极。 像素电极连接到薄膜晶体管。