专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

91. 发明授权

US4933042A Method for packaging integrated circuit chips employing a polymer film overlay layer 失效
标题翻译：使用聚合物膜覆盖层封装集成电路芯片的方法
公开(公告)号：US4933042A
公开(公告)日：1990-06-12
申请号：US240367
申请日：1988-08-30
申请人： Charles W. Eichelberger , Robert J. Wojnarowski , Kenneth B. Welles, II
发明人： Charles W. Eichelberger , Robert J. Wojnarowski , Kenneth B. Welles, II
IPC分类号： H01L21/00 , H01L21/56 , H01L21/58 , H01L23/31 , H01L23/538
CPC分类号： H01L24/83 , H01L21/56 , H01L21/67121 , H01L23/3164 , H01L23/5389 , H01L24/75 , H01L2224/2919 , H01L2224/75315 , H01L2224/8319 , H01L2224/8385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0665 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , Y10T156/1092
摘要： A method and apparatus are provided for disposing a polymer film on an irregularly-shaped substrate at relatively high temperatures. In particular, the method and apparatus of the present invention provide a system for the packaging of very large scale intergrated circuit chips. The system of the present invention particularly solves problems associated with high temperature processing and problems associated with the highly irregular surfaces that result. Nonetheless, the resultant product is capable of being fashioned into circuit chip systems which are independently testable and which may be reconfigured after testing by removal of the polymer film itself.
摘要翻译：提供了一种用于在较高温度下将聚合物膜设置在不规则形状的基底上的方法和装置。特别地，本发明的方法和装置提供了一种用于包装非常大规模的集成电路芯片的系统。本发明的系统特别地解决了与高温处理相关的问题和与导致的高度不规则的表面有关的问题。然而，所得产品能够被制成可独立测试的电路芯片系统，并且可以在通过去除聚合物膜本身进行测试之后重新配置。

92. 发明授权

US4901136A Multi-chip interconnection package 失效
标题翻译：多芯片互连包
公开(公告)号：US4901136A
公开(公告)日：1990-02-13
申请号：US285363
申请日：1988-12-15
申请人： Constantine A. Neugebauer , Lionel M. Levinson , Homer H. Glascock, II , Charles W. Eichelberger , Robert J. Wojnarowski , Richard O. Carlson
发明人： Constantine A. Neugebauer , Lionel M. Levinson , Homer H. Glascock, II , Charles W. Eichelberger , Robert J. Wojnarowski , Richard O. Carlson
IPC分类号： H01L23/04 , H01L23/495 , H01L23/538 , H01L25/065
CPC分类号： H01L23/5383 , H01L23/04 , H01L23/49541 , H01L23/5389 , H01L25/0655 , H01L2924/0002 , H01L2924/01079
摘要： A package for interconnecting a plurality of integrated circuit chips into a functional unit comprising a multilayer substrate having ground and power conducting layers and a frame for holding the chips with their terminal pads on the side of the frame opposite the substrate. Power and ground terminal pads on the chips are coupled to the appropriate potentials via registering conductive feedthroughs passing through the frame and into the substrate into contact with appropriate power or conductive layers in the substrate. Signal pads on the chips are interconnected by means of a conductive layer which is located over the chips on the side of the frame opposite the substrate.
摘要翻译：一种用于将多个集成电路芯片互连到功能单元的封装，该功能单元包括具有接地和功率传导层的多层基板和用于将其端子焊盘保持在与基板相对的一侧的端子焊盘的框架。芯片上的电源和接地端子焊盘通过记录穿过框架并进入衬底的导电馈通件与基板中适当的电源或导电层接触而耦合到适当的电位。芯片上的信号焊盘通过位于与衬底相对的框架侧上的芯片上方的导电层相互连接。

93. 发明授权

US4878991A Simplified method for repair of high density interconnect circuits 失效
标题翻译：用于修复高密度互连电路的简化方法
公开(公告)号：US4878991A
公开(公告)日：1989-11-07
申请号：US283095
申请日：1988-12-12
申请人： Charles W. Eichelberger , Robert J. Wojnarowski
发明人： Charles W. Eichelberger , Robert J. Wojnarowski
IPC分类号： H01L21/48 , H01L21/60 , H01L23/538
CPC分类号： H01L24/98 , H01L21/485 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L2224/04105 , H01L2224/24137 , H01L2224/32225 , H01L2224/73267 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01075 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , Y10S156/919 , Y10T156/11
摘要： A simplified method of gaining access to, for the purpose of replacing, a defective integrated circuit chip situated in a high density interconnect (HDI) circuit (10) comprises heating the HDI circuit to a temperature at which the peel strength of an adhesive (16) bonding a polymer overlay layer (18) to the tops of integrated circuit chips (4, 6, and 8) positioned on a substrate (12) is reduced. The polymer overlay layer, which may comprise one or multiple layers, is then peeled from the chips. The adhesive is present in sufficient quantity to protect the chips. The adhesive is then dissolved by subjecting the substrate to different solvents of successively lower solubility for the adhesive. Metal divots (34) left on chip pads (36) are removed by selectively etching copper in the presence of ultrasonic agitation. The entire circuit is finally subjected to a high pressure spray to remove any particulate remaining on the chips, so that the defective chip may be readily replaced without damaging or contaminating the HDI circuit.
摘要翻译：为了更换位于高密度互连（HDI）电路（10）中的有缺陷的集成电路芯片的目的，获得访问的简化方法包括将HDI电路加热到粘合剂（16）的剥离强度的温度）将聚合物覆盖层（18）接合到位于基板（12）上的集成电路芯片（4,6和8）的顶部。然后可以包括一层或多层的聚合物覆盖层从芯片上剥离。粘合剂以足够的量存在以保护芯片。然后通过使基底对粘合剂的溶解度相继降低的不同溶剂进行溶解。通过在超声波搅拌的情况下选择性地蚀刻铜，去除留在芯片焊盘（36）上的金属色（34）。整个电路最终经受高压喷雾以除去残留在芯片上的任何颗粒，使得有缺陷的芯片可以容易地更换而不损坏或污染HDI电路。

94. 发明授权

US4835704A Adaptive lithography system to provide high density interconnect 失效
标题翻译：自适应光刻系统提供高密度互连
公开(公告)号：US4835704A
公开(公告)日：1989-05-30
申请号：US947461
申请日：1986-12-29
申请人： Charles W. Eichelberger , Robert J. Wojnarowski , Kenneth B. Welles, II
发明人： Charles W. Eichelberger , Robert J. Wojnarowski , Kenneth B. Welles, II
IPC分类号： G03F1/00 , G03F1/08 , G03F7/20 , H01L21/00 , H01L21/027 , H01L21/30 , H01L21/3213 , H01L21/60 , H01L21/768 , H01L21/82 , H01L23/538 , H05K3/00
CPC分类号： H01L24/25 , G03F7/704 , H01L21/6715 , H01L21/768 , H01L23/5389 , H01L24/24 , H01L24/75 , H01L24/76 , H01L2224/18 , H01L2224/75 , H01L2224/75753 , H01L2224/758 , H01L2224/759 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01074 , H01L2924/01075 , H01L2924/01082 , H01L2924/12042 , H01L2924/12043 , H01L2924/14 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , Y10S148/093 , Y10S430/146
摘要： An adaptive method and system are disclosed for providing high density interconnections of very large scale integrated circuits on a substrate. The procedure is performed in four basic steps: first an artwork representation for the interconnections of the integrated circuits is generated. This artwork representation is stored in a computer data base and assumes the integrated circuits to be at predetermined ideal locations and positions on the substrate. Second, using imaging, the actual positions of each integrated circuit on the substrate are determined. The actual positions of the integrated circuits are compared with their ideal positions to compute an offset and rotation for each integrated circuit on the substrate. Third, the computed offsets and rotations are then used to modify the artwork representation stored in the data base to account for the actual locations and positions of the integrated circuits on the substrate. Finally, the modified artwork representation is used to drive a direct writing laser lithography system that actually forms the high density interconnections of the integrated circuits on the substrate. The artwork representations are stored in computer data bases in vector form to minimize storage requirements. The laser beam produced by the lithography system is raster scanned on the substrate. Modulation of the laser beam is controlled by the real time conversion of the vector representation of the modified artwork to be a bit mapped representation. To assure accurate formations of the interconnects, a feedback alignment system is used to accurately position the laser beam throughout its raster scan.

95. 发明授权

US4646151A Television frame synchronizer with independently controllable input/output rates 失效
标题翻译：电视帧同步器具有可独立控制的输入/输出速率
公开(公告)号：US4646151A
公开(公告)日：1987-02-24
申请号：US697601
申请日：1985-02-01
申请人： Kenneth B. Welles, II , Robert J. Wojnarowski , Charles W. Eichelberger
发明人： Kenneth B. Welles, II , Robert J. Wojnarowski , Charles W. Eichelberger
IPC分类号： H04N5/073 , H04N5/04 , H04N9/64
CPC分类号： H04N5/0736
摘要： A frame synchronizer having broad applicability in television systems is particularly adapted for use in a chrominance time-compressed, luminance bandwidth reduced television system. The frame synchronizer, which separates the composite video signal into its component parts and thereby minimizes the dynamic range required to digitize the signal, demodulates the chrominance signal into its quadrature components and separates the luminance signal. The synchronization signal in the composite video signal generates slave distribution signals and slave horizontal and vertical addresses. The separated chrominance quadrature components and the luminance signal are digitized and, along with the slave distribution signals and the slave horizontal and vertical addresses, are temporarily stored in first-in, first-out memories which provide independent buffering and thereby accommodate a high degree of mismatch between master and slave timing. The chrominance and luminance data are accumulated in distribution registers and transferred to write registers which provide the data input to a frame buffer memory. Master distribution and master horizontal and vertical addresses are generated from a master synchronization signal along with write and read control signals. The data in the write register is read into the frame buffer memory at the slave horizontal and vertical addresses in response to the write control signal, and data in the frame buffer memory is read out from the master horizontal and vertical addresses in response to the read control signal, converted to analog signals, and combined to form a composite signal.
摘要翻译：在电视系统中具有广泛适用性的帧同步器特别适用于色度时间压缩，亮度带宽降低的电视系统。帧同步器将复合视频信号分离成其组成部分，从而使信号数字化所需的动态范围最小化，将色度信号解调为其正交分量并分离亮度信号。复合视频信号中的同步信号产生从属分配信号和从属水平和垂直地址。分离的色度正交分量和亮度信号被数字化，并且与从属分布信号和从属水平和垂直地址一起临时存储在提供独立缓冲的先进先出存储器中，从而适应高度主从时间不匹配。色度和亮度数据被累积在分配寄存器中，并被传送到向RAM缓冲存储器提供数据输入的写入寄存器。主分配和主水平和垂直地址由主同步信号以及写和读控制信号产生。写入寄存器中的数据响应于写入控制信号被读入到从属水平和垂直地址的帧缓冲存储器中，并且响应读取从主水平和垂直地址读出帧缓冲存储器中的数据控制信号，转换为模拟信号，并组合形成复合信号。

96. 发明授权

US4646135A System for allowing two television programs simultaneously to use the normal bandwidth for one program by chrominance time compression and luminance bandwidth reduction 失效
标题翻译：允许两个电视节目同时通过色度时间压缩和亮度带宽减少对一个节目使用正常带宽的系统
公开(公告)号：US4646135A
公开(公告)日：1987-02-24
申请号：US697535
申请日：1985-02-01
申请人： Charles W. Eichelberger , Robert J. Wojnarowski
发明人： Charles W. Eichelberger , Robert J. Wojnarowski
IPC分类号： H04N7/08 , H04N11/06 , H04N7/04
CPC分类号： H04N7/0806 , H04N11/06
摘要： A method and apparatus for bandwidth compression allows two television programs to simultaneously occupy the bandwidth normally allowed for one television program. The composite video signals from first and second program sources are separated into chrominance, luminance and synchronization component signals for each. The chrominance signals for each program source are compressed in time, and the sync pulse from one of the program sources is used to generate a narrow sync pulse. The luminance signal from the one program source modulates a carrier signal, and the luminance signal from the other program source modulates a subcarrier signal. The compressed chrominance signals for the first and second program sources are transmitted, with the narrow sync pulse, for alternate lines of each image frame for each program, respectively, during the inactive video time, and the luminance signals for both program sources are transmitted during the active video time for each line of each image frame for each program, respectively. At the receiver, the compressed chrominance and the luminance signals for both program sources are detected, and the compressed chrominance and the luminance signals for one or the other of the two program sources are selected. The selected chrominance signal is stored during the inactive video time in an analog delay line, the output of which is combined with the selected luminance signal to reconstruct a composite video signal for the selected program source during the active video time in the selected program.
摘要翻译：用于带宽压缩的方法和装置允许两个电视节目同时占据一个电视节目通常允许的带宽。来自第一和第二节目源的复合视频信号被分为色度，亮度和同步分量信号。每个节目源的色度信号在时间上被压缩，并且来自一个节目源的同步脉冲用于产生窄的同步脉冲。来自一个程序源的亮度信号调制载波信号，来自另一个程序源的亮度信号调制副载波信号。在非活动视频时间期间，用于第一和第二节目源的压缩色度信号分别用于具有窄同步脉冲，用于每个节目的每个图像帧的交替行，并且两个节目源的亮度信号在每个程序的每个图像帧的每行的活动视频时间。在接收机处，检测用于两个节目源的压缩色度和亮度信号，并且选择两个节目源中的一个或另一个的压缩色度和亮度信号。所选择的色度信号在非活动视频时间期间在模拟延迟线中存储，其输出与所选择的亮度信号组合，以在所选择的节目中的活动视频时间期间重建用于所选节目源的复合视频信号。

97. 发明授权

US4484258A Apparatus for controlling distributed electrical loads 失效
标题翻译：用于控制分布式电气负载的装置
公开(公告)号：US4484258A
公开(公告)日：1984-11-20
申请号：US326116
申请日：1981-11-30
申请人： Edward B. Miller , Charles W. Eichelberger
发明人： Edward B. Miller , Charles W. Eichelberger
IPC分类号： H02J13/00 , H05B37/02 , G06F15/46
CPC分类号： H05B37/029 , H02J13/0079 , H02J13/0086 , H05B37/0218 , H05B37/0227 , Y02B20/46 , Y02B70/3283 , Y04S20/246
摘要： An apparatus for controlling distributed electrical loads including a microprocessor based central controller coupled via a twisted pair bidirectional data line to a plurality of microcomputer based transceiver decoders. Each transceiver decoder is coupled to a plurality of relays, each relay associated with a particular load to be controlled. Override switches and sensors, coupled to transceiver decoders provide override requests and information related to amibient conditions at the site of a load. A user defined data base includes sub-sets of relays called sectors, patterns of relay states, remote switches, a time dependent schedule and condition responses. A communication protocall and arbitration scheme provide for interactive communication between the central controller and each transceiver decoder with interfacing with the operation of any other transceiver decoder. Enhanced data storage capacity is achieved through dynamic allocation of memory space for pattern data. This divisional application is particularly directed to an improvement in the transceiver decoder permitting it to accumulate data from switch actuations and then transmit this accumulated data to the central controller whenever the transceiver decoder can gain access to the twisted pair data line.
摘要翻译：一种用于控制分布式电负载的装置，包括通过双绞线双向数据线耦合到基于微机的收发器解码器的基于微处理器的中央控制器。每个收发器解码器耦合到多个继电器，每个继电器与要控制的特定负载相关联。耦合到收发器解码器的覆盖开关和传感器提供覆盖请求和与负载现场的无序条件相关的信息。用户定义的数据库包括称为扇区的继电器子集，继电器状态模式，远程开关，时间相关调度和状态响应。通信协调和仲裁方案提供中央控制器和每个收发器解码器之间的交互式通信，与任何其他收发器解码器的操作接口。通过动态分配模式数据的存储空间来实现增强的数据存储容量。该分案应用特别涉及收发器解码器的改进，允许其从开关致动中积累数据，然后每当收发器解码器可以访问双绞线数据线时将该累积数据发送到中央控制器。

98. 发明授权

US4438158A Method for fabrication of electrical resistor 失效
标题翻译：电阻制造方法
公开(公告)号：US4438158A
公开(公告)日：1984-03-20
申请号：US437046
申请日：1982-10-27
申请人： Charles W. Eichelberger , Robert J. Wojnarowski
发明人： Charles W. Eichelberger , Robert J. Wojnarowski
IPC分类号： H01C17/065 , B05D5/12 , H01C7/00
CPC分类号： H01C17/06533
摘要： An electrical resistor family based on oxides of tungsten and/or molybdenum is prepared by combining a polymeric binder with such oxides in an appropriate amount to realize the desired bulk properties. The resistance of the composite can be varied by varying the metal content of the oxides and/or by appropriate combination of the various oxides. Inert fillers are not required and the bulk properties are more stable.
摘要翻译：基于钨和/或钼的氧化物的电阻器系列通过将聚合物粘合剂与这种氧化物合适的量合并来实现所需的体积特性来制备。可以通过改变氧化物的金属含量和/或通过各种氧化物的适当组合来改变复合材料的电阻。不需要惰性填料，体积性能更稳定。

99. 发明授权

US4362903A Electrical conductor interconnect providing solderable connections to hard-to-contact substrates, such as liquid crystal cells 失效
标题翻译：电导体互连件提供与硬接触衬底（例如液晶单元）的可焊接连接
公开(公告)号：US4362903A
公开(公告)日：1982-12-07
申请号：US220331
申请日：1980-12-29
申请人： Charles W. Eichelberger , Wesley K. Waldron , Robert J. Wojnarowski
发明人： Charles W. Eichelberger , Wesley K. Waldron , Robert J. Wojnarowski
IPC分类号： H01R4/02 , H01R12/04 , H01R12/32 , H05K1/09 , H05K1/14 , H05K3/24 , B23K1/20 , G02F1/13
CPC分类号： H05K3/246 , H05K1/095 , H05K2201/0326 , H05K2201/0347 , H05K3/244
摘要： An electrical conductor interconnect is disclosed which permits hard-to-contact substrates, such as the glass substrate in liquid crystal display cells, to be connected to electrical apparatus by conventional soldering techniques. The interconnect conductor involves the use of a polymer loaded with both a conducting powder and a non-noble metal powder whose top surface is coated with a contiguous layer of an adherent solderable metal by an augmentation replacement reaction.
摘要翻译：公开了一种电导体互连件，其允许诸如液晶显示单元中的玻璃基板的难接触的基板通过常规的焊接技术连接到电气设备。互连导体包括使用负载有导电粉末和非贵金属粉末的聚合物，其顶表面通过增加置换反应被粘附的可焊接金属的邻接层涂覆。

100. 发明授权

US4345236A Abrasion-resistant screen-printed potentiometer 失效
标题翻译：耐磨丝印电位器
公开(公告)号：US4345236A
公开(公告)日：1982-08-17
申请号：US220344
申请日：1980-12-29
申请人： Charles W. Eichelberger , Robert J. Wojnarowski
发明人： Charles W. Eichelberger , Robert J. Wojnarowski
IPC分类号： H01C10/30 , H01C10/38
CPC分类号： H01C10/305 , H01C10/38 , Y10T29/49082
摘要： An abrasion-resistant screen-printed potentiometer includes top and bottom resistive layers screen-printed on a substrate. The resistivity of the top layer is substantially greater than the resistivity of the bottom layer. A slide arm is in pressure contact with the top layer and is slidably movable thereacross.
摘要翻译：耐磨丝网印刷电位器包括丝网印刷在基材上的顶部和底部电阻层。顶层的电阻率基本上大于底层的电阻率。滑动臂与顶层压力接触并且可滑动地在其上移动。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式