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1. 发明授权

US06498385B1 Post-fuse blow corrosion prevention structure for copper fuses 有权
标题翻译：铜熔丝保险丝熔断防腐结构
公开(公告)号：US06498385B1
公开(公告)日：2002-12-24
申请号：US09388314
申请日：1999-09-01
申请人： Timothy H. Daubenspeck , Daniel C. Edelstein , Robert M. Geffken , William T. Motsiff , Anthony K. Stamper , Steven H. Voldman
发明人： Timothy H. Daubenspeck , Daniel C. Edelstein , Robert M. Geffken , William T. Motsiff , Anthony K. Stamper , Steven H. Voldman
IPC分类号： H01L2900
CPC分类号： H01L21/76877 , H01L21/76807 , H01L21/76843 , H01L23/5258 , H01L28/20 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A structure and method of fabricating a semiconductor corrosion resistant metal fuse line including a refractory liner which can also act as a resistor is disclosed. Fabrication is accomplished using damascene process. The metal structure can be formed on a semiconductor substrate including a first portion including a first layer and a second layer, the first layer having higher resistivity than the second layer, the second layer having horizontal and vertical surfaces that are in contact with the first layer in the first portion, and a second portion coupled to the first portion, the second portion being comprised of the first layer, the first layer not being in contact with the horizontal and vertical surfaces of the second layer in the second portion. The metal structure can be used as a corrosion resistant fuse. The metal structure can also be used as a resistive element. The high voltage tolerant resistor structure allows for usage in mixed-voltage, and mixed signal and analog/digital applications. The resistor element has low capacitance, low skin effect, high linearity, a high melting temperature, and a high critical current to failure. The resistor structure can be formed on the walls of a dielectric trough. The structure can be applied to circuit applications such as an ESD network, an RC-coupled MOSFET, a resistor ballasted MOSFET and others. The resistors can be in series with the MOSFET or other structures.
摘要翻译：公开了一种制造半导体耐腐蚀金属熔丝线的结构和方法，其包括也可以用作电阻器的耐火衬垫。使用镶嵌工艺完成制作。金属结构可以形成在包括包括第一层和第二层的第一部分的半导体衬底上，第一层具有比第二层更高的电阻率，第二层具有与第一层接触的水平和垂直表面在第一部分中，以及第二部分，其联接到第一部分，第二部分由第一层组成，第一层不与第二部分中的第二层的水平和垂直表面接触。金属结构可用作耐腐蚀保险丝。金属结构也可以用作电阻元件。高耐压电阻器结构允许在混合电压，混合信号和模拟/数字应用中使用。电阻元件具有低电容，低效果，高线性度，高熔点温度和高临界电流故障。电阻器结构可以形成在电介质槽的壁上。该结构可以应用于诸如ESD网络，RC耦合MOSFET，电阻器镇流MOSFET等电路应用。电阻可以与MOSFET或其他结构串联。

2. 发明授权

US06746947B2 Post-fuse blow corrosion prevention structure for copper fuses 有权
标题翻译：铜熔丝保险丝熔断防腐结构
公开(公告)号：US06746947B2
公开(公告)日：2004-06-08
申请号：US10254277
申请日：2002-09-25
申请人： Timothy H. Daubenspeck , Daniel C. Edelstein , Robert M. Geffken , William T. Motsiff , Anthony K. Stamper , Steven H. Voldman
发明人： Timothy H. Daubenspeck , Daniel C. Edelstein , Robert M. Geffken , William T. Motsiff , Anthony K. Stamper , Steven H. Voldman
IPC分类号： H01L2144
CPC分类号： H01L21/76877 , H01L21/76807 , H01L21/76843 , H01L23/5258 , H01L28/20 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A structure and method of fabricating a semiconductor corrosion resistant metal fuse line including a refractory liner which can also act as a resistor is disclosed. Fabrication is accomplished using damascene process. The metal structure can be formed on a semiconductor substrate including a first portion including a first layer and a second layer, the first layer having higher resistivity than the second layer, the second layer having horizontal and vertical surfaces that are in contact with the first layer in the first portion, and a second portion coupled to the first portion, the second portion being comprised of the first layer, the first layer not being in contact with the horizontal and vertical surfaces of the second layer in the second portion. The metal structure can be used as a corrosion resistant fuse. The metal structure can also be used as a resistive element. The high voltage tolerant resistor structure allows for usage in mixed-voltage, and mixed signal and analog/digital applications. The resistor element has low capacitance, low skin effect, high linearity, a high melting temperature, and a high critical current to failure. The resistor structure can be formed on the walls of a dielectric trough. The structure can be applied to circuit applications such as an ESD network, an RC-coupled MOSFET, a resistor ballasted MOSFET and others. The resistors can be in series with the MOSFET or other structures.
摘要翻译：公开了一种制造半导体耐腐蚀金属熔丝线的结构和方法，其包括也可以用作电阻器的耐火衬垫。使用镶嵌工艺完成制作。金属结构可以形成在包括包括第一层和第二层的第一部分的半导体衬底上，第一层具有比第二层更高的电阻率，第二层具有与第一层接触的水平和垂直表面在第一部分中，以及第二部分，其联接到第一部分，第二部分由第一层组成，第一层不与第二部分中的第二层的水平和垂直表面接触。金属结构可用作耐腐蚀保险丝。金属结构也可以用作电阻元件。高耐压电阻器结构允许在混合电压，混合信号和模拟/数字应用中使用。电阻元件具有低电容，低效果，高线性度，高熔点温度和高临界电流故障。电阻器结构可以形成在电介质槽的壁上。该结构可以应用于诸如ESD网络，RC耦合MOSFET，电阻器镇流MOSFET等电路应用。电阻可以与MOSFET或其他结构串联。

3. 发明授权

US06548338B2 Integrated high-performance decoupling capacitor and heat sink 失效
标题翻译：集成高性能去耦电容和散热片
公开(公告)号：US06548338B2
公开(公告)日：2003-04-15
申请号：US09764504
申请日：2001-01-17
申请人： Kerry Bernstein , Robert M. Geffken , Wilbur D. Pricer , Anthony K. Stamper , Steven H. Voldman
发明人： Kerry Bernstein , Robert M. Geffken , Wilbur D. Pricer , Anthony K. Stamper , Steven H. Voldman
IPC分类号： H01L218238
CPC分类号： H01L28/40 , H01L23/3672 , H01L23/3735 , H01L27/0805 , H01L2924/0002 , H01L2924/10158 , H01L2924/00
摘要： A significant and very effective decoupling capacitor and heat sink combination that, in a single structure provides both a heat sink and a decoupling capacitor in close proximity to the active circuit on the chip requiring either heat sinking or decoupling capacitance or both. This is achieved by forming on a semiconductor chip, having a buried oxide layer therein, an integrated high-performance decoupling capacitor that uses a metallic deposit greater than 30 microns thick formed on the back surface of the chip and electrically connected to the active chip circuit to result in a significant and very effective decoupling capacitor and heat sink in close proximity to the active circuit on the chip requiring such decoupling capacitance and heat sinking capabilities. The decoupling capacitance can use the substrate of the chip itself as one of the capacitive plates and a formed metallic deposit as the second capacitive plate which also serves as a heat sink for the active circuit formed in the chip. The structure thus provides both a significant and effective decoupling capacitance in close proximity to the active circuit on the chip requiring such decoupling capacitance as well as providing improved heat sinking for the decoupled active circuit.
摘要翻译：一种显着且非常有效的去耦电容器和散热器组合，其在单个结构中提供散热器和去耦电容器，其紧邻芯片上的有源电路，需要散热或去耦电容或两者兼有。这通过在其中具有掩埋氧化物层的半导体芯片上形成集成的高性能去耦电容器来实现，所述高性能去耦电容器使用形成在芯片的背面上并且电连接到有源芯片电路的大于30微米厚的金属沉积物导致显着且非常有效的去耦电容器和散热器紧邻芯片上的有源电路，需要这种去耦电容和散热能力。去耦电容可以使用芯片本身的衬底作为电容板之一，并且形成金属沉积物作为第二电容板，其也用作形成在芯片中的有源电路的散热器。因此，该结构提供了重要且有效的去耦电容，其紧邻芯片上的有源电路，需要这种去耦电容，并为解耦的有源电路提供改进的散热。

4. 发明授权

US06236103B1 Integrated high-performance decoupling capacitor and heat sink 失效
标题翻译：集成高性能去耦电容和散热片
公开(公告)号：US06236103B1
公开(公告)日：2001-05-22
申请号：US09283828
申请日：1999-03-31
申请人： Kerry Bernstein , Robert M. Geffken , Wilbur D. Pricer , Anthony K. Stamper , Steven H. Voldman
发明人： Kerry Bernstein , Robert M. Geffken , Wilbur D. Pricer , Anthony K. Stamper , Steven H. Voldman
IPC分类号： H01L2900
CPC分类号： H01L28/40 , H01L23/3672 , H01L23/3735 , H01L27/0805 , H01L2924/0002 , H01L2924/10158 , H01L2924/00
摘要： A significant and very effective decoupling capacitor and heat sink combination that, in a single structure provides both a heat sink and a decoupling capacitor in close proximity to the active circuit on the chip requiring either heat sinking or decoupling capacitance or both. This is achieved by forming on a semiconductor chip, having a buried oxide layer therein, an integrated high-performance decoupling capacitor that uses a metallic deposit greater than 30 microns thick formed on the back surface of the chip and electrically connected to the active chip circuit to result in a significant and very effective decoupling capacitor and heat sink in close proximity to the active circuit on the chip requiring such decoupling capacitance and heat sinking capabilities. The decoupling capacitance can use the substrate of the chip itself as one of the capacitive plates and a formed metallic deposit as the second capacitive plate which also serves as a heat sink for the active circuit formed in the chip. The structure thus provides both a significant and effective decoupling capacitance in close proximity to the active circuit on the chip requiring such decoupling capacitance as well as providing improved heat sinking for the decoupled active circuit.
摘要翻译：一种显着且非常有效的去耦电容器和散热器组合，其在单个结构中提供散热器和去耦电容器，其紧邻芯片上的有源电路，需要散热或去耦电容或两者兼有。这通过在其中具有掩埋氧化物层的半导体芯片上形成集成的高性能去耦电容器来实现，所述高性能去耦电容器使用形成在芯片的背面上并且电连接到有源芯片电路的大于30微米厚的金属沉积物导致显着且非常有效的去耦电容器和散热器紧邻芯片上的有源电路，需要这种去耦电容和散热能力。去耦电容可以使用芯片本身的衬底作为电容板之一，并且形成金属沉积物作为第二电容板，其也用作形成在芯片中的有源电路的散热器。因此，该结构提供了重要且有效的去耦电容，其紧邻芯片上的有源电路，需要这种去耦电容，并为解耦的有源电路提供改进的散热。

5. 发明授权

US07482258B2 Product and method for integration of deep trench mesh and structures under a bond pad 失效
标题翻译：深沟槽网格和结合垫下结构的整合的产品和方法
公开(公告)号：US07482258B2
公开(公告)日：2009-01-27
申请号：US10908118
申请日：2005-04-28
申请人： Ephrem G. Gebreselasie , William T. Motsiff , Wolfgang Sauter , Steven H. Voldman
发明人： Ephrem G. Gebreselasie , William T. Motsiff , Wolfgang Sauter , Steven H. Voldman
IPC分类号： H01L21/44
CPC分类号： H01L27/0207 , H01L21/76224 , H01L21/823481 , H01L21/8249 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A method of integrating circuit components under bond pads includes establishing a trench border on a circuit element and synthesizing a set of trench mesh edges of a trench mesh to be coincident with the trench border on the circuit element. The method further includes eliminating a trench mesh contained within the trench border of the trench circuit element.
摘要翻译：将电路部件集成在接合焊盘下面的方法包括在电路元件上建立沟槽边界，并且合成沟槽网格的一组沟槽网格边缘以与电路元件上的沟槽边界重合。该方法还包括消除包含在沟槽电路元件的沟槽边界内的沟槽网格。

6. 发明授权

US08044510B2 Product and method for integration of deep trench mesh and structures under a bond pad 有权
标题翻译：深沟槽网格和结合垫下结构的整合的产品和方法
公开(公告)号：US08044510B2
公开(公告)日：2011-10-25
申请号：US12256089
申请日：2008-10-22
申请人： Ephrem G. Gebreselasie , William T. Motsiff , Wolfgang Sauter , Steven H. Voldman
发明人： Ephrem G. Gebreselasie , William T. Motsiff , Wolfgang Sauter , Steven H. Voldman
IPC分类号： H01L23/48
CPC分类号： H01L27/0207 , H01L21/76224 , H01L21/823481 , H01L21/8249 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A structure includes a substrate. A trench structure is arranged within the substrate. A film is placed under an interlevel dielectric pad and between portions of the trench structure.
摘要翻译：一种结构包括基底。沟槽结构布置在衬底内。将薄膜放置在层间介质垫之下和沟槽结构的部分之间。

7. 发明申请

US20090127628A1 PRODUCT AND METHOD FOR INTEGRATION OF DEEP TRENCH MESH AND STRUCTURES UNDER A BOND PAD 有权
标题翻译：产品和方法，用于整合深层沥青网和结构桩
公开(公告)号：US20090127628A1
公开(公告)日：2009-05-21
申请号：US12256089
申请日：2008-10-22
申请人： Ephrem G. GEBRESELASIE , William T. Motsiff , Wolfgang Sauter , Steven H. Voldman
发明人： Ephrem G. GEBRESELASIE , William T. Motsiff , Wolfgang Sauter , Steven H. Voldman
IPC分类号： H01L29/78 , H01L27/088
CPC分类号： H01L27/0207 , H01L21/76224 , H01L21/823481 , H01L21/8249 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： A structure includes a substrate. A trench structure is arranged within the substrate. A film is placed under an interlevel dielectric pad and between portions of the trench structure.
摘要翻译：一种结构包括基底。沟槽结构布置在衬底内。将薄膜放置在层间介质垫之下和沟槽结构的部分之间。

8. 发明授权

US06680520B2 Method and structure for forming precision MIM fusible circuit elements using fuses and antifuses 有权
标题翻译：使用保险丝和反熔丝形成精密MIM易熔电路元件的方法和结构
公开(公告)号：US06680520B2
公开(公告)日：2004-01-20
申请号：US09525088
申请日：2000-03-14
申请人： Steven H. Voldman , Anthony K. Stamper
发明人： Steven H. Voldman , Anthony K. Stamper
IPC分类号： H01L2900
CPC分类号： H01L23/5252 , H01L23/5223 , H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： The present invention describes an apparatus and method for fabrication of a precision circuit elements. In particular, the circuit elements are fabricated as part of an integrated circuit assembly. The processing of the circuit elements is such to provide a nominal circuit element value close in value to the desired value. Additional trim circuit elements are joined to the nominal circuit element through links. The links are fusible links or antifuses. By selectively blowing the fusible links or fusing the antifuses, trim circuit elements are added or subtracted to personalize the value of the nominal circuit element. A capacitor is used in an illustrative example.
摘要翻译：本发明描述了一种用于制造精密电路元件的装置和方法。特别地，电路元件被制造为集成电路组件的一部分。电路元件的处理使得提供与期望值接近的额定电路元件值。附加的微调电路元件通过链路连接到标称电路元件。链接是可熔链接或反熔丝。通过选择性地吹入可熔连接件或熔合反熔丝，对微调电路元件进行加法或减法以个性化标称电路元件的值。在说明性示例中使用电容器。

9. 发明授权

US08423936B2 Semiconductor structure and method of designing semiconductor structure to avoid high voltage initiated latch-up in low voltage sectors 有权
标题翻译：半导体结构和半导体结构设计方法，以避免在低压部分高压启动闭锁
公开(公告)号：US08423936B2
公开(公告)日：2013-04-16
申请号：US13358105
申请日：2012-01-25
申请人： Steven H. Voldman
发明人： Steven H. Voldman
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , H01L23/585 , H01L27/0921 , H01L2924/0002 , H01L2924/00
摘要： A method and semiconductor structure to avoid latch-up is disclosed. The method includes identifying at least one high voltage device on a semiconductor chip, identifying a circuit on the semiconductor chip separated from the identified at least one high voltage device by a guard ring, evaluating the circuit for a latch-up condition, and when the latch-up condition occurs, adjusting the contact-circuit spacing in the circuit.
摘要翻译：公开了一种避免闩锁的方法和半导体结构。该方法包括识别半导体芯片上的至少一个高电压器件，识别半导体芯片上的由保护环与所识别的至少一个高电压器件分离的电路，评估该电路的闩锁状态，以及当发生闩锁状态，调整电路中的接触电路间距。

10. 发明授权

US08390074B2 Structure and method for latchup improvement using through wafer via latchup guard ring 有权
标题翻译：用于通过闭锁保护环通过晶片的闩锁改进的结构和方法
公开(公告)号：US08390074B2
公开(公告)日：2013-03-05
申请号：US13150437
申请日：2011-06-01
申请人： Steven H. Voldman
发明人： Steven H. Voldman
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/119
CPC分类号： H01L27/0921
摘要： A structure for preventing latchup. The structure includes a latchup sensitive structure and a through wafer via structure bounding the latch-up sensitive structure to prevent parasitic carriers from being injected into the latch-up sensitive structure.
摘要翻译：用于防止闩锁的结构。该结构包括闭锁敏感结构和限制闩锁敏感结构的穿透晶片通孔结构，以防止寄生载流子注入到闩锁敏感结构中。

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