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1. 发明授权

US06377638B1 SIGNAL TRANSMISSION SYSTEM FOR TRANSMITTING SIGNALS BETWEEN LSI CHIPS, RECEIVER CIRCUIT FOR USE IN THE SIGNAL TRANSMISSION SYSTEM, AND SEMICONDUCTOR MEMORY DEVICE APPLYING THE SIGNAL TRANSMISSION SYSTEM 有权
标题翻译：用于在信号传输系统中使用的LSI芯片，接收器电路之间发送信号的信号传输系统和应用信号传输系统的半导体存储器件
公开(公告)号：US06377638B1
公开(公告)日：2002-04-23
申请号：US09688389
申请日：2000-10-12
申请人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
发明人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
IPC分类号： H03D106
CPC分类号： H04L25/0276 , G06F13/4243 , H04L25/0278 , H04L25/0282 , H04L25/0288 , H04L25/497 , Y02D10/14 , Y02D10/151
摘要： A signal transmission system has a response time of a signal transmission line which is set approximately equal to or longer than the length of a transmitted symbol. More specifically, terminal resistance is set larger than the characteristic impedance of the signal transmission line, driver output resistance is set to a large value, or a damping resistor is provided in series with the signal transmission line. With this configuration, signal power can be reduced drastically.
摘要翻译：信号传输系统具有被设置为大致等于或长于发送符号的长度的信号传输线的响应时间。更具体地，将端子电阻设定为大于信号传输线的特性阻抗，驱动器输出电阻设定为大值，或者与信号传输线串联设置阻尼电阻。通过这种配置，可以显着降低信号功率。

2. 发明授权

US6157688A Signal transmission system for transmitting signals between LSI chips, receiver circuit for use in the signal transmission system, and semiconductor memory device applying the signal transmission system 失效
公开(公告)号：US6157688A
公开(公告)日：2000-12-05
申请号：US944516
申请日：1997-10-06
申请人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
发明人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
IPC分类号： G06F3/00 , G06F1/10 , G06F12/00 , G06F13/16 , G06F13/42 , G11C11/401 , G11C11/407 , G11C11/409 , H04B14/06 , G11C16/06
CPC分类号： H04L25/0276 , G06F13/4243 , H04L25/0278 , H04L25/0282 , H04L25/0288 , H04L25/497 , Y02B60/1228 , Y02B60/1235
摘要： A signal transmission system has a response time of a signal transmission line which is set approximately equal to or longer than the length of a transmitted symbol. More specifically, terminal resistance is set larger than the characteristic impedance of the signal transmission line, driver output resistance is set to a large value, or a damping resistor is provided in series with the signal transmission line. With this configuration, signal power can be reduced drastically.

3. 发明授权

US6064244A Phase-locked loop circuit permitting reduction of circuit size 失效
标题翻译：锁相环电路允许减小电路尺寸
公开(公告)号：US6064244A
公开(公告)日：2000-05-16
申请号：US813632
申请日：1997-03-07
申请人： Shigetoshi Wakayama , Kohtaroh Gotoh , Miyoshi Saito , Junji Ogawa , Hirotaka Tamura
发明人： Shigetoshi Wakayama , Kohtaroh Gotoh , Miyoshi Saito , Junji Ogawa , Hirotaka Tamura
IPC分类号： H03L7/00 , G06F1/06 , G11C7/22 , G11C11/407 , H03K23/54 , H03K23/66 , H03L7/081 , H03L7/089 , H03L7/099 , H04L7/033 , H03L7/06
CPC分类号： H03L7/0997 , G11C7/22 , H03K23/54 , H03K23/548 , H03K23/66 , H03L7/0814 , H03L7/089
摘要： A phase-locked loop circuit is constituted in such a manner that a delayed signal created by causing an input signal to loop through a delay stage a plurality of times is compared in terms of phase with the input signal, and an amount of delay in the delay stage is controlled in accordance with the comparison result of the delayed signal and the input signal. Therefore, the circuit size can be reduced with a reduced number of delay units constituting the delay stage.
摘要翻译：锁相环电路以这样的方式构成，使得通过使输入信号多次循环延迟级而产生的延迟信号在与输入信号的相位方面进行比较，并且在根据延迟信号和输入信号的比较结果控制延迟级。因此，可以减少构成延迟级的延迟单元的数量来减小电路尺寸。

4. 发明授权

US06493394B2 SIGNAL TRANSMISSION SYSTEM FOR TRANSMITTING SIGNALS BETWEEN LSI CHIPS, RECEIVER CIRCUIT FOR USE IN THE SIGNAL TRANSMISSION SYSTEM, AND SEMICONDUCTOR MEMORY DEVICE APPLYING THE SIGNAL TRANSMISSION SYSTEM 有权
公开(公告)号：US06493394B2
公开(公告)日：2002-12-10
申请号：US10076526
申请日：2002-02-19
申请人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
发明人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
IPC分类号： H04B300
CPC分类号： H04L25/0276 , G06F13/4243 , H04L25/0278 , H04L25/0282 , H04L25/0288 , H04L25/497 , Y02D10/14 , Y02D10/151
摘要： A signal transmission system has a response time of a signal transmission line which is set approximately equal to or longer than the length of a transmitted symbol. More specifically, terminal resistance is set larger than the characteristic impedance of the signal transmission line, driver output resistance is set to a large value, or a damping resistor is provided in series with the signal transmission line. With this configuration, signal power can be reduced drastically.

5. 发明授权

US06333883B2 Destructive read type memory circuit, restoring circuit for the same and sense amplifier 有权
标题翻译：破坏性读取型存储电路，恢复电路为相同和感测放大器
公开(公告)号：US06333883B2
公开(公告)日：2001-12-25
申请号：US09768465
申请日：2001-01-25
申请人： Shigetoshi Wakayama , Kohtaroh Gotoh , Miyoshi Saito , Junji Ogawa
发明人： Shigetoshi Wakayama , Kohtaroh Gotoh , Miyoshi Saito , Junji Ogawa
IPC分类号： G11C700
CPC分类号： G11C7/065 , G11C7/06 , G11C11/4091
摘要： A restoring circuit 24, provided for each of the memory blocks 191 and 192, having registers and a selector for selecting one of the present row address and the output of the registers, provides the output of the selector to a word decoder 26. The present row address is held in one of the registers. When amplification is started by a sense amplifier 15, transfer gates 10 and 11 connected between the bit lines BL1 and *BL1 and the sense amplifier 15 are turned off to decrease the load of the sense amplifier 15, the amplified signal is stored in a buffer memory cell circuit 18, and accessing is completed with omitting restoring to the memory cell 12. While the memory cell block 191 is not selected, the data held in the buffer memory cell circuit 18 is stored into the memory cell row addressed by the content of the selected register. The sense amplifier 15 has PMOS and NMOS sense amplifiers. The PMOS sense amplifier, having a pair of cross-coupled PMOS transistors and a pair of transfer gates, the potential of the sources of the PMOS transistors being fixed at Vii, operates in a direct sensing mode when the transfer gates are off state, and then functions as a usual PMOS sense amplifier by turning on the transfer gates. Likewise for the NMOS sense amplifier.
摘要翻译：为每个存储器块191和192提供的恢复电路24具有寄存器和用于选择当前行地址和寄存器的输出之一的选择器，将选择器的输出提供给字解码器26.现在行地址保存在其中一个寄存器中。当由读出放大器15开始放大时，连接在位线BL1和* BL1与读出放大器15之间的传输门10和11被截止以减小读出放大器15的负载，放大的信号被存储在缓冲器存储单元电路18，并且通过省略对存储单元12的恢复来完成访问。虽然没有选择存储单元块191，但是保持在缓冲存储单元电路18中的数据被存储到由所选寄存器。读出放大器15具有PMOS和NMOS读出放大器。具有一对交叉耦合PMOS晶体管和一对传输栅极的PMOS读出放大器，PMOS晶体管的源极的电位固定在Vii处，当传输门断开时，其工作在直接感测模式，而然后通过打开传输门来作为通常的PMOS读出放大器。类似于NMOS读出放大器。

6. 发明授权

US06205076B1 Destructive read type memory circuit, restoring circuit for the same and sense amplifier 有权
公开(公告)号：US06205076B1
公开(公告)日：2001-03-20
申请号：US09276690
申请日：1999-03-26
申请人： Shigetoshi Wakayama , Kohtaroh Gotoh , Miyoshi Saito , Junji Ogawa
发明人： Shigetoshi Wakayama , Kohtaroh Gotoh , Miyoshi Saito , Junji Ogawa
IPC分类号： G11C700
CPC分类号： G11C7/065 , G11C7/06 , G11C11/4091
摘要： A restoring circuit 24, provided for each of the memory blocks 191 and 192, having registers and a selector for selecting one of the present row address and the output of the registers, provides the output of the selector to a word decoder 26. The present row address is held in one of the registers. When amplification is started by a sense amplifier 15, transfer gates 10 and 11 connected between the bit lines BL1 and *BL1 and the sense amplifier 15 are turned off to decrease the load of the sense amplifier 15, the amplified signal is stored in a buffer memory cell circuit 18, and accessing is completed with omitting restoring to the memory cell 12. While the memory cell block 191 is not selected, the data held in the buffer memory cell circuit 18 is stored into the memory cell row addressed by the content of the selected register. The sense amplifier 15 has PMOS and NMOS sense amplifiers. The PMOS sense amplifier, having a pair of cross-coupled PMOS transistors and a pair of transfer gates, the potential of the sources of the PMOS transistors being fixed at Vii, operates in a direct sensing mode when the transfer gates are off state, and then functions as a usual PMOS sense amplifier by turning on the transfer gates. Likewise for the NMOS sense amplifier.

7. 发明授权

US07154797B1 Signal transmission system using PRD method, receiver circuit for use in the signal transmission system, and semiconductor memory device to which the signal transmission system is applied 有权
公开(公告)号：US07154797B1
公开(公告)日：2006-12-26
申请号：US09714285
申请日：2000-11-17
申请人： Miyoshi Saito , Junji Ogawa
发明人： Miyoshi Saito , Junji Ogawa
IPC分类号： G11C7/02 , G11C8/00
CPC分类号： G11C7/1063 , G11C7/04 , G11C7/065 , G11C7/10 , G11C7/1006 , G11C7/1048 , G11C7/1051 , G11C7/1078 , G11C7/1096 , G11C11/4076 , G11C11/4091 , G11C11/4096 , G11C2207/002 , G11C2207/2227 , G11C2207/229 , H04L25/03878
摘要： A signal transmission system is constructed to transmit data over a signal transmission line without requiring precharging the signal transmission line for every bit, by eliminating the intersymbol interference component introduced by preceding data. The signal transmission line has a plurality of switchable signal transmission lines organized in a branching structure or a hierarchical structure, at least one target unit from which to read data is connected to each of the plurality of signal transmission lines, and a readout circuit including a circuit for eliminating the intersymbol interference component is connected to the signal transmission line, wherein the intersymbol interference component elimination circuit reduces noise introduced when the signal transmission line is switched between the plurality of signal transmission lines, and thereby provides a smooth intersymbol interference component elimination operation when the signal transmission line is switched. This makes continuous readout possible and achieves an increase in the overall speed of the signal transmission system.

8. 发明申请

US20070071130A1 Signal transmission system using PRD method, receiver circuit for use in the signal transmission system, and semiconductor memory device to which the signal transmission system is applied 有权
标题翻译：使用PRD方法的信号传输系统，用于信号传输系统的接收机电路以及应用信号传输系统的半导体存储器件
公开(公告)号：US20070071130A1
公开(公告)日：2007-03-29
申请号：US11604807
申请日：2006-11-28
申请人： Miyoshi Saito , Junji Ogawa
发明人： Miyoshi Saito , Junji Ogawa
IPC分类号： H04L25/10
CPC分类号： G11C7/1063 , G11C7/04 , G11C7/065 , G11C7/10 , G11C7/1006 , G11C7/1048 , G11C7/1051 , G11C7/1078 , G11C7/1096 , G11C11/4076 , G11C11/4091 , G11C11/4096 , G11C2207/002 , G11C2207/2227 , G11C2207/229 , H04L25/03878
摘要： A signal transmission system is constructed to transmit data over a signal transmission line without requiring precharging the signal transmission line for every bit, by eliminating the intersymbol interference component introduced by preceding data. The signal transmission line has a plurality of switchable signal transmission lines organized in a branching structure or a hierarchical structure, at least one target unit from which to read data is connected to each of the plurality of signal transmission lines, and a readout circuit including a circuit for eliminating the intersymbol interference component is connected to the signal transmission line, wherein the intersymbol interference component elimination circuit reduces noise introduced when the signal transmission line is switched between the plurality of signal transmission lines, and thereby provides a smooth intersymbol interference component elimination operation when the signal transmission line is switched. This makes continuous readout possible and achieves an increase in the overall speed of the signal transmission system.
摘要翻译：信号传输系统被构造为通过消除由前面的数据引入的符号间干扰成分，通过信号传输线路传输数据，而不需要为每一位预充电信号传输线。信号传输线具有以分支结构或层次结构组织的多个可切换信号传输线，从多个信号传输线中的每一个连接至少一个读取数据的目标单元，以及读出电路，包括：用于消除符号间干扰分量的电路连接到信号传输线，其中，符号间干扰成分消除电路减少了在多个信号传输线之间切换信号传输线时引入的噪声，从而提供平滑的符号间干扰成分消除操作当信号传输线路被切换时。这使连续读出成为可能，并实现了信号传输系统的整体速度的提高。

9. 发明授权

US07505532B2 Signal transmission system using PRD method, receiver circuit for use in the signal transmission system, and semiconductor memory device to which the signal transmission system is applied 有权
标题翻译：使用PRD方法的信号传输系统，用于信号传输系统的接收机电路以及应用信号传输系统的半导体存储器件
公开(公告)号：US07505532B2
公开(公告)日：2009-03-17
申请号：US11604807
申请日：2006-11-28
申请人： Miyoshi Saito , Junji Ogawa
发明人： Miyoshi Saito , Junji Ogawa
IPC分类号： H04L25/06 , H03F3/45
CPC分类号： G11C7/1063 , G11C7/04 , G11C7/065 , G11C7/10 , G11C7/1006 , G11C7/1048 , G11C7/1051 , G11C7/1078 , G11C7/1096 , G11C11/4076 , G11C11/4091 , G11C11/4096 , G11C2207/002 , G11C2207/2227 , G11C2207/229 , H04L25/03878
摘要： A signal transmission system is constructed to transmit data over a signal transmission line without requiring precharging the signal transmission line for every bit, by eliminating the intersymbol interference component introduced by preceding data. The signal transmission line has a plurality of switchable signal transmission lines organized in a branching structure or a hierarchical structure, at least one target unit from which to read data is connected to each of the plurality of signal transmission lines, and a readout circuit including a circuit for eliminating the intersymbol interference component is connected to the signal transmission line, wherein the intersymbol interference component elimination circuit reduces noise introduced when the signal transmission line is switched between the plurality of signal transmission lines, and thereby provides a smooth intersymbol interference component elimination operation when the signal transmission line is switched. This makes continuous readout possible and achieves an increase in the overall speed of the signal transmission system.
摘要翻译：信号传输系统被构造为通过消除由前面的数据引入的符号间干扰成分，通过信号传输线路传输数据，而不需要为每一位预充电信号传输线。信号传输线具有以分支结构或层次结构组织的多个可切换信号传输线，从多个信号传输线中的每一个连接至少一个读取数据的目标单元，以及读出电路，包括：用于消除符号间干扰分量的电路连接到信号传输线，其中，符号间干扰成分消除电路减少了在多个信号传输线之间切换信号传输线时引入的噪声，从而提供平滑的符号间干扰成分消除操作当信号传输线路被切换时。这使连续读出成为可能，并实现了信号传输系统的整体速度的提高。

10. 发明授权

US06185256B2 Signal transmission system using PRD method, receiver circuit for use in the signal transmission system, and semiconductor memory device to which the signal transmission system is applied 失效
标题翻译：使用PRD方法的信号传输系统，用于信号传输系统的接收机电路以及应用信号传输系统的半导体存储器件
公开(公告)号：US06185256B2
公开(公告)日：2001-02-06
申请号：US09062586
申请日：1998-04-20
申请人： Miyoshi Saito , Junji Ogawa
发明人： Miyoshi Saito , Junji Ogawa
IPC分类号： H04B330
CPC分类号： G11C7/1063 , G11C7/04 , G11C7/065 , G11C7/10 , G11C7/1006 , G11C7/1048 , G11C7/1051 , G11C7/1078 , G11C7/1096 , G11C11/4076 , G11C11/4091 , G11C11/4096 , G11C2207/002 , G11C2207/2227 , G11C2207/229 , H04L25/03878
摘要： A signal transmission system is constructed to transmit data over a signal transmission line without requiring precharging the signal transmission line for every bit, by eliminating the intersymbol interference component introduced by preceding data. The signal transmission line has a plurality of switchable signal transmission lines organized in a branching structure or a hierarchical structure, at least one target unit from which to read data is connected to each of the plurality of signal transmission lines, and a readout circuit including a circuit for eliminating the intersymbol interference component is connected to the signal transmission line, wherein the intersymbol interference component elimination circuit reduces noise introduced when the signal transmission line is switched between the plurality of signal transmission lines, and thereby provides a smooth intersymbol interference component elimination operation when the signal transmission line is switched. This makes continuous readout possible and achieves an increase in the overall speed of the signal transmission system.
摘要翻译：信号传输系统被构造为通过消除由前面的数据引入的符号间干扰成分，通过信号传输线路传输数据，而不需要为每一位预充电信号传输线。信号传输线具有以分支结构或层次结构组织的多个可切换信号传输线，从多个信号传输线中的每一个连接至少一个读取数据的目标单元，以及读出电路，包括：用于消除符号间干扰分量的电路连接到信号传输线，其中，符号间干扰成分消除电路减少了在多个信号传输线之间切换信号传输线时引入的噪声，从而提供平滑的符号间干扰成分消除操作当信号传输线路被切换时。这使连续读出成为可能，并实现了信号传输系统的整体速度的提高。

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