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    • 10. 发明授权
    • Semiconductor device having junction structure of a plurality of element
isolation regions
    • 具有多个元件隔离区域的结结构的半导体器件
    • US5148258A
    • 1992-09-15
    • US633801
    • 1990-12-26
    • Shigeru Morita
    • Shigeru Morita
    • H01L21/76H01L21/31H01L21/762
    • H01L21/76232H01L21/76202
    • This invention relates to a junction structure in which element isolation regions having different shapes (e.g., isolation regions respectively formed by a trench isolation method and a LOCOS method) for electrically isolating an element region formed on a semiconductor substrate are bonded to each other. A LOCOS isolation region made of an insulator for electrically isolating many circuit elements of an element region formed on a semiconductor substrate is formed. An end portion of the insulating trench isolation region bonded to the LOCOS isolation region is formed to have a sectorial shape. When a side serving as an end portion of the LOCOS isolation region is bonded to tapered sides of the sectorial portion of the trench isolation region to cause the tapered sides to cross and overlap each other, an included angle serving as an angle defined by these isolation regions on the element region is an obtuse angle.
    • 本发明涉及一种结构结构,其中用于电绝缘形成在半导体衬底上的元件区域的不同形状的元件隔离区域(例如,通过沟槽隔离方法和LOCOS方法分别形成的隔离区域)彼此结合。 形成由用于电绝缘形成在半导体衬底上的元件区的许多电路元件的绝缘体制成的LOCOS隔离区。 结合到LOCOS隔离区域的绝缘沟槽隔离区域的端部形成为具有扇形形状。 当用作LOCOS隔离区域的端部的一侧被结合到沟槽隔离区域的扇形部分的锥形侧面以使得锥形侧面彼此交叉和重叠时,用作由这些隔离限定的角度的夹角 元件区域上的区域是钝角。