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1. 发明申请

US20070284746A1 NANO-ELECTRODE-ARRAY FOR INTEGRATED CIRCUIT INTERCONNECTS 审中-公开
标题翻译：用于集成电路互连的纳米电极阵列
公开(公告)号：US20070284746A1
公开(公告)日：2007-12-13
申请号：US11742328
申请日：2007-04-30
申请人： Sergey Lopatin , Robert Fiordalice , Faivel Pintchovski , Igor Ivanov , Wen Kong , Artur Kolics
发明人： Sergey Lopatin , Robert Fiordalice , Faivel Pintchovski , Igor Ivanov , Wen Kong , Artur Kolics
IPC分类号： H01L21/82
CPC分类号： H01L21/76843 , H01L21/76844 , H01L21/76846 , H01L21/76868 , H01L21/76874 , Y10S977/723
摘要： An integrated circuit is provided including an integrated circuit having a trench and via provided in a dielectric layer. A nano-electrode-array is over the dielectric layer in the trench and via, and a conductor is over the nano-electrode-array. The conductor and the nano-electrode-array are coplanar with a surface of the dielectric layer.
摘要翻译：提供一种集成电路，其包括具有在电介质层中设置的沟槽和通孔的集成电路。纳米电极阵列位于沟槽和通孔中的电介质层的上方，导体在纳米电极阵列的上方。导体和纳米电极阵列与电介质层的表面共面。

2. 发明授权

US07945086B2 Tungsten plug deposition quality evaluation method by EBACE technology 有权
标题翻译：钨丝塞沉积质量评估方法采用EBACE技术
公开(公告)号：US07945086B2
公开(公告)日：2011-05-17
申请号：US11622793
申请日：2007-01-12
申请人： Yehiel Gotkis , Sergey Lopatin , Mehran Nasser-Ghodsi
发明人： Yehiel Gotkis , Sergey Lopatin , Mehran Nasser-Ghodsi
IPC分类号： G06K9/00 , H01L21/3205
CPC分类号： H01L22/12 , H01L22/34
摘要： A first embodiment of the invention relates to a method for evaluating the quality of structures on an integrated circuit wafer. Test structures formed on either on the integrated or on a test wafer are exposed to an electron beam and an electron-beam activated chemical etch. The electron-beam activated etching gas or vapor etches the test structures, which are analyzed after etching to determine a measure of quality of the test structures. The measure of quality may be used in a statistical process control to adjust the parameters used to form device structures on the integrated circuit wafer. The test structures are formed on an integrated circuit wafer having two or more die. Each die has one or more integrated circuit structures. The test structures are formed on scribe lines between two or more adjacent die. Each test structure may correspond in dimensions and/or composition to one or more of the integrated circuit structures.
摘要翻译：本发明的第一实施例涉及一种用于评估集成电路晶片上的结构质量的方法。在集成的或在测试晶片上形成的测试结构暴露于电子束和电子束活化的化学蚀刻。电子束活化的蚀刻气体或蒸气蚀刻测试结构，其在蚀刻后分析以确定测试结构的质量的度量。可以在统计过程控制中使用质量测量来调整用于在集成电路晶片上形成器件结构的参数。测试结构形成在具有两个或更多个管芯的集成电路晶片上。每个管芯具有一个或多个集成电路结构。测试结构形成在两个或更多相邻模具之间的划线上。每个测试结构可以在尺寸和/或组成上与一个或多个集成电路结构相对应。

3. 发明申请

US20110031113A1 ELECTROPLATING APPARATUS 审中-公开
标题翻译：电镀设备
公开(公告)号：US20110031113A1
公开(公告)日：2011-02-10
申请号：US12906008
申请日：2010-10-15
申请人： Sergey Lopatin , Nicolay Y. Kovarsky , David Eaglesham , John O. Dukovic , Charles Gay
发明人： Sergey Lopatin , Nicolay Y. Kovarsky , David Eaglesham , John O. Dukovic , Charles Gay
IPC分类号： C25D17/00
CPC分类号： H01L31/022425 , C25D5/022 , C25D5/10 , C25D7/126 , Y02E10/50
摘要： Embodiments of the invention contemplate the formation of a low cost solar cell using a novel high speed electroplating method and apparatus to form a metal contact structure having selectively formed metal lines using an electrochemical plating process. The apparatus and methods described herein remove the need to perform one or more high temperature screen printing processes to form conductive features on the surface of a solar cell substrate. The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. It is thus desirable to form a solar cell device that has a low resistance connection that is reliable and cost effective. Therefore, one or more embodiments of the invention described herein are adapted to form a low cost and reliable interconnecting layer using an electrochemical plating process containing a common metal, such as copper.
摘要翻译：本发明的实施例考虑使用新颖的高速电镀方法和装置形成低成本太阳能电池，以形成具有使用电化学电镀工艺的选择性形成的金属线的金属接触结构。本文所述的装置和方法消除了执行一个或多个高温丝网印刷工艺以在太阳能电池基板的表面上形成导电特征的需要。在太阳能电池器件中形成的互连的电阻极大地影响太阳能电池的效率。因此，希望形成具有可靠和成本有效的低电阻连接的太阳能电池装置。因此，本文描述的本发明的一个或多个实施例适用于使用包含普通金属（例如铜）的电化学电镀工艺形成低成本且可靠的互连层。

4. 发明授权

US07879730B2 Etch selectivity enhancement in electron beam activated chemical etch 有权
标题翻译：电子束激活化学蚀刻中的蚀刻选择性增强
公开(公告)号：US07879730B2
公开(公告)日：2011-02-01
申请号：US11622605
申请日：2007-01-12
申请人： Mehran Naser-Ghodsi , Garrett Pickard , Rudy F. Garcia , Tzu-Chin Chuang , Ming Lun Yu , Kenneth Krzeczowski , Matthew Lent , Sergey Lopatin , Chris Huang , Niles K. MacDonald
发明人： Mehran Naser-Ghodsi , Garrett Pickard , Rudy F. Garcia , Tzu-Chin Chuang , Ming Lun Yu , Kenneth Krzeczowski , Matthew Lent , Sergey Lopatin , Chris Huang , Niles K. MacDonald
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： C23F4/00 , H01J2237/31744 , H01L21/3065 , H01L21/32136
摘要： Etch selectivity enhancement during electron beam activated chemical etch (EBACE) is disclosed. A target or portion thereof may be exposed to a gas composition of a type that etches the target when the gas composition and/or target are exposed to an electron beam. By directing an electron beam toward the target in the vicinity of the gas composition, an interaction between the electron beam and the gas composition etches a portion of the target exposed to both the gas composition and the electron beam. Selectivity of etching of the target due to interaction between the electron beam and gas composition may be enhanced in a number of ways.
摘要翻译：公开了电子束激活化学蚀刻（EBACE）期间的蚀刻选择性增强。当气体组合物和/或靶暴露于电子束时，靶或其部分可暴露于蚀刻靶的类型的气体组合物。通过在气体组合物附近引导电子束朝向靶，电子束和气体组成之间的相互作用会蚀刻暴露于气体组成和电子束两者的靶的一部分。可以以多种方式增强由于电子束和气体组成之间的相互作用而导致的靶的蚀刻选择性。

5. 发明申请

US20080128013A1 ELECTROPLATING ON ROLL-TO-ROLL FLEXIBLE SOLAR CELL SUBSTRATES 失效
标题翻译：在滚动到滚动的柔性太阳能电池基板上进行电镀
公开(公告)号：US20080128013A1
公开(公告)日：2008-06-05
申请号：US11566200
申请日：2006-12-01
申请人： Sergey Lopatin , David Eaglesham , Charles Gay
发明人： Sergey Lopatin , David Eaglesham , Charles Gay
IPC分类号： H01L31/042 , C23C14/00
CPC分类号： C25D5/022 , C25D5/18 , C25D7/08 , C25D17/00 , C25D17/001 , H01L31/022425 , H01L31/02245 , H01L31/022466 , H01L31/03926 , H01L31/0465 , H01L31/0508 , H01L31/0512 , H01L31/0516 , H01L31/188 , Y02E10/50
摘要： Embodiments of the invention contemplate the formation of a low cost flexible solar cell using a novel electroplating method and apparatus to form a metal contact structure. The apparatus and methods described herein remove the need to perform one or more high temperature screen printing processes to form conductive features on the surface of a solar cell substrate. The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. Solar cell substrates that may benefit from the invention include flexible substrates may have an active region that contains organic material, single crystal silicon, multi-crystalline silicon, polycrystalline silicon, germanium, and gallium arsenide, cadmium telluride, cadmium sulfide, copper indium gallium selenide, copper indium selenide, gallilium indium phosphide, as well as heterojunction cells that are used to convert sunlight to electrical power. The flexible substrates may have a flexible base that is adapted to support the active region of the solar cell device.
摘要翻译：本发明的实施例考虑使用新颖的电镀方法和装置形成金属接触结构来形成低成本的柔性太阳能电池。本文所述的装置和方法消除了执行一个或多个高温丝网印刷工艺以在太阳能电池基板的表面上形成导电特征的需要。在太阳能电池器件中形成的互连的电阻极大地影响太阳能电池的效率。可以受益于本发明的太阳能电池基板包括柔性基板可以具有含有有机材料，单晶硅，多晶硅，多晶硅，锗和砷化镓，碲化镉，硫化镉，铜铟镓硒的有源区，铜铟硒化铟，磷化铟镓，以及用于将阳光转换成电力的异质结电池。柔性基板可以具有适于支撑太阳能电池装置的有源区域的柔性基座。

6. 发明申请

US20080092947A1 PULSE PLATING OF A LOW STRESS FILM ON A SOLAR CELL SUBSTRATE 审中-公开
标题翻译：在太阳能电池基板上的低应力膜的脉冲电镀
公开(公告)号：US20080092947A1
公开(公告)日：2008-04-24
申请号：US11552497
申请日：2006-10-24
申请人： Sergey Lopatin , Charles Gay , David Eaglesham , John O. Dukovic , Nicolay Y. Kovarsky
发明人： Sergey Lopatin , Charles Gay , David Eaglesham , John O. Dukovic , Nicolay Y. Kovarsky
IPC分类号： H01L31/00
CPC分类号： H01L31/022425 , H01L31/02245 , Y02E10/50
摘要： Embodiments of the invention contemplate the formation of a low cost solar cell metal contact structure that has improved electrical and mechanical properties through the use of an electrochemical plating process. The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. It is thus desirable to form a solar cell device that has a low resistance connections that is reliable and cost effective. One or more embodiments of the invention described herein are adapted to form a low cost and reliable interconnecting layer using an electrochemical plating process containing common metal, such as copper. However, generally the electroplated portions of the interconnecting layer may contain a substantially pure metal or a metal alloy layer. Methods are discussed herein that are used to form a solar cell containing conductive metal interconnect layer(s) that have a low intrinsic stress.
摘要翻译：本发明的实施例考虑到通过使用电化学电镀工艺形成具有改善的电气和机械性能的低成本太阳能电池金属接触结构。在太阳能电池器件中形成的互连的电阻极大地影响太阳能电池的效率。因此，希望形成具有可靠和成本有效的低电阻连接的太阳能电池装置。使用本文所述的本发明的一个或多个实施例适用于使用包含普通金属（例如铜）的电化学电镀工艺形成低成本且可靠的互连层。然而，通常互连层的电镀部分可以包含基本上纯的金属或金属合金层。本文讨论了用于形成含有具有低固有应力的导电金属互连层的太阳能电池的方法。

7. 发明授权

US07273813B2 Wafer cleaning solution for cobalt electroless application 有权
标题翻译：用于钴无电镀的晶圆清洗液
公开(公告)号：US07273813B2
公开(公告)日：2007-09-25
申请号：US11053501
申请日：2005-02-08
申请人： Ramin Emami , Timothy Weidman , Sergey Lopatin , Hongbin Fang , Arulkumar Shanmugasundram
发明人： Ramin Emami , Timothy Weidman , Sergey Lopatin , Hongbin Fang , Arulkumar Shanmugasundram
IPC分类号： H01L21/44
CPC分类号： C23C18/1844 , C11D7/06 , C11D7/08 , C11D7/265 , C11D11/0047 , C23F1/18 , C23G1/103 , H01L21/02074 , H01L21/76826 , H01L21/76849 , H01L21/76877 , H01L21/76883
摘要： A method and cleaning solution that removes contaminants from a dielectric material and polished surfaces of copper interconnect structures prior to an electroless deposition of a capping layer without substantially adversely affecting the interconnect formed therefrom are disclosed. The cleaning solution includes combinations of a core mixture and sulfuric acid or sulfonic compounds such as sulfonic acids that include methanesulfonic acid. In one embodiment, the core mixture includes a citric acid solution and a pH adjuster such as tetra-methyl ammonium hydroxide or ammonia. One embodiment of the method includes providing a planarized substrate, applying the cleaning solution to the substrate to simultaneously clean at least one metal feature and a dielectric material of the substrate, and depositing the metal capping layer selectively on the at least one metal feature using electroless deposition.
摘要翻译：公开了一种方法和清洁溶液，其在电绝缘沉积覆盖层之前从电介质材料和铜互连结构的抛光表面去除污染物，而基本上不利地影响由其形成的互连。清洁溶液包括核混合物和硫酸或磺酸化合物如包括甲磺酸的磺酸的组合。在一个实施方案中，核心混合物包括柠檬酸溶液和pH调节剂如四甲基氢氧化铵或氨。该方法的一个实施例包括提供平坦化的基板，将清洁溶液施加到基板上以同时清洁基板的至少一个金属特征和介电材料，并且使用无电镀将金属覆盖层选择性地沉积在至少一个金属特征上沉积

8. 发明授权

US07205233B2 Method for forming CoWRe alloys by electroless deposition 失效
标题翻译：通过无电沉积形成CoWRe合金的方法
公开(公告)号：US07205233B2
公开(公告)日：2007-04-17
申请号：US10703769
申请日：2003-11-07
申请人： Sergey Lopatin , Arulkumar Shanmugasundram , Dmitry Lubomirsky , Ian A. Pancham
发明人： Sergey Lopatin , Arulkumar Shanmugasundram , Dmitry Lubomirsky , Ian A. Pancham
IPC分类号： H01L21/28
CPC分类号： H01L21/76846 , C23C18/1651 , C23C18/1692 , C23C18/1844 , C23C18/50 , H01L21/288 , H01L21/76849 , H01L21/76858 , H01L21/76874
摘要： A method for fabricating a capping layer with enhanced barrier resistance to both copper and oxygen diffusion, comprises forming a capping layer on a conductive surface of an interconnect, wherein the capping layer comprises cobalt (Co), tungsten (W), rhenium (Re), and at least one of phosphorus (P) and boron (B). In an embodiment of the invention, forming the capping layer comprises exposing the conductive surface to an electroless capping solution comprising a cobalt source, a tungsten source, a rhenium source, and at least one of a phosphorus source and a boron source, and annealing the capping layer.
摘要翻译：一种用于制造具有对铜和氧扩散的阻挡性能增强的覆盖层的方法，包括在互连的导电表面上形成覆盖层，其中所述覆盖层包括钴（Co），钨（W），铼（Re），和磷（P）和硼（B）中的至少一种。在本发明的一个实施方案中，形成覆盖层包括将导电表面暴露于包含钴源，钨源，铼源和磷源和硼源中的至少一个的无电覆盖溶液中，并将盖层

9. 发明申请

US20060284626A1 Protection against the effects of condensate bridges 有权
公开(公告)号：US20060284626A1
公开(公告)日：2006-12-21
申请号：US10546763
申请日：2004-02-12
申请人： Sascha D'Angelico , Sergey Lopatin
发明人： Sascha D'Angelico , Sergey Lopatin
IPC分类号： H04B7/00 , G01R27/08
CPC分类号： G01F23/2966 , G01F23/2968
摘要： Apparatus for measuring and/or monitoring a process variable of a medium. The apparatus includes: an oscillatable unit; a driver/receiver unit, which excites the oscillatable unit to oscillate, and/or which receives its oscillations; a control/evaluation unit, which controls the driver/receiver unit, and/or which evaluates the oscillations of the oscillatable unit; and at least one transmitting line and one receiving line between the control/evaluation unit and the driver/receiver unit. At least a third line is provided, which is embodied and arranged in a manner such that it is located between the transmitting line and the receiving line, and is connected with a voltage source, which has an output impedance, which is smaller than the impedance of a condensate bridge.

10. 发明申请

US20050085073A1 Method of using an adhesion precursor layer for chemical vapor deposition (CVD) copper deposition 失效
标题翻译：使用化学气相沉积（CVD）铜沉积的粘附前体层的方法
公开(公告)号：US20050085073A1
公开(公告)日：2005-04-21
申请号：US10687186
申请日：2003-10-16
申请人： Sergey Lopatin , Paul Besser , Alline Myers , Jeremias Romero , Minh Tran , Lu You , Connie Wang
发明人： Sergey Lopatin , Paul Besser , Alline Myers , Jeremias Romero , Minh Tran , Lu You , Connie Wang
IPC分类号： H01L21/44 , H01L21/4763 , H01L21/768
CPC分类号： H01L21/76846 , H01L21/76877
摘要： An exemplary embodiment is related to a method of using an adhesion precursor in an integrated circuit fabrication process. The method includes providing a gas of material over a dielectric material and providing a copper layer over an adhesion precursor layer. The adhesion precursor layer is formed by the gas, and the dielectric material includes an aperture.
摘要翻译：示例性实施例涉及在集成电路制造工艺中使用粘附前体的方法。该方法包括在介电材料上提供材料的气体并在粘附前体层上提供铜层。粘附前体层由气体形成，电介质材料包括孔。

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