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1. 发明授权

US07643981B2 Pulse waveform timing in EinsTLT templates 失效
标题翻译： EinsTLT模板中的脉冲波形定时
公开(公告)号：US07643981B2
公开(公告)日：2010-01-05
申请号：US10897347
申请日：2004-07-22
申请人： Sang Y. Lee , Vasant B. Rao , Jeffrey Soreff , James Warnock , David Winston
发明人： Sang Y. Lee , Vasant B. Rao , Jeffrey Soreff , James Warnock , David Winston
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： The present invention provides for simulating signal transitions. Circuit characteristics are generated. Circuit characteristics are loaded into memory. Circuit behaviour is simulated. A non-leading edge circuit transition is captured. This occurs in software.
摘要翻译：本发明提供了模拟信号转换。产生电路特性。电路特性被加载到存储器中。模拟电路行为。捕获非前沿电路转换。这发生在软件中。

2. 发明授权

US08488329B2 Power and ground vias for power distribution systems 有权
标题翻译：配电系统的电源和接地通孔
公开(公告)号：US08488329B2
公开(公告)日：2013-07-16
申请号：US12776888
申请日：2010-05-10
申请人： Tae H. Kim , Sang Y. Lee , Nam H. Pham
发明人： Tae H. Kim , Sang Y. Lee , Nam H. Pham
IPC分类号： H05K7/00 , H05K1/11
CPC分类号： H05K3/40 , H01L2224/16225 , H01L2924/19105 , H05K1/0265 , H05K1/115 , H05K2201/09854 , Y10T29/49155 , Y10T29/49165
摘要： A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.
摘要翻译：用于为功率分配系统提供电源和接地通孔的系统包括微电子封装上的第一和第二导电层。导电层可以包括一个或多个导电部件，例如但不限于用于电连接到电子部件的电源平面，接地平面，焊盘，迹线等。通孔可以电连接第一和第二导电层。通孔可以具有至少三个部分重叠形状的横截面。每个形状部分地与至少两个其他形状重叠。形状可以是例如圆形，三角形，矩形，正方形，多边形，菱形或任何其它形状。

3. 发明申请

US20130021739A1 Multi-layer Printed Circuit Board With Power Plane Islands To Isolate Noise Coupling 审中-公开
标题翻译：多层印刷电路板与动力平面岛隔离噪声耦合
公开(公告)号：US20130021739A1
公开(公告)日：2013-01-24
申请号：US13187074
申请日：2011-07-20
申请人： Tae Hong Kim , Sang Y. Lee
发明人： Tae Hong Kim , Sang Y. Lee
IPC分类号： G06F1/16 , H05K3/36 , H05K1/11
CPC分类号： H05K1/0227 , H05K1/0243 , H05K2201/093 , H05K2201/09309 , H05K2201/09345 , H05K2201/09663 , Y10T29/49126
摘要： Multi-layer printed circuit boards (PCB) with power plane islands to isolate noise coupling are provided. In addition, methods and computer program products for manufacturing multi-layer PCBs with power plane islands to isolate noise coupling are provided. Embodiments include a PCB comprising a first power plane coupled to a power supply, the first power plane within a layer of the PCB; a second power plane and a third power plane, the second power plane and the third power plane within another layer of the PCB, the second power plane and the third power plane separated from each other within the other layer of the PCB; and a via bridge structure connecting the first power plane to both the second power plane and the third power plane.
摘要翻译：提供了具有电源平面岛以隔离噪声耦合的多层印刷电路板（PCB）。此外，还提供了用于制造具有电源平面岛以隔离噪声耦合的多层PCB的方法和计算机程序产品。实施例包括PCB，其包括耦合到电源的第一电力平面，PCB内的第一电力平面; 第二电力平面和第三电力平面，PCB的另一层内的第二电力平面和第三电力平面，第二电力平面和第三电力平面在PCB的另一层内彼此分离; 以及将第一电力平面连接到第二电力平面和第三电力平面的通孔桥结构。

4. 发明申请

US20130185685A1 TIMING ANALYSIS OF AN ARRAY CIRCUIT CROSS SECTION 失效
标题翻译：阵列电路交叉部分的时序分析
公开(公告)号：US20130185685A1
公开(公告)日：2013-07-18
申请号：US13349325
申请日：2012-01-12
申请人： Shyamkumar Thoziyoor , Tae H. Kim , Sang Y. Lee
发明人： Shyamkumar Thoziyoor , Tae H. Kim , Sang Y. Lee
IPC分类号： G06F17/50
CPC分类号： G06F17/5031 , G06F2217/84
摘要： A method, system or computer usable program product for performing timing analysis on an array circuit including receiving in memory a set of pins to be timed, selecting with a data processor a cross section of the array circuit including the set of pins wherein a backtrace is performed from the set of pins to identify a set of bus groups, each bus group having a plurality of timing pins, and assigning timing for an assigned pin of a first bus group equal to timing calculated for a surrogate pin of the first bus group based on array circuit regularity.
摘要翻译：一种用于对阵列电路进行定时分析的方法，系统或计算机可用程序产品，包括在存储器中接收要定时的一组引脚，用数据处理器选择包括所述一组引脚的阵列电路的横截面，其中回溯是从所述一组引脚执行以识别一组总线组，每个总线组具有多个定时引脚，以及为第一总线组的分配引脚分配等于基于第一总线组的替代引脚的定时的定时阵列电路规律性。

5. 发明申请

US20120020042A1 NOISE SUPPRESSOR FOR SEMICONDUCTOR PACKAGES 有权
标题翻译：噪声抑制器用于半导体封装
公开(公告)号：US20120020042A1
公开(公告)日：2012-01-26
申请号：US12840861
申请日：2010-07-21
申请人： Nickolaus J. Gruendler , Paul M. Harvey , Tae Hong Kim , Sang Y. Lee , Michael J. Shapiro
发明人： Nickolaus J. Gruendler , Paul M. Harvey , Tae Hong Kim , Sang Y. Lee , Michael J. Shapiro
IPC分类号： H05K7/02 , H05K3/30 , H05K3/34 , H05K1/16
CPC分类号： G01L9/12 , H01L2224/16227 , H01L2224/16235 , H01L2924/1531 , H01L2924/3025 , H05K1/0228 , H05K1/0231 , H05K1/0251 , Y10T29/49139 , Y10T29/49142
摘要： One or more decoupling capacitors are coupled to a low inductance mount that is connected to the bottom layer of a printed circuit board (PCB) on which a semiconductor module is mounted. The low inductance mount includes a magnetic planar structure with vias that are coupled to the one or more decoupling capacitors and to like vias positioned on the PCB.
摘要翻译：一个或多个去耦电容器耦合到低电感安装座，该低电感安装件连接到其上安装有半导体模块的印刷电路板（PCB）的底层。低电感安装座包括磁性平面结构，其具有耦合到一个或多个去耦电容器的过孔以及位于PCB上的相似通孔。

6. 发明授权

US07790327B2 Reinfored matrix for molten carbonate fuel cell and method for preparing the same 有权
标题翻译：熔融碳酸盐燃料电池用再生基质及其制备方法
公开(公告)号：US07790327B2
公开(公告)日：2010-09-07
申请号：US11604747
申请日：2006-11-28
申请人： Hyung C. Ham , Seong A. Hong , In-Hwan Oh , Tae-Hoon Lim , Suk-Woo Nam , Sung P. Yoon , Jonghee Han , Jaeyoung Lee , Hyoung-Juhn Kim , Eun A. Cho , Kwang S. Lee , Heung Y. Ha , Sang Y. Lee
发明人： Hyung C. Ham , Seong A. Hong , In-Hwan Oh , Tae-Hoon Lim , Suk-Woo Nam , Sung P. Yoon , Jonghee Han , Jaeyoung Lee , Hyoung-Juhn Kim , Eun A. Cho , Kwang S. Lee , Heung Y. Ha , Sang Y. Lee
IPC分类号： H01M8/14 , H01M8/02
CPC分类号： H01M8/142 , Y02P70/56
摘要： Provided is a reinforced matrix for molten carbonate fuel cell, wherein a mechanical strength of the matrix is increased by adding a reinforcing agent having a low melting point.
摘要翻译：提供了一种用于熔融碳酸盐燃料电池的增强基体，其中通过添加具有低熔点的增强剂来增加基质的机械强度。

7. 发明授权

US5310979A Microwave ovens with infrared rays heating units 失效
标题翻译：带红外线加热单元的微波炉
公开(公告)号：US5310979A
公开(公告)日：1994-05-10
申请号：US985276
申请日：1992-12-03
申请人： Kyung H. Jung , Sang Y. Lee
发明人： Kyung H. Jung , Sang Y. Lee
IPC分类号： F24C7/02 , F24C7/06 , H05B3/44 , H05B6/80 , H05B11/00 , H05B6/64
CPC分类号： H05B6/6482 , F24C7/06
摘要： An infrared heating unit for a microwave oven comprises an outer envelope in which an electrical heating coil is mounted. The heating coil comprises a series of loops. A group of loops located in a central section of the coil has a pitch interval greater than that of the loops located in end sections of the coil, whereby less heat is generated by the loops located in the central station.
摘要翻译：用于微波炉的红外线加热单元包括外壳，其中安装有电加热线圈。加热线圈包括一系列环。位于线圈的中心部分的一组环路的间距间隔大于位于线圈端部的环路的间距，由此位于中心站的环路产生较少的热量。

8. 发明申请

US20110273855A1 POWER AND GROUND VIAS FOR POWER DISTRIBUTION SYSTEMS 有权
标题翻译：电力分配系统的电力和地面VIAS
公开(公告)号：US20110273855A1
公开(公告)日：2011-11-10
申请号：US12776888
申请日：2010-05-10
申请人： Tae Hong Kim , Sang Y. Lee , Nam H. Pham
发明人： Tae Hong Kim , Sang Y. Lee , Nam H. Pham
IPC分类号： H05K7/00 , H05K1/16 , H05K3/10 , H05K1/11
CPC分类号： H05K3/40 , H01L2224/16225 , H01L2924/19105 , H05K1/0265 , H05K1/115 , H05K2201/09854 , Y10T29/49155 , Y10T29/49165
摘要： A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.
摘要翻译：用于为功率分配系统提供电源和接地通孔的系统包括微电子封装上的第一和第二导电层。导电层可以包括一个或多个导电部件，例如但不限于用于电连接到电子部件的电源平面，接地平面，焊盘，迹线等。通孔可以电连接第一和第二导电层。通孔可以具有至少三个部分重叠形状的横截面。每个形状部分地与至少两个其他形状重叠。形状可以是例如圆形，三角形，矩形，正方形，多边形，菱形或任何其它形状。

9. 发明授权

US5617336A Method for checking top and end of tape for data recording and reproducing apparatus 失效
标题翻译：用于检查数据记录和再现装置的磁带的顶端和末端的方法
公开(公告)号：US5617336A
公开(公告)日：1997-04-01
申请号：US330564
申请日：1994-10-28
申请人： Sang Y. Lee
发明人： Sang Y. Lee
IPC分类号： G11B15/08 , G11B15/093 , G11B27/17 , G11B27/34 , G11B15/00
CPC分类号： G11B15/08 , G11B15/093 , G11B27/17 , G11B27/34 , G11B2220/90
摘要： A method for checking top and end of tape for data recording and reproducing apparatus is disclosed. The method includes a first step for sensing a transparent tape section of a start portion of a tape wound about a tape take-up reel so as to sense the tape top. At a second step, a tape supply reel rotation period is detected and the detected supply reel rotation period is compared to a preset value. When the detected supply reel rotation period is not longer than the preset value, the tape end is checked at a predetermined period. However, when the detected supply reel rotation period is longer than the preset value, no tape end is checked. The method makes top-end checking time become optimal and saves power of the recording and reproducing apparatus, and reduces pulse noise generated in turning on or turning off the top-end checking LED.
摘要翻译：公开了一种用于检查用于数据记录和再现装置的磁带的顶端和末端的方法。该方法包括第一步骤，用于感测缠绕在卷取卷轴上的带的起始部分的透明带部分，以便感测带顶。在第二步骤中，检测到磁带供应卷轴旋转周期，并将检测到的供应卷轴旋转周期与预设值进行比较。当检测到的供带盘旋转周期不大于预设值时，在预定的周期检查带端。然而，当检测到的供带盘旋转周期大于预设值时，不检查磁带端。该方法使得顶端检查时间变得最佳，并且节省了记录和再现设备的功率，并且减少了打开或关闭顶端检查LED时产生的脉冲噪声。

10. 发明授权

US5292511A Process for manufacturing a health-supplementary food containing aloe as an active ingredient 失效
标题翻译：制造含有芦荟作为活性成分的健康补充食品的方法
公开(公告)号：US5292511A
公开(公告)日：1994-03-08
申请号：US989540
申请日：1992-12-11
申请人： Il C. Kim , Sang Y. Lee , Chang W. Choi
发明人： Il C. Kim , Sang Y. Lee , Chang W. Choi
IPC分类号： A23L1/00 , A23L1/212 , A23L1/23 , A23L1/30 , A61K36/886 , C12G3/02 , A61K35/78
CPC分类号： C12G3/02 , A23L27/24
摘要： A process for manufacturing a health-supplementary food containing aloe as an active ingredient, including, in the order recited, the steps of washing aloe, fresh leaf vegetables including kale, root vegetables including carrot, and fruit including tomato thoroughly with water; pulverizing from 70 to 85 wt. % of aloe, from 10 to 20 wt. % of leaf vegetables including kale, from 5 to 15 wt. % of root vegetables and fruit including, respectively, carrot and tomato, into pieces having a length of 2 cm or less using a chopper to provide a pulverized mixture; mixing sugar with the pulverized mixture to provide a sugar concentration for the mixture of from 15 to 37.5 Brix; innoculating the mixture with from 2 to 5% by weight of a starter per 100% by weight of total starting materials, the starter having been cultured from a strain of Lactobacillus family grown in an MRS medium, in a fermenter at a temperature ranging from 20.degree. to 35.degree. C.; fermenting the mixture for from 48 to 96 hours, stopping fermentation when the mixture has a pH ranging from 3.2 to 3.7; squeezing the mixture using a press to obtain a fermented liquid, admixing additional sugar with the fermented liquid until homogenized to maintain the sugar concentration at a range of from 50 to 60 Brix; and aging the mixture at room temperature for several months.
摘要翻译：一种含有芦荟作为活性成分的健康补充食品的制造方法，其特征在于，包括以下步骤：用水清洗芦荟，包括羽衣甘蓝的新鲜蔬菜，包括胡萝卜在内的根系蔬菜，包括番茄在内的水果; 粉碎70至85wt。％的芦荟，10至20wt。百分比的叶菜，包括羽衣甘蓝，从5至15重量％％的根蔬菜和水果分别包括胡萝卜和番茄，使用切碎机成长为2cm或更小的碎片以提供粉碎的混合物; 将糖与粉碎的混合物混合以提供15至37.5Brix的混合物的糖浓度; 以每100重量％的总起始原料将起始剂与2至5重量％的起始物接触混合物，起始物已经在发酵罐中生长在MRS培养基中的乳杆菌家族菌株在20℃ 摄氏35度。将混合物发酵48至96小时，当混合物的pH为3.2〜3.7时停止发酵; 使用压机挤压混合物以获得发酵液体，将额外的糖与发酵液混合直到均质化，以将糖浓度维持在50至60白利糖度的范围内; 并将混合物在室温下老化数月。

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