专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07333448B2 Full duplex transceiver 有权
标题翻译：全双工收发器
公开(公告)号：US07333448B2
公开(公告)日：2008-02-19
申请号：US10699761
申请日：2003-11-03
申请人： Sandeep Kumar Gupta , Sanjay Kasturia , Jose Tellado
发明人： Sandeep Kumar Gupta , Sanjay Kasturia , Jose Tellado
IPC分类号： H04B3/20
CPC分类号： H04L25/14 , H04L5/1423
摘要： The invention includes a full duplex transceiver for transmitting and receiving communication signals. The transceiver includes 1 to N sample and hold circuits. Each sample and hold circuit receives a first signal that includes a far-end signal, and in some cases an echo signal, and in some cases alternatively or additionally cross-talk signals. The transceiver additionally includes a plurality of subtraction circuits. Each subtraction circuit receives an output of at least one of the sample and hold circuits. Each subtraction circuit subtracts at least a fraction of a replica signal from at least a fraction of the output of the at least one of the sample and hold circuits. The subtraction circuits generate an output that represent the far-end signal with substantially reduced echo and/or cross-talk interference, and is available for additional receiver processing.
摘要翻译：本发明包括用于发送和接收通信信号的全双工收发器。收发器包括1到N个采样和保持电路。每个采样和保持电路接收包括远端信号的第一信号，并且在某些情况下接收回波信号，并且在一些情况下接收或附加的串扰信号。收发器还包括多个减法电路。每个减法电路接收至少一个采样和保持电路的输出。每个减法电路从至少一个采样和保持电路的输出的至少一部分中减去副本信号的至少一部分。减法电路产生表示具有显着减少的回声和/或串扰干扰的远端信号的输出，并且可用于额外的接收机处理。

2. 发明授权

US08279912B2 Tranceiver non-linearity cancellation 有权
标题翻译： Tranceiver非线性取消
公开(公告)号：US08279912B2
公开(公告)日：2012-10-02
申请号：US11373928
申请日：2006-03-13
申请人： Dariush Dabiri , Jose Tellado , Sandeep Kumar Gupta
发明人： Dariush Dabiri , Jose Tellado , Sandeep Kumar Gupta
IPC分类号： H04B1/38 , H04B1/40 , H03K9/00
CPC分类号： H04L5/1423 , H04B3/23
摘要： Embodiments of a method and apparatus for reducing non-linear transmit signal components of a receive signal of a transceiver signal are disclosed. The method includes the transceiver simultaneously transmitting a transmit signal, and receiving the receive signal. A non-linear replica signal of non-linear transmission signal components that are created in the transceiver by a transmit signal DAC, and imposed onto the receive signal, is generated. The non-linear replica signal is subtracted from the received signal reducing the non-linear transmission signal components imposed onto the receive signal.
摘要翻译：公开了一种用于减少收发信机的接收信号的非线性发送信号分量的方法和装置的实施例。该方法包括收发机同时发送发送信号，并接收接收信号。产生通过发送信号DAC在收发器中产生且施加到接收信号上的非线性传输信号分量的非线性复制信号。从接收到的信号中减去非线性复制信号，减少施加在接收信号上的非线性传输信号分量。

3. 发明授权

US07720015B2 Receiver ADC clock delay base on echo signals 有权
标题翻译：接收器ADC时钟延迟基于回波信号
公开(公告)号：US07720015B2
公开(公告)日：2010-05-18
申请号：US11205615
申请日：2005-08-17
申请人： Sandeep Kumar Gupta , Jose Tellado
发明人： Sandeep Kumar Gupta , Jose Tellado
IPC分类号： H04B3/20
CPC分类号： H04B3/23
摘要： A device and method for a full-duplex transceiver is disclosed. The transceiver includes a transmitter DAC coupled to a transmission channel. The transmit DAC converting a digital transmission signal into an analog transmission signal. The transceiver further includes a receiver connected to the transmission channel. The receiver receives a desired signal and an echo signal, in which the echo signal includes at least a portion of the analog transmission signal. The receiver includes a receiver ADC, a programmable delay line for adjustably delaying a clock signal of the ADC, and a receiver processing circuit for adjusting the delay of the clock signal based at least in part upon the echo signal.
摘要翻译：公开了一种用于全双工收发器的装置和方法。收发器包括耦合到传输信道的发射机DAC。发送DAC将数字传输信号转换为模拟传输信号。收发机还包括连接到传输信道的接收机。接收器接收期望的信号和回波信号，其中回波信号包括模拟传输信号的至少一部分。接收器包括接收器ADC，用于可调延迟ADC的时钟信号的可编程延迟线，以及用于至少部分地基于回波信号调整时钟信号的延迟的接收机处理电路。

4. 发明授权

US07782852B2 Multiple modulation rate 10Gbase-T transmission 有权
标题翻译：多调制速率10Gbase-T传输
公开(公告)号：US07782852B2
公开(公告)日：2010-08-24
申请号：US11247805
申请日：2005-10-11
申请人： Jose Tellado , Sanjay Kasturia
发明人： Jose Tellado , Sanjay Kasturia
IPC分类号： H04L12/56
CPC分类号： H04L27/0008 , H04L1/0003 , H04L1/0026 , H04L1/0057 , H04L1/007
摘要： A device and method of high-speed transmission is disclosed. The method includes computing a signal quality of a received signal, the received signal being transmitted with a modulation order required by a default transmission modulation format. The signal quality is compared with a signal quality threshold required of the default transmission modulation format. If the signal quality is below the signal quality threshold, an indication of a level of signal quality failure is provided to a transmitter. The transmitter sets a number of un-coded bits within the transmission signal based upon the level of signal quality failure.
摘要翻译：公开了一种高速传输的装置和方法。该方法包括计算接收信号的信号质量，接收信号以默认传输调制格式所要求的调制次序发射。将信号质量与默认传输调制格式所需的信号质量阈值进行比较。如果信号质量低于信号质量阈值，则向发射机提供信号质量故障水平的指示。发射机基于信号质量故障的级别来设置传输信号内的多个未编码比特。

5. 发明授权

US07646699B2 Transceiver power backoff 有权
标题翻译：收发器功率回馈
公开(公告)号：US07646699B2
公开(公告)日：2010-01-12
申请号：US11303364
申请日：2005-12-16
申请人： Jose Tellado , Sanjay Kasturia
发明人： Jose Tellado , Sanjay Kasturia
IPC分类号： H04J1/12
CPC分类号： H04B1/0475 , H04B3/487 , H04M3/34
摘要： A device and method of setting transmit power backoff of a transceiver within a network is disclosed. The method includes estimating a channel loss of a channel of the transceiver, obtaining channel loss information, the channel loss information including estimates of channel loss of other channels of the network, obtaining crosstalk information, the crosstalk information including estimates of crosstalk between the channel and other channels of the network, and setting the power backoff based on the channel loss of the channel, the channel information, and the crosstalk information.
摘要翻译：公开了一种在网络内设置收发机的发射功率回退的装置和方法。该方法包括估计收发信道的信道丢失，获得信道丢失信息，信道丢失信息，包括网络其他信道的信道丢失估计，获得串扰信息，串扰信息包括信道和网络的其他信道，并且基于信道的信道丢失，信道信息和串扰信息来设置功率回退。

6. 发明申请

US20070140289A1 Transceiver power backoff 有权
标题翻译：收发器功率回馈
公开(公告)号：US20070140289A1
公开(公告)日：2007-06-21
申请号：US11303364
申请日：2005-12-16
申请人： Jose Tellado , Sanjay Kasturia
发明人： Jose Tellado , Sanjay Kasturia
IPC分类号： H04B1/44 , H04L12/413 , H04J3/06
CPC分类号： H04B1/0475 , H04B3/487 , H04M3/34
摘要： A device and method of setting transmit power backoff of a transceiver within a network is disclosed. The method includes estimating a channel loss of a channel of the transceiver, obtaining channel loss information, the channel loss information including estimates of channel loss of other channels of the network, obtaining crosstalk information, the crosstalk information including estimates of crosstalk between the channel and other channels of the network, and setting the power backoff based on the channel loss of the channel, the channel information, and the crosstalk information.
摘要翻译：公开了一种在网络内设置收发机的发射功率回退的装置和方法。该方法包括估计收发信道的信道丢失，获得信道丢失信息，信道丢失信息，包括网络其他信道的信道丢失估计，获得串扰信息，串扰信息包括信道和网络的其他信道，并且基于信道的信道丢失，信道信息和串扰信息来设置功率回退。

7. 发明授权

US07366231B2 Sub-block domain transformation multiple signal processing 有权
标题翻译：子块域转换多信号处理
公开(公告)号：US07366231B2
公开(公告)日：2008-04-29
申请号：US10816409
申请日：2004-04-01
申请人： Jose Tellado , Sanjay Kasturia , Eran Cohan
发明人： Jose Tellado , Sanjay Kasturia , Eran Cohan
IPC分类号： H04B1/38
CPC分类号： H04B3/56 , H04B3/32 , H04B2203/5425 , H04B2203/5445 , H04B2203/5487 , H04B2203/5491 , H04B2203/5495 , H04L25/03006
摘要： Embodiments of an Ethernet transceiver are disclosed. The Ethernet transceiver includes a plurality of digital signal streams, at least one digital signal stream being coupled to another of the digital signal streams. A domain transformer transforms sub-blocks of each of the plurality of the digital signal streams from an original domain into a lower complexity domain. A processor joint processes the transformed sub-blocks of the digital signal streams, each joint processed digital signal stream sub-block is influenced by other digital signal streams sub-blocks. An inverse transformer inverse transforms the joint processed signal streams sub-blocks back to the original domain.
摘要翻译：公开了以太网收发器的实施例。以太网收发器包括多个数字信号流，至少一个数字信号流耦合到数字信号流中的另一个。域变换器将多个数字信号流中的每一个的子块从原始域变换为较低复杂度的域。处理器联合处理数字信号流的变换子块，每个联合处理的数字信号流子块受到其它数字信号流子块的影响。逆变换器将联合处理的信号流子块逆变换回原始域。

8. 发明授权

US07227883B2 Method and apparatus for domain transformation multiple signal processing 有权
标题翻译：用于域变换多信号处理的方法和装置
公开(公告)号：US07227883B2
公开(公告)日：2007-06-05
申请号：US10695166
申请日：2003-10-28
申请人： Jose Tellado , Sanjay Kasturia , Eran Cohan
发明人： Jose Tellado , Sanjay Kasturia , Eran Cohan
IPC分类号： H04B1/00 , H04B3/20
CPC分类号： H04B3/32 , H04L25/03006
摘要： A transceiver is disclosed. The transceiver includes a plurality of digital signal streams, wherein at least one digital signal stream is coupled to another of the digital signal streams. A transform block transforms a plurality of the digital signal streams from an original domain into a lower complexity processing domain. A processor joint processes the transformed digital signal streams, each joint processed digital signal stream being influenced by other digital signal streams. An inverse transform block inverse transforms the joint processed signal streams back to the original domain. A method of joint processing a plurality of digital signal streams is also disclosed. A first act of the method includes transforming a plurality of the digital signal streams from an original domain into a lower complexity processing domain. A second act of the method includes joint processing of the transformed digital signal streams, each joint processed digital signal stream being influenced by characteristics of other digital signal streams. A third act includes inverse transforming the joint processed signal streams back to the original domain.
摘要翻译：公开了一种收发器。收发器包括多个数字信号流，其中至少一个数字信号流耦合到另一个数字信号流。变换块将多个数字信号流从原始域转换为较低复杂度的处理域。处理器联合处理变换的数字信号流，每个联合处理的数字信号流受其他数字信号流的影响。逆变换块将联合处理的信号流逆向转换回原始域。还公开了一种联合处理多个数字信号流的方法。该方法的第一动作包括将多个数字信号流从原始域变换为较低复杂度的处理域。该方法的第二动作包括对经变换的数字信号流的联合处理，每个联合处理的数字信号流受到其它数字信号流的特性的影响。第三动作包括将联合处理的信号流逆向变换回原始域。

9. 发明申请

US20050289204A1 Parallel feedback processing 审中-公开
标题翻译：并行反馈处理
公开(公告)号：US20050289204A1
公开(公告)日：2005-12-29
申请号：US10880052
申请日：2004-06-29
申请人： Jose Tellado , Glenn Golden , Sanjay Kasturia , Jeffrey Hill , John Dring
发明人： Jose Tellado , Glenn Golden , Sanjay Kasturia , Jeffrey Hill , John Dring
IPC分类号： G06F7/00 , G06F7/72
CPC分类号： G06F7/724
摘要： Embodiments of a parallel feedback processor are disclosed. The parallel feedback processor includes a plurality of parallel coupled feedback filters. Each feedback filter includes a non-linear operator. At least one of feedback filter includes a plurality of sub-filters. Each sub-filter computes a one of possible non-linear operator filter outputs of the at least one feedback filter. One sub-filter output is selected as an output of the at least one feedback filter.
摘要翻译：公开了并行反馈处理器的实施例。并行反馈处理器包括多个并联耦合的反馈滤波器。每个反馈滤波器包括非线性算子。反馈滤波器中的至少一个包括多个子滤波器。每个子滤波器计算至少一个反馈滤波器的可能的非线性算子滤波器输出中的一个。选择一个子滤波器输出作为至少一个反馈滤波器的输出。

10. 发明申请

US20050089101A1 Sub-block domain transformation multiple signal processing 有权
标题翻译：子块域转换多信号处理
公开(公告)号：US20050089101A1
公开(公告)日：2005-04-28
申请号：US10816409
申请日：2004-04-01
申请人： Jose Tellado , Sanjay Kasturia , Eran Cohan
发明人： Jose Tellado , Sanjay Kasturia , Eran Cohan
IPC分类号： H04B20060101 , H04B1/66 , H04B3/32 , H04B3/56 , H04J11/00 , H04L25/03
CPC分类号： H04B3/56 , H04B3/32 , H04B2203/5425 , H04B2203/5445 , H04B2203/5487 , H04B2203/5491 , H04B2203/5495 , H04L25/03006
摘要： Embodiments of an Ethernet transceiver are disclosed. The Ethernet transceiver includes a plurality of digital signal streams, at least one digital signal stream being coupled to another of the digital signal streams. A domain transformer transforms sub-blocks of each of the plurality of the digital signal streams from an original domain into a lower complexity domain. A processor joint processes the transformed sub-blocks of the digital signal streams, each joint processed digital signal stream sub-block is influenced by other digital signal streams sub-blocks. An inverse transformer inverse transforms the joint processed signal streams sub-blocks back to the original domain.
摘要翻译：公开了以太网收发器的实施例。以太网收发器包括多个数字信号流，至少一个数字信号流耦合到数字信号流中的另一个。域变换器将多个数字信号流中的每一个的子块从原始域变换为较低复杂度的域。处理器联合处理数字信号流的变换子块，每个联合处理的数字信号流子块受到其它数字信号流子块的影响。逆变换器将联合处理的信号流子块逆变换回原始域。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式