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    • 5. 发明申请
    • SEMICONDUCTOR DEVICE AND PRODUCING METHOD THEREOF
    • 半导体器件及其制造方法
    • US20100207209A1
    • 2010-08-19
    • US12563298
    • 2009-09-21
    • Hideki Inokuma
    • Hideki Inokuma
    • H01L29/786H01L21/336
    • H01L29/785H01L29/66795H01L29/7843H01L29/7848
    • A semiconductor device having a small parasitic resistance and a high driving current is provided. The semiconductor device includes a fin portion that includes a pair of source/drain regions located on both end sides and a channel region sandwiched between the pair of source/drain regions; films that are formed on both sides in a channel-width direction of the fin portion; a gate electrode that is provided so as to stride across the channel region of the fin portion; a gate insulating film that is interposed between the gate electrode and the channel region; and a stress applying layer that applies a stress to the channel region of the fin portion, an upper surface and side surfaces of the source/drain region being coated with the stress applying layer in the fin portion, a lower end surface of the stress applying layer being in contact with the film with no gap.
    • 提供具有小寄生电阻和高驱动电流的半导体器件。 半导体器件包括鳍部,其包括位于两端侧的一对源极/漏极区域和夹在该对源极/漏极区域之间的沟道区域; 在翅片部分的通道宽度方向上形成在两侧的膜; 栅电极,其设置成跨越所述鳍部的沟道区域; 介于栅电极和沟道区之间的栅极绝缘膜; 以及应力施加层,其对所述翅片部分的所述沟道区域施加应力,所述源极/漏极区域的上表面和侧表面在所述翅片部分中涂覆有所述应力施加层,所述应力施加的下端面 层与膜没有间隙地接触。
    • 8. 发明授权
    • Method of fabricating semiconductor device having semiconductor elements
    • 制造具有半导体元件的半导体器件的方法
    • US07947554B2
    • 2011-05-24
    • US11905302
    • 2007-09-28
    • Hideki Inokuma
    • Hideki Inokuma
    • H01L21/8242H01L21/20
    • H01L21/823412H01L21/823468H01L21/823475H01L21/823481H01L29/6653H01L29/6656H01L29/78H01L29/7843H01L2924/0002H01L2924/00
    • According to an aspect of the invention, there is provided a semiconductor device including a first semiconductor element formed on a semiconductor substrate and using electrons as carriers, and a second semiconductor element formed on the semiconductor substrate and using holes as carriers, a first insulating film and a second insulating film formed on source/drain regions and gate electrodes of the first element and the second element, the first insulating film having tensile stress with respect to the first element, and the second insulating film having compression stress with respect to the second element, and sidewall spacers of the gate electrodes of the first element and the second element, at least portions of the sidewall spacers being removed, wherein at least one of the first insulating film and the second insulating film does not close a spacing between the gate electrodes of the first element and the second element.
    • 根据本发明的一个方面,提供了一种半导体器件,包括形成在半导体衬底上并使用电子作为载体的第一半导体元件和形成在半导体衬底上并使用空穴作为载流子的第二半导体元件,第一绝缘膜 以及形成在所述第一元件和所述第二元件的源极/漏极区域和栅电极上的第二绝缘膜,所述第一绝缘膜相对于所述第一元件具有拉伸应力,并且所述第二绝缘膜相对于所述第二元件具有压缩应力 第一元件和第二元件的栅电极的元件和侧壁间隔物,至少部分侧壁间隔物被去除,其中第一绝缘膜和第二绝缘膜中的至少一个没有闭合栅极之间的间隔 第一元件和第二元件的电极。