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    • 6. 发明申请
    • Method to selectively correct critical dimension errors in the semiconductor industry
    • 有选择地纠正半导体行业关键尺寸误差的方法
    • US20060019412A1
    • 2006-01-26
    • US10710602
    • 2004-07-23
    • Jed RankinAndrew Watts
    • Jed RankinAndrew Watts
    • H01L21/66
    • G03F7/203G03F7/70425G03F7/7045G03F7/70608G03F7/70625
    • A method to correct critical dimension errors during a semiconductor manufacturing process. The method includes providing a first semiconductor device. The first semiconductor device is analyzed to determine at least one critical dimension error within the first semiconductor device. A dose of electron beam exposure to correct the at least one critical dimension error during a subsequent process to form a second semiconductor device, or during modification of the first semiconductor device is determined. The subsequent process comprises providing a semiconductor structure. The semiconductor structure comprises a photoresist layer on a semiconductor substrate. A plurality of features are formed in the photoresist layer. At least one feature of the plurality of features comprises the at least one critical dimension error. The at least one feature comprising the critical dimension error is corrected by exposing the at least one feature to an electron beam comprising the dose of electron beam exposure, resulting in reduction of the size, or shrinkage, of the at least one feature comprising a critical dimension error.
    • 一种在半导体制造过程中校正关键尺寸误差的方法。 该方法包括提供第一半导体器件。 分析第一半导体器件以确定第一半导体器件内的至少一个临界尺寸误差。 确定在后续处理中形成第二半导体器件或在修改第一半导体器件期间校正至少一个临界尺寸误差的电子束曝光剂量。 随后的工艺包括提供半导体结构。 半导体结构包括半导体衬底上的光致抗蚀剂层。 在光致抗蚀剂层中形成多个特征。 多个特征中的至少一个特征包括至少一个临界尺寸误差。 包括临界尺寸误差的至少一个特征通过将至少一个特征暴露于包括电子束暴露的剂量的电子束来校正,导致包括关键的至少一个特征的至少一个特征的尺寸或收缩的减小 尺寸误差。
    • 7. 发明申请
    • VLAN TAGGING OVER IPSec TUNNELS
    • VLAN标签超过IPSec隧道
    • US20100228974A1
    • 2010-09-09
    • US12396505
    • 2009-03-03
    • Andrew WattsBruce W. Yancy
    • Andrew WattsBruce W. Yancy
    • H04L9/32H04L12/28
    • H04L12/4666H04L12/4633H04L63/0272H04L63/164H04L69/22
    • In accordance with a nonlimiting example, a network device transfers communications data along a communications channel within an Internet Protocol (IP) network. A communications module includes a signal input connected to the communications channel of the IP network and receives an Ethernet packet having an Ethernet header and IP data. A processor is coupled to the communications module and processes the Ethernet packet. It removes the Ethernet header and adds Virtual Local Area Network (VLAN) tagging information to a padding section in the packet. In one aspect, the processor includes an encryption module that encrypts the VLAN tagging information along with the IP data. The network device includes a signal output through which the packet is transferred to a destination within the IP network over the communications channel as an IPSec tunnel.
    • 根据非限制性示例,网络设备沿着因特网协议(IP)网络内的通信信道传送通信数据。 通信模块包括连接到IP网络的通信信道的信号输入,并且接收具有以太网报头和IP数据的以太网分组。 处理器耦合到通信模块并处理以太网分组。 它删除以太网头,并将虚拟局域网(VLAN)标记信息添加到数据包中的填充部分。 一方面,处理器包括加密模块,其与IP数据一起加密VLAN标签信息。 网络设备包括信号输出,通过该信号输出通过通信信道将分组传送到IP网络内的目的地作为IPSec隧道。
    • 8. 发明授权
    • VLAN tagging over IPSec tunnels
    • VLAN标记在IPSec隧道上
    • US08181009B2
    • 2012-05-15
    • US12396505
    • 2009-03-03
    • Andrew WattsBruce W. Yancy
    • Andrew WattsBruce W. Yancy
    • H04L29/06
    • H04L12/4666H04L12/4633H04L63/0272H04L63/164H04L69/22
    • In accordance with a nonlimiting example, a network device transfers communications data along a communications channel within an Internet Protocol (IP) network. A communications module includes a signal input connected to the communications channel of the IP network and receives an Ethernet packet having an Ethernet header and IP data. A processor is coupled to the communications module and processes the Ethernet packet. It removes the Ethernet header and adds Virtual Local Area Network (VLAN) tagging information to a padding section in the packet. In one aspect, the processor includes an encryption module that encrypts the VLAN tagging information along with the IP data. The network device includes a signal output through which the packet is transferred to a destination within the IP network over the communications channel as an IPSec tunnel.
    • 根据非限制性示例,网络设备沿着因特网协议(IP)网络内的通信信道传送通信数据。 通信模块包括连接到IP网络的通信信道的信号输入,并且接收具有以太网报头和IP数据的以太网分组。 处理器耦合到通信模块并处理以太网分组。 它删除以太网头,并将虚拟局域网(VLAN)标记信息添加到数据包中的填充部分。 一方面,处理器包括加密模块,其与IP数据一起加密VLAN标签信息。 网络设备包括信号输出,通过该信号输出通过通信信道将分组传送到IP网络内的目的地作为IPSec隧道。
    • 9. 发明申请
    • MONOLITHIC HARD PELLICLE
    • 单晶硬壳
    • US20050243452A1
    • 2005-11-03
    • US10709326
    • 2004-04-28
    • Emily GallagherRogert LeidyMichael LercelKenneth RacetteAndrew Watts
    • Emily GallagherRogert LeidyMichael LercelKenneth RacetteAndrew Watts
    • G03F1/14G02B5/22G03F7/00G03F7/20
    • G03F1/64G03F1/62G03F7/70983
    • A monolithic optical pellicle and method of making used to protect a photomask during photolithography processing. The monolithic optical pellicle is comprised of a pellicle plate having a recessed central portion integrally formed with a perimeter frame of the pellicle plate such that it is a one-piece optical pellicle. The monolithic optical pellicle comprises a material of sufficient rigidity to minimize distortions in and maximize durability of the pellicle when used in combination with the recessed portion having a thickness that prevents sagging thereof due to applied forces on the resultant monolithic optical pellicle. This recessed central portion is the optical pellicle portion of the present monolithic optical pellicle, while the integral perimeter frame is used to attach the monolithic optical pellicle at the desired stand-off distance to a photomask. The monolithic optical pellicle preferably comprises a material that is transparent to an exposure field at about 157 nm wavelengths.
    • 一种单片光学防护薄膜和用于在光刻处理期间保护光掩模的方法。 单片光学防护薄膜组件由具有与防护薄膜组件的周边框架一体形成的凹形中心部分的防护薄膜组成,使得它是一体的光学防护薄片组件。 单片光学防护薄膜组件包括足够刚度的材料,以最小化防护薄膜组件的失真并最大化耐久性的材料,当与具有防止由于所得单片光学防护薄膜组件上施加的力而下垂的凹陷部分组合时。 这个凹陷的中心部分是本单片光学防护薄膜的光学防护薄膜部分,而整体的周边框架用于以一个光掩模的所需的间隔距离连接单片光学薄膜。 单片光学防护薄膜优选包括对于约157nm波长的曝光场透明的材料。
    • 10. 发明申请
    • COMMON SECOND LEVEL FRAME EXPOSURE FOR EMBEDDED ATTENUATED PHASE SHIFT MASKS
    • 共同第二级框架曝光用于嵌入式衰减相移屏蔽
    • US20050170261A1
    • 2005-08-04
    • US10708010
    • 2004-02-02
    • Andrew Watts
    • Andrew Watts
    • G03C5/00G03F1/00G03F9/00
    • G03F1/32
    • A method of making an embedded attenuated phase shift mask (EAPSM) comprises initially providing a phase shift mask substrate having a layer of phase shifting material and a layer of an opaque material, and depositing a first resist layer on the substrate. The first resist layer is exposed by a direct write electron beam or laser energy source and developed, and the substrate is etched, to create first level phase shifting image segments on the substrate corresponding to areas of critical structures to be exposed with the EAPSM. The method then includes depositing a second resist layer on the substrate. Using a single frame exposure mask corresponding to non-critical areas outside the critical structure areas, the second resist layer is then exposed by simultaneous projection exposure. The method then includes developing the second resist layer and etching the substrate to remove the opaque material from the critical structure areas.
    • 制造嵌入式衰减相移掩模(EAPSM)的方法包括:首先提供具有相移材料层和不透明材料层的相移掩模衬底,以及在衬底上沉积第一抗蚀剂层。 第一抗蚀剂层通过直接写入电子束或激光能量源曝光并显影,并且蚀刻衬底,以在衬底上形成对应于要与EAPSM一起曝光的关键结构区域的第一级移相图像段。 该方法然后包括在衬底上沉积第二抗蚀剂层。 使用对应于临界结构区域之外的非关键区域的单个帧曝光掩模,然后通过同时投影曝光来曝光第二抗蚀剂层。 该方法然后包括显影第二抗蚀剂层并蚀刻基底以从关键结构区域去除不透明材料。