专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08170420B2 Changing hardware settings based on data preamble 有权
标题翻译：根据数据前导码改变硬件设置
公开(公告)号：US08170420B2
公开(公告)日：2012-05-01
申请号：US12206231
申请日：2008-09-08
申请人： Marcus Schorpp , Markus Muller , Dirk Uffmann
发明人： Marcus Schorpp , Markus Muller , Dirk Uffmann
IPC分类号： H04B10/00 , H04B1/00
CPC分类号： H04L25/4902 , H04W28/18 , H04W28/22 , H04W52/0229 , H04W88/06
摘要： The present invention provides a new and unique method and apparatus for a new data speed switching scheme for a wired data interface. The method features receiving high-speed serial data over a physical link using a first coding scheme in a receiver; receiving a transmission mode change signal transmitted with sequential information about a change in a data transmission mode of the receiver using a second coding scheme and switching the data transmission mode of the receiver in response thereto. The data transmission modes may include at least one low-power mode where no data transmission is possible and the receiver is powered down. The at least one low-power mode may include two different power down states, each having different wake-up times. The data transmission modes may also include at least one high speed mode where data transmission is possible and the receiver is on. The at least one high speed mode may include several high speed modes, each having different data transmission rates.
摘要翻译：本发明提供了一种用于有线数据接口的新的数据速度切换方案的新颖且唯一的方法和装置。该方法特征在接收机中使用第一编码方案在物理链路上接收高速串行数据; 接收利用第二编码方式接收与接收机的数据发送模式有关的变化的顺序信息而发送的发送模式变更信号，并对其进行接收的数据发送模式的切换。数据传输模式可以包括至少一个低功率模式，其中不能进行数据传输并且接收机断电。至少一个低功率模式可以包括两个不同的掉电状态，每个具有不同的唤醒时间。数据传输模式还可以包括至少一个高速模式，其中数据传输是可能的并且接收器处于打开状态。至少一个高速模式可以包括几种高速模式，每种模式具有不同的数据传输速率。

2. 发明申请

US20080169511A1 Dual Gate Cmos Fabrication 有权
标题翻译：双门Cmos制作
公开(公告)号：US20080169511A1
公开(公告)日：2008-07-17
申请号：US11573346
申请日：2005-08-01
申请人： Markus Muller , Peter Stolk
发明人： Markus Muller , Peter Stolk
IPC分类号： H01L29/78 , H01L21/3205
CPC分类号： H01L21/28097 , H01L21/823842 , H01L29/4933 , H01L29/4975 , H01L29/66545
摘要： The invention relates to a method of fabricating a CMOS device, comprising providing a semiconductor substrate (101) having therein a layer of insulating material (102), the method comprising providing a layer (106) of a first material over the insulating layer (102), the thickness of the layer (106) of the first material being less in a first region (103) for supporting a first active device than in a second region (104) for supporting a second active device. A layer (107) of a second material is then deposited over the layer (106) of a first material, and the structure is then subjected to a thermal treatment to alloy the first and second materials. The portion of the layers over the first region is entirely alloyed, whereas the portion of the layers over the second region is not, so that a portion (109) of the layer (106) of the first material remains.
摘要翻译：本发明涉及一种制造CMOS器件的方法，包括提供其中具有绝缘材料层（102）的半导体衬底（101），所述方法包括在所述绝缘层（102）上提供第一材料层（106）），第一材料的层（106）的厚度在用于支撑第一有源器件的第一区域（103）中比在用于支撑第二有源器件的第二区域（104）中更小。然后将第二材料的层（107）沉积在第一材料的层（106）上，然后对该结构进行热处理以使第一和第二材料合金化。第一区域上的层的部分完全合金化，而在第二区域上的部分层不是，使得第一材料的层（106）的一部分（109）保留。

3. 发明申请

US20060090699A1 Thermal spraying apparatus and also a thermal spraying process 有权
标题翻译：热喷涂设备和热喷涂工艺
公开(公告)号：US20060090699A1
公开(公告)日：2006-05-04
申请号：US11253336
申请日：2005-10-18
申请人： Markus Muller
发明人： Markus Muller
IPC分类号： C23C16/00 , B05B5/025 , B05D1/08
CPC分类号： C23C4/12 , C23C4/129 , C23C4/131 , C23C4/134
摘要： The invention relates to a thermal spraying apparatus (1) for coating a surface (2) of a substrate (3) by means of a coating material (4). The thermal spraying apparatus (1) includes a spray pistol (5) with a heating device for heating the coating material (4) in a heating zone (6) and also a charging apparatus (7) with a feed (8) through which the coating material (4) can be introduced into the heating zone (6). In this arrangement the thermal spraying apparatus is so designed that a relative position (9) between the feed (8) and the heating zone (6) can be changed in the operating state.
摘要翻译：本发明涉及一种用于通过涂料（4）涂覆基材（3）的表面（2）的热喷涂装置（1）。热喷涂装置（1）包括喷枪（5），其具有用于在加热区（6）中加热涂料（4）的加热装置，以及具有进料（8）的加料装置（7）可以将涂料（4）引入加热区（6）。在这种布置中，热喷涂设备被设计成使得在进给（8）和加热区（6）之间的相对位置（9）可以在操作状态下改变。

4. 发明申请

US20060003725A1 Frequency division 有权
标题翻译：分频
公开(公告)号：US20060003725A1
公开(公告)日：2006-01-05
申请号：US10883641
申请日：2004-06-30
申请人： Ralf Kakerow , Markus Muller , Stephan Bocker
发明人： Ralf Kakerow , Markus Muller , Stephan Bocker
IPC分类号： H04B15/00
CPC分类号： H03L7/1976 , H03K23/667
摘要： The invention relates to a method of operating a frequency divider. The frequency divider includes a plurality of divider cells arranged in a chain. Each divider cell is adapted to divide a frequency of an input signal with one of two enabled division ratios in accordance with an applied division ratio control signal, and each divider cell but the last is adapted to provide a frequency divided signal as an input signal for a respective next divider cell. In order to enable a Fractional-N division, the method comprises receiving and buffering a new division ratio control signal for each of the divider cells, and synchronizing an application of the buffered division ratio control signals to the divider cells with a status of a current division cycle. The invention relates equally to a corresponding frequency divider, PLL frequency synthesizer, RF front end, device and system.
摘要翻译：本发明涉及一种操作分频器的方法。分频器包括布置在链中的多个分频单元。每个分频器单元适于根据所施加的分频比控制信号将输入信号的频率与两个使能的分频比之一分开，并且每个分频器单元而最后一个分频单元适于提供分频信号作为输入信号相应的下一个分频器单元。为了实现分数N分频，该方法包括接收和缓冲每个分频器单元的新的分频比控制信号，并将缓冲的分频比控制信号的应用与具有当前状态的分频器单元同步分割周期。本发明同样涉及相应的分频器，PLL频率合成器，RF前端，器件和系统。

5. 发明授权

US5897059A Nozzle for use in a torch head of a plasma torch apparatus 失效
标题翻译：喷嘴用于等离子体火炬装置的割炬头
公开(公告)号：US5897059A
公开(公告)日：1999-04-27
申请号：US763713
申请日：1996-12-13
申请人： Markus Muller
发明人： Markus Muller
IPC分类号： B05B7/16 , C23C4/00 , C23C4/12 , H05H1/28 , H05H1/34 , B05B15/00
CPC分类号： H05H1/28 , H05H2001/3478
摘要： A nozzle for the head of a plasma torch comprises a central aperture and is provided with a plurality of cooling channels uniformly distributed around the central longitudinal axis of the nozzle in a polar configuration. Each of the cooling channels comprises a first cooling channel portion and a second cooling channel portion communicating with the first one and enclosing an angle between each other. The first cooling channel portions extend radially towards the central longitudinal axis of the nozzle and at least approximately perpendicularly thereto. The second cooling channel portions extend under an acute angle with respect to the central longitudinal axis. By this design, a substantially more uniform and more effective cooling of the nozzle is achieved, with the result that the useful working life is prolonged.
摘要翻译：用于等离子体焰炬头部的喷嘴包括中心孔，并且设置有多个冷却通道，其以极配置均匀分布在喷嘴的中心纵向轴线周围。每个冷却通道包括第一冷却通道部分和与第一冷却通道部分连通并且彼此包围一个角度的第二冷却通道部分。第一冷却通道部分径向地朝向喷嘴的中心纵向轴线延伸并且至少大致垂直于其。第二冷却通道部分相对于中心纵向轴线以锐角延伸。通过这种设计，实现了喷嘴实质上更均匀和更有效的冷却，从而延长了有用的使用寿命。

6. 发明授权

US07884002B2 Method of fabricating self aligned Schottky junctions for semiconductor devices 有权
标题翻译：制造用于半导体器件的自对准肖特基结的方法
公开(公告)号：US07884002B2
公开(公告)日：2011-02-08
申请号：US12095144
申请日：2006-11-27
申请人： Markus Muller
发明人： Markus Muller
IPC分类号： H01L21/28 , H01L21/8238 , H01L21/4763 , H01L21/44
CPC分类号： H01L29/66636 , H01L29/66643 , H01L29/7839
摘要： A method of fabricating a self-aligned Schottky junction (29) in respect of a semiconductor device. After gate etching and spacer formation, a recess defining the junction regions is formed in the Silicon substrate (10) and a SiGe layer (22) is selectively grown therein. A dielectric layer (24) is then provided over the gate (14) and the SiGe layer (22), a contact etch is performed to form contact holes (26) and the SiGe material (22) is then removed to create cavities (28) in the junction regions. Finally the cavities (28) are filled with metal to form the junction (29). Thus, a process is provided for self-aligned fabrication of a Schottky junction having relatively low resistivity, wherein the shape and position of the junction can be well controlled.
摘要翻译：一种制造相对于半导体器件的自对准肖特基结（29）的方法。在栅极蚀刻和间隔物形成之后，在硅衬底（10）中形成限定结区的凹槽，并且选择性地生长SiGe层（22）。然后在栅极（14）和SiGe层（22）之上提供介电层（24），进行接触蚀刻以形成接触孔（26），然后去除SiGe材料（22）以产生空腔（28 ）在连接区域。最后，用金属填充空腔（28）以形成结（29）。因此，提供了一种用于自对准制造具有较低电阻率的肖特基结的工艺，其中可良好地控制结的形状和位置。

7. 发明申请

US20080173765A1 Airframe structure of an aircraft or spacecraft 有权
标题翻译：飞机或航天器的机身结构
公开(公告)号：US20080173765A1
公开(公告)日：2008-07-24
申请号：US11891755
申请日：2007-08-13
申请人： Markus Muller , Lars Fiedler
发明人： Markus Muller , Lars Fiedler
IPC分类号： B64G1/22 , E21B43/00 , B64C1/00
CPC分类号： B64C1/061 , B64C2001/0072 , B64C2001/0081 , B64G1/22 , Y02T50/43
摘要： The present invention provides an airframe structure of an aircraft or spacecraft, with: a hollow body section which can be subjected to an internal pressure; a membrane arrangement which has at least one single-part, multi-curved membrane component for sealing off the internal pressure from an external pressure which acts on the hollow body section and differs from the internal pressure; and a joining structure for a pressuretight joining of the membrane arrangement to a region of the hollow body section; wherein the membrane arrangement forms a receiving well which is accessible from outside the hollow body section, extends at least partially into the hollow body -section and is for receiving a component of the aircraft or spacecraft.
摘要翻译：本发明提供了一种飞机或航天器的机身结构，其具有：可承受内部压力的中空主体部分; 膜装置，其具有至少一个单一部分的多弯曲膜部件，用于将内部压力与作用在中空主体部分上并与内部压力不同的外部压力密封; 以及用于将膜装置与中空主体部分的区域的压力接合的接合结构; 其中所述膜装置形成从所述中空主体部分的外部可接近的接收井，至少部分地延伸到所述中空主体部分中并且用于接收所述飞行器或航天器的部件。

8. 发明申请

US20060065588A1 Hollow fiber module 有权
标题翻译：中空纤维模块
公开(公告)号：US20060065588A1
公开(公告)日：2006-03-30
申请号：US10531539
申请日：2003-10-09
申请人： Berthold Koch , Markus Muller , Herbert Schlensker
发明人： Berthold Koch , Markus Muller , Herbert Schlensker
IPC分类号： B01D63/02
CPC分类号： B01D63/022 , B01D53/22 , B01D53/268 , B01D63/021 , B01D63/025 , B01D2319/04
摘要： The invention relates to a hollow fibre separation module comprising an inlet (20) for the gas to be dried, an outlet (22) for dried gas, an access element (26) and a discharge element (28) for circulation gas, and a plurality of hollow fibres which respectively extend from the inlet (29) to the outlet (22) and comprise an inner region which communicates with the inlet (20) on one end of each hollow fibre, and with the outlet (22) on the other end of each hollow fibre. Said hollow fibres are wound up in a plurality of layers (40, 42, 44) to form a hollow cylindrical winding. Each layer (40, 42, 44) is inwardly defined by an imaginary cylinder (35, 36, 37) and has a number of hollow fibres which are wound onto said cylinder (35, 36, 37) in a helical manner with an alpha angle of inclination, are located at a distance a from each other, and are arranged on the cylinder in a homogeneously distributed manner. A layer (40) differs from an adjacent layer (e.g. 42) in that the fibres of one of the layers all form a plus alpha winding angle, whereas the fibres of the adjacent layers all form a minus alpha winding angle.
摘要翻译：本发明涉及一种中空纤维分离模块，其包括用于待干燥气体的入口（20），用于干燥气体的出口（22），用于循环气体的进入元件（26）和排出元件（28），以及多个中空纤维分别从入口（29）延伸到出口（22）并且包括与每个中空纤维的一端上的入口（20）连通的内部区域，并且在另一个上具有出口（22）每个中空纤维的末端。所述中空纤维被卷绕成多个层（40,42,44）以形成中空的圆柱形绕组。每个层（40,42,44）由假想的圆柱体（35,36,37）向内限定，并且具有多个中空纤维，其以螺旋方式以α形式缠绕在所述圆柱体（35,36,37）上倾斜角位于彼此间隔一定距离a处，并以均匀分布的方式设置在气缸上。层（40）与相邻层（例如42）的不同之处在于，其中一层的纤维都形成正α缠绕角，而相邻层的纤维都形成负的α缠绕角。

9. 发明授权

US07659154B2 Dual gate CMOS fabrication 有权
标题翻译：双栅CMOS制造
公开(公告)号：US07659154B2
公开(公告)日：2010-02-09
申请号：US11573346
申请日：2005-08-01
申请人： Markus Muller , Peter Stolk
发明人： Markus Muller , Peter Stolk
IPC分类号： H01L21/28 , H01L21/44
CPC分类号： H01L21/28097 , H01L21/823842 , H01L29/4933 , H01L29/4975 , H01L29/66545
摘要： The invention relates to a method of fabricating a CMOS device, comprising providing a semiconductor substrate (101) having therein a layer of insulating material (102), the method comprising providing a layer (106) of a first material over the insulating layer (102), the thickness of the layer (106) of the first material being less in a first region (103) for supporting a first active device than in a second region (104) for supporting a second active device. A layer (107) of a second material is then deposited over the layer (106) of a first material, and the structure is then subjected to a thermal treatment to alloy the first and second materials. The portion of the layers over the first region is entirely alloyed, whereas the portion of the layers over the second region is not, so that a portion (109) of the layer (106) of the first material remains.
摘要翻译：本发明涉及一种制造CMOS器件的方法，包括提供其中具有绝缘材料层（102）的半导体衬底（101），所述方法包括在所述绝缘层（102）上提供第一材料层（106）），第一材料的层（106）的厚度在用于支撑第一有源器件的第一区域（103）中比在用于支撑第二有源器件的第二区域（104）中更小。然后将第二材料的层（107）沉积在第一材料的层（106）上，然后对该结构进行热处理以使第一和第二材料合金化。第一区域上的层的部分完全合金化，而在第二区域上的部分层不是，使得第一材料的层（106）的一部分（109）保留。

10. 发明申请

US20080299715A1 Method of Fabricating Self Aligned Schotky Junctions For Semiconductors Devices 有权
标题翻译：半导体器件自对准Schotky结的制作方法
公开(公告)号：US20080299715A1
公开(公告)日：2008-12-04
申请号：US12095144
申请日：2006-11-27
申请人： Markus Muller
发明人： Markus Muller
IPC分类号： H01L21/338 , H01L21/8238
CPC分类号： H01L29/66636 , H01L29/66643 , H01L29/7839
摘要： A method of fabricating a self-aligned Schottky junction (29) in respect of a semiconductor device. After gate etching and spacer formation, a recess defining the junction regions is formed in the Silicon substrate (10) and a SiGe layer (22) is selectively grown therein. A dielectric layer (24) is then provided over the gate (14) and the SiGe layer (22), a contact etch is performed to form contact holes (26) and the SiGe material (22) is then removed to create cavities (28) in the junction regions. Finally the cavities (28) are filled with metal to form the junction (29). Thus, a process is provided for self-aligned fabrication of a Schottky junction having relatively low resistivity, wherein the shape and position of the junction can be well controlled.
摘要翻译：一种制造相对于半导体器件的自对准肖特基结（29）的方法。在栅极蚀刻和间隔物形成之后，在硅衬底（10）中形成限定结区的凹槽，并且选择性地生长SiGe层（22）。然后在栅极（14）和SiGe层（22）之上提供介电层（24），进行接触蚀刻以形成接触孔（26），然后去除SiGe材料（22）以产生空腔（28 ）在连接区域。最后，用金属填充空腔（28）以形成结（29）。因此，提供了一种用于自对准制造具有较低电阻率的肖特基结的工艺，其中可良好地控制结的形状和位置。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式