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1. 发明授权

US07348821B2 Programmable high-resolution timing jitter injectors high-resolution timing jitter injectors 有权
标题翻译：可编程高分辨率定时抖动注入器高分辨率定时抖动注入器
公开(公告)号：US07348821B2
公开(公告)日：2008-03-25
申请号：US10946709
申请日：2004-09-22
申请人： Jianping Xu , KyeHyung Lee , Fabrice Paillet , David Rennie , Tanay Karnik
发明人： Jianping Xu , KyeHyung Lee , Fabrice Paillet , David Rennie , Tanay Karnik
IPC分类号： H03H11/26
CPC分类号： H03K5/1504 , H03K5/133 , H03K2005/00058
摘要： A device includes a first circuit having rows and columns of delay cells to generate delayed signals based on an input signal. The delayed signals are selectable and have a different delay from one another with respect to the input signal. The device is programmable based on a delay code. Different values of the delay code allow the device to select different delayed signals. The device may select one of the delayed signals from the first circuit for use as a timing signal in a second circuit of the device. The device may also use the delayed signals from the first circuit to evaluate a clock and data recovery circuit. In an embodiment, the circuits may be located on a single die.
摘要翻译：一种装置包括具有行和列的延迟单元的第一电路，以基于输入信号产生延迟信号。延迟信号是可选择的并且相对于输入信号具有彼此不同的延迟。该设备可以基于延迟码进行编程。延迟码的不同值允许设备选择不同的延迟信号。设备可以选择来自第一电路的延迟信号之一用作设备的第二电路中的定时信号。该装置还可以使用来自第一电路的延迟信号来评估时钟和数据恢复电路。在一个实施例中，电路可以位于单个管芯上。

2. 发明申请

US20060061399A1 Programmable high-resolution timing jitter injectors 有权
标题翻译：可编程高分辨率定时抖动注入器
公开(公告)号：US20060061399A1
公开(公告)日：2006-03-23
申请号：US10946709
申请日：2004-09-22
申请人： Jianping Xu , KyeHyung Lee , Fabrice Paillet , David Rennie , Tanay Karnik
发明人： Jianping Xu , KyeHyung Lee , Fabrice Paillet , David Rennie , Tanay Karnik
IPC分类号： H03H11/26
CPC分类号： H03K5/1504 , H03K5/133 , H03K2005/00058
摘要： A device includes a first circuit having rows and columns of delay cells to generate delayed signals based on an input signal. The delayed signals are selectable and have a different delay from one another with respect to the input signal. The device is programmable based on a delay code. Different values of the delay code allow the device to select different delayed signals. The device may select one of the delayed signals from the first circuit for use as a timing signal in a second circuit of the device. The device may also use the delayed signals from the first circuit to evaluate a clock and data recovery circuit. In an embodiment, the circuits may be located on a single die.
摘要翻译：一种装置包括具有行和列的延迟单元的第一电路，以基于输入信号产生延迟信号。延迟信号是可选择的并且相对于输入信号具有彼此不同的延迟。该设备可以基于延迟码进行编程。延迟码的不同值允许设备选择不同的延迟信号。设备可以选择来自第一电路的延迟信号之一用作设备的第二电路中的定时信号。该装置还可以使用来自第一电路的延迟信号来评估时钟和数据恢复电路。在一个实施例中，电路可以位于单个管芯上。

3. 发明授权

US06958640B2 Interpolation delay cell for 2ps resolution jitter injector in optical link transceiver 失效
公开(公告)号：US06958640B2
公开(公告)日：2005-10-25
申请号：US10748300
申请日：2003-12-31
申请人： KyeHyung Lee , Jianping Xu , Fabrice Paillet , Tanay Karnik
发明人： KyeHyung Lee , Jianping Xu , Fabrice Paillet , Tanay Karnik
IPC分类号： H03F1/26 , H03F3/45 , H03H11/26
CPC分类号： H03H11/265 , H03F1/26 , H03F3/45183 , H03F3/45475 , H03F2200/372
摘要： An apparatus and method for generating signals with improved timing resolution includes a delay cell configured to receive dual coupled differential input signals. The delay cell performs an interpolation function which smooths state transitions or other discontinuities that result from timing or phase offsets between the input signals. The interpolation function is performed by resistors which couple respective components of the differential inputs prior to traversing delay paths. A delay cell of this type has high supply noise rejection and a low output swing range, thereby making it suitable for a number of applications. One application includes a jitter noise generator which uses the delay cell to achieve improved timing resolution and which is not limited by a minimum delay of the cell. Another application uses the delay cell to form a coupled delay line.

4. 发明申请

US20050140412A1 Interpolation delay cell for 2ps resolution jitter injector in optical link transceiver 失效
标题翻译：用于光链路收发器中2ps分辨率抖动注入器的插值延迟单元
公开(公告)号：US20050140412A1
公开(公告)日：2005-06-30
申请号：US10748300
申请日：2003-12-31
申请人： KyeHyung Lee , Jianping Xu , Fabrice Paillet , Tanay Karnik
发明人： KyeHyung Lee , Jianping Xu , Fabrice Paillet , Tanay Karnik
IPC分类号： H03F1/26 , H03F3/45 , H03H11/26
CPC分类号： H03H11/265 , H03F1/26 , H03F3/45183 , H03F3/45475 , H03F2200/372
摘要： An apparatus and method for generating signals with improved timing resolution includes a delay cell configured to receive dual coupled differential input signals. The delay cell performs an interpolation function which smooths state transitions or other discontinuities that result from timing or phase offsets between the input signals. The interpolation function is performed by resistors which couple respective components of the differential inputs prior to traversing delay paths. A delay cell of this type has high supply noise rejection and a low output swing range, thereby making it suitable for a number of applications. One application includes a jitter noise generator which uses the delay cell to achieve improved timing resolution and which is not limited by a minimum delay of the cell. Another application uses the delay cell to form a coupled delay line.
摘要翻译：用于产生具有改进的定时分辨率的信号的装置和方法包括被配置为接收双耦合差分输入信号的延迟单元。延迟单元执行内插函数，其平滑由输入信号之间的定时或相位偏移导致的状态转换或其他不连续性。内插函数由在穿过延迟路径之前耦合差分输入的各个分量的电阻器来执行。这种延迟单元具有高的电源噪声抑制和低的输出摆幅范围，从而使其适用于多种应用。一个应用包括抖动噪声发生器，其使用延迟单元来实现改进的定时分辨率，并且不受单元的最小延迟的限制。另一应用使用延迟单元来形成耦合的延迟线。

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