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1. 再颁专利

USRE34896E Multiplex interface for a communication controller 失效
标题翻译：通讯控制器的多路复用接口
公开(公告)号：USRE34896E
公开(公告)日：1995-04-04
申请号：US52189
申请日：1991-05-29
申请人： Jean L. J. Calvignac , Jacques M. C. Feraud , Jean-Marie L. Munier
发明人： Jean L. J. Calvignac , Jacques M. C. Feraud , Jean-Marie L. Munier
IPC分类号： G06F13/40 , H04L12/52 , H04J3/16 , H04J3/22
CPC分类号： H04L12/525 , G06F13/4022
摘要： A multiplex interface for interconnecting the line scanning means (1) of a communication controller to user lines via transmit and receive synchronous multiplex links. Both data and control bits are exchanged in synchronous frames wherein at least two slots are assigned to each user line, the structure of the two slots is identical for all types of user lines and includes an n-bit data slot having a variable number x of valid bits depending upon the line speed of the user line assigned to the data slot and indicated by a variable delimiter pattern comprising a first delimiting bit set at a first binary value (1) adjacent to the data bits and (n--x--1) bits set at the second binary value (0) adjacent to said first delimiting bit, and an n-bit control slot having a first bit used as a global validation bit in case the data slot comprises n valid bits (x.dbd.n), this bit being set at the first binary value (1) when the data slot comprises n valid bits and at the second binary value (0) if it comprises less than n valid bits, and the n--following bits are used for exchanging control information.
摘要翻译：一种多路复用接口，用于经由发送和接收同步多路复用链路将通信控制器的线路扫描装置（1）与用户线互连。在同步帧中交换数据和控制位，其中至少两个时隙被分配给每个用户线，两个时隙的结构对于所有类型的用户线是相同的，并且包括具有可变数目x的n位数据时隙有效位取决于分配给数据时隙的用户行的线速度，并且由可变分隔符模式指示，该可变分隔符模式包括在与数据位相邻的第一二进制值（1）和（nx-1）位设置下设置的第一定界位在与所述第一定界位相邻的第二二进制值（0）处，以及在数据时隙包括n个有效位（x = n）的情况下具有用作全局验证位的第一位的n位控制时隙，该位为如果数据时隙包括n个有效位，并且如果其包括小于n个有效位，则设置在第二二进制值（1）处，并且在第二个二进制值（0）处，并且将n个后续位用于交换控制信息。

2. 发明授权

US4760573A Multiplex interface for a communication controller 失效
标题翻译：通讯控制器的多路复用接口
公开(公告)号：US4760573A
公开(公告)日：1988-07-26
申请号：US930164
申请日：1986-11-13
申请人： Jean L. J. Calvignac , Jacques M. Clement Feraud , Jean-Marie L. Munier
发明人： Jean L. J. Calvignac , Jacques M. Clement Feraud , Jean-Marie L. Munier
IPC分类号： H04L29/04 , G06F13/40 , H04L12/52 , H04L29/10 , H04J3/16
CPC分类号： H04L12/525 , G06F13/4022
摘要： A multiplex interface for interconnecting the line scanning means (1) of a communication controller to user lines via transmit and receive synchronous multiplex links. Both data and control bits are exchanged in synchronous frames wherein at least two slots are assigned to each user line, the structure of the two slots is identical for all types of user lines and includes an n-bit data slot having a variable number x of valid bits depending upon the line speed of the user line assigned to the data slot and indicated by a variable delimiter pattern comprising a first delimiting bit set at a first binary value (1) adjacent to the data bits and (n-x-1) bits set at the second binary value (0) adjacent to said first delimiting bit, and an n-bit control slot having a first bit used as a global validation bit in case the data slot comprises n valid bits (x=n), this bit being set at the first binary value (1) when the data slot comprises n valid bits and at the second binary value (0) if it comprises less than n valid bits, and the n-1 following bits are used for exchanging control information.
摘要翻译：一种多路复用接口，用于经由发送和接收同步多路复用链路将通信控制器的线路扫描装置（1）与用户线互连。在同步帧中交换数据和控制位，其中至少两个时隙被分配给每个用户线，两个时隙的结构对于所有类型的用户线是相同的，并且包括具有可变数目x的n位数据时隙有效位取决于分配给数据时隙的用户行的线速度，并且由可变分隔符模式指示，该可变分隔符模式包括在与数据位相邻的第一二进制值（1）和（nx-1）位设置下设置的第一定界位在与所述第一定界位相邻的第二二进制值（0）处，以及在数据时隙包括n个有效位（x = n）的情况下具有用作全局验证位的第一位的n位控制时隙，该位为当数据时隙包括n个有效位并且如果其包括小于n个有效位，则设置在第二个二进制值（0），并且n-1个后续位用于交换控制信息。

3. 发明授权

US4811339A Non-coded information and companion data switching mechanism 失效
标题翻译：非编码信息和配套数据交换机制
公开(公告)号：US4811339A
公开(公告)日：1989-03-07
申请号：US33276
申请日：1987-04-02
申请人： Michel Bouillot , Jean L. Calvignac , Jean-Marie L. Munier
发明人： Michel Bouillot , Jean L. Calvignac , Jean-Marie L. Munier
IPC分类号： H04L29/06 , H04L12/64 , H04M11/06 , H04J3/26
CPC分类号： H04L12/64 , H04M11/068
摘要： Mechanism for allowing data and packetized non coded information NCI such as packetized voice or images, to be exchanged between workstations connected to nodes of a communication network. The workstations arrange the bit stream to be sent into a format of regularly occurring time slots separated by flags. The data only containing time slots begin with a first flag (F2), the NCI only containing and NCI and data containing time slots begin with a second flag (F1) and inside these slots, flag F2 separates the NCI and data portions.The route between two workstations is established by a data session using the node resources. Once a route is established, the NCI portions of the bit stream are switched using high speed bus 26 and the data portions are routed using the normal data paths.

4. 发明授权

US4855948A Bypass booster mechanisms for the line scanners of a communication controller 失效
标题翻译：为通讯控制器的线扫描仪旁路升压机构
公开(公告)号：US4855948A
公开(公告)日：1989-08-08
申请号：US107432
申请日：1987-10-08
申请人： Michel Bouillot , Jean-Louis J. Calvignac , Jean-Marie L. Munier
发明人： Michel Bouillot , Jean-Louis J. Calvignac , Jean-Marie L. Munier
IPC分类号： G06F3/00 , H04N1/00 , H04N1/333
CPC分类号： H04N1/00241 , G06F3/002 , H04N1/00236 , H04N1/33323 , H04N2201/3335
摘要： The system of the invention is used in a communication controller comprising a central control unit connected to at least one line adapter through a bus, wherein the line adapter may not be attached through its line interface to communication lines working at a speed higher than v, this mechanism allowing the adapter to be connected to one communication line onto which information is transported in frames at a high speed HS which is higher than v. It comprises a receive mechanism and a transmit mechanism building a bypass booster 1. The receive mechanism constructs from the received bit stream on high speed line 6, a short frame only comprising the heading portions of the frames, said short frame being handled by the line scanner 2 and the complete frame being handled separatly in bypass booster 1. The transmit mechanism simulates the transmission from the system bus 5 of a short frame which is handled by the line scanner and the complete frame is handled in the bypass booster, from which the complete frame is sent on the high speed line 6.
摘要翻译：本发明的系统用于包括通过总线连接到至少一个线路适配器的中央控制单元的通信控制器，其中线路适配器可以不通过其线路接口连接到以高于v的速度工作的通信线路，这种机制允许适配器连接到以高于v的高速HS传送信息的一个通信线路，其包括接收机制和建立旁路增强器1的传输机制。接收机制从在高速线6上接收到的比特流，仅包括帧的标题部分的短帧，所述短帧由线扫描器2处理，并且完整帧在旁路增强器1中被分离地处理。传输机制模拟传输从由行扫描器处理的短帧的系统总线5和完整的帧在旁路助力器中处理完整的帧在高速线6上发送。

5. 发明授权

US4751698A Serial link adapter for a communication controller 失效
标题翻译：用于通信控制器的串行链路适配器
公开(公告)号：US4751698A
公开(公告)日：1988-06-14
申请号：US940706
申请日：1986-12-11
申请人： Michel Bouillot , Jean-Louis Calvignac , Jean-Marie L. Munier
发明人： Michel Bouillot , Jean-Louis Calvignac , Jean-Marie L. Munier
IPC分类号： H04Q11/04 , H04M11/06 , H04Q3/42 , H04J3/12
CPC分类号： H04M11/068
摘要： Serial link adapter to be used in a communication controller comprising data handling means (DHM), said adapter allowing the communication controller to be attached to a multiplex serial link carrying data and non coded information bits in dedicated slots.In line adapter LA1 receiving means RCV1 are connected to serial link carrying data and non coded information slots. The receiving means comprises a routing arrangement for sending the data slot bits to the data handling means of the controller and the non coded information slot bits a high speed bus HSB1. Transmitting means Xmit1 are connected to high speed bus HSB2 and to the data handling means and comprises means for sending the data and non coded information slot bits in dedicated slots on the serial multiplex link MPX-T. Line adapter LA2 comprises means which are similar to the receiving and transmitting means in adapter LA1 and may be connected to the private branch exchange located in the same site as the communication controller.
摘要翻译：用于包括数据处理装置（DHM）的通信控制器中的串行链路适配器，所述适配器允许通信控制器附加到在专用时隙中承载数据和非编码信息比特的多路复用串行链路。线路适配器LA1接收装置RCV1连接到串行链路携带数据和非编码信息时隙。接收装置包括用于将数据时隙位发送到控制器的数据处理装置和非编码信息时隙位的路由装置，该高速总线HSB1。发送装置Xmit1连接到高速总线HSB2和数据处理装置，并且包括用于在串行多路复用链路MPX-T的专用时隙中发送数据和非编码信息时隙位的装置。线路适配器LA2包括与适配器LA1中的接收和发送装置相似的装置，并且可以连接到位于与通信控制器相同的位置的专用交换机交换机。

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