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    • 2. 发明申请
    • Thin Film Transistor Array Panel
    • 薄膜晶体管阵列面板
    • US20080303025A1
    • 2008-12-11
    • US12195239
    • 2008-08-20
    • Sahng-lk Jun
    • Sahng-lk Jun
    • H01L29/04
    • H01L27/12H01L27/124
    • A thin film transistor array panel according to an embodiment of the present invention includes: a gate electrode; a semiconductor layer; a gate insulating layer disposed between the gate electrode and the semiconductor layer; a source electrode connected to the semiconductor layer; and a drain electrode connected to the semiconductor layer, spaced apart from the source electrode, and including two branches overlapping the gate electrode, wherein the two branches of the drain electrode are spaced apart from each other and lie on a straight line or on two parallel straight lines.
    • 根据本发明实施例的薄膜晶体管阵列面板包括:栅电极; 半导体层; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 连接到半导体层的源电极; 和连接到半导体层的漏电极,与源极间隔开,并且包括与栅电极重叠的两个分支,其中漏电极的两个分支彼此间隔开并且位于两条平行的直线上 直线。