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1. 发明授权

US07155820B2 Method for manufacturing printed circuit board 有权
标题翻译：印刷电路板制造方法
公开(公告)号：US07155820B2
公开(公告)日：2007-01-02
申请号：US10695302
申请日：2003-10-27
申请人： Daizo Andoh , Fumio Echigo , Tadashi Nakamura , Yasuhiro Nakatani , Yoji Ueda , Tousaku Nishiyama , Shozo Ochi
发明人： Daizo Andoh , Fumio Echigo , Tadashi Nakamura , Yasuhiro Nakatani , Yoji Ueda , Tousaku Nishiyama , Shozo Ochi
IPC分类号： H01K3/10 , H01R12/04
CPC分类号： H05K3/4069 , H05K1/0366 , H05K1/0373 , H05K3/4614 , H05K3/462 , H05K3/4652 , H05K2201/0266 , H05K2201/0355 , H05K2201/10378 , H05K2203/0191 , H05K2203/1461 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , Y10T428/24917
摘要： The present invention provides a method of manufacturing a printed circuit board, which includes preparing a dielectric substrate, coating surfaces of the dielectric substrate, filling a via hole with a conductor, peeling mold-releasing films, compressing the dielectric substrate and forming metal foils. The dielectric substrate has patterned wiring layers on both surfaces, and the wiring layers are connected electrically with each other by the conductor. The dielectric substrate is made of a glass cloth or a glass nonwoven fabric impregnated with a thermosetting epoxy resin mixed with fine particles, and the conductive filler in the conductor has an average particle diameter larger than that of the fine particles. Accordingly, the printed circuit board has an improved moisture resistance as a whole and also excellent connection reliability and repair resistance. In addition, the dielectric substrate of the printed circuit board has an improved mechanical strength such as flexural rigidity.
摘要翻译：本发明提供一种制造印刷电路板的方法，其包括制备电介质基板，电介质基板的涂层表面，用导体填充通孔，剥离脱模膜，压缩电介质基板和形成金属箔。电介质基板在两表面上具有图案化的布线层，并且布线层通过导体彼此电连接。电介质基板由玻璃布或浸渍有与微粒混合的热固性环氧树脂的玻璃无纺布制成，并且导体中的导电填料的平均粒径大于微粒的平均粒径。因此，印刷电路板整体上具有改善的耐湿性，并且还具有优异的连接可靠性和修复电阻。此外，印刷电路板的电介质基板具有改善的机械强度，例如弯曲刚度。

2. 发明授权

US06753483B2 Printed circuit board and method of manufacturing the same 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US06753483B2
公开(公告)日：2004-06-22
申请号：US09879385
申请日：2001-06-12
申请人： Daizo Andoh , Fumio Echigo , Tadashi Nakamura , Yasuhiro Nakatani , Yoji Ueda , Tousaku Nishiyama , Shozo Ochi
发明人： Daizo Andoh , Fumio Echigo , Tadashi Nakamura , Yasuhiro Nakatani , Yoji Ueda , Tousaku Nishiyama , Shozo Ochi
IPC分类号： H01R1204
CPC分类号： H05K3/4069 , H05K1/0366 , H05K1/0373 , H05K3/4614 , H05K3/462 , H05K3/4652 , H05K2201/0266 , H05K2201/0355 , H05K2201/10378 , H05K2203/0191 , H05K2203/1461 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , Y10T428/24917
摘要： The present invention provides a printed circuit board, which includes a dielectric substrate having via holes formed in the thickness direction, and a conductor including a conductive filler is filled in the via holes. The dielectric substrate has patterned wiring layers on both surfaces, and the wiring layers are connected electrically with each other by the conductor. The dielectric substrate is made of a glass cloth or a glass nonwoven fabric impregnated with a thermosetting epoxy resin mixed with fine particles, and the conductive filler in the conductor has an average particle diameter larger than that of the fine particles. Accordingly, the printed circuit board has an improved moisture resistance as a whole and also excellent connection reliability and repair resistance. In addition, the dielectric substrate of the printed circuit board has an improved mechanical strength such as flexural rigidity. The present invention also provides a method of manufacturing such a printed circuit board.
摘要翻译：本发明提供了一种印刷电路板，其包括具有沿厚度方向形成的通孔的电介质基板，并且包含导电填料的导体填充在通孔中。电介质基板在两表面上具有图案化的布线层，并且布线层通过导体彼此电连接。电介质基板由玻璃布或浸渍有与微粒混合的热固性环氧树脂的玻璃无纺布制成，并且导体中的导电填料的平均粒径大于微粒的平均粒径。因此，印刷电路板整体上具有改善的耐湿性，并且还具有优异的连接可靠性和修复电阻。此外，印刷电路板的电介质基板具有改善的机械强度，例如弯曲刚度。本发明还提供一种制造这种印刷电路板的方法。

3. 发明授权

US06745464B2 Removable film, a substrate with film, a process for forming the removable film and a process for the manufacturing of the circuit board 失效
标题翻译：可拆卸膜，具有膜的基板，用于形成可移除膜的工艺以及用于制造电路板的工艺
公开(公告)号：US06745464B2
公开(公告)日：2004-06-08
申请号：US10401607
申请日：2003-03-31
申请人： Fumio Echigo , Hideki Higashitani , Daizo Andoh , Noritake Fukuda , Yasuhiro Nakatani , Tadashi Nakamura
发明人： Fumio Echigo , Hideki Higashitani , Daizo Andoh , Noritake Fukuda , Yasuhiro Nakatani , Tadashi Nakamura
IPC分类号： H01K310
CPC分类号： H05K3/4069 , H05K3/0032 , H05K3/20 , H05K3/386 , H05K2201/0112 , H05K2201/0116 , H05K2201/0355 , H05K2203/0191 , H05K2203/1461 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , Y10T29/49172
摘要： Removable mask films 303 are formed on the both sides of the substrate having the adhesive layer 302 by applying and drying a resin varnish 304 including a ultraviolet-absorbing agent, and fine through holes 306 are formed by using a third harmonics YAG solid-state laser light with a relatively short wavelength not longer than that in the ultraviolet range in such a way that the effects of such a residual strain as the conventional embodiment forming a removable mask film by a laminating process may be decreased as well as the more fine hole drilling compared with conventional embodiment using the carbon dioxide gas laser with a relatively long wavelength may be performed.
摘要翻译：通过施加和干燥包括紫外线吸收剂的树脂清漆304在具有粘合剂层302的基板的两侧上形成可移除掩模膜303，并且通过使用第三谐波YAG固体激光器形成细小通孔306 具有比紫外线范围内的波长相对较短波长的光可以减少通过层压方法形成可去除掩模膜的这种残留应变的效果以及更细孔钻孔与使用具有较长波长的二氧化碳气体激光器的常规实施例相比可以进行。

4. 发明授权

US06546624B2 Removable film, a substrate with film, a process for forming the removable film and a process for the manufacturing of the circuit board 失效
公开(公告)号：US06546624B2
公开(公告)日：2003-04-15
申请号：US09734593
申请日：2000-12-13
申请人： Fumio Echigo , Hideki Higashitani , Daizo Andoh , Noritake Fukuda , Yasuhiro Nakatani , Tadashi Nakamura
发明人： Fumio Echigo , Hideki Higashitani , Daizo Andoh , Noritake Fukuda , Yasuhiro Nakatani , Tadashi Nakamura
IPC分类号： H01K310
CPC分类号： H05K3/4069 , H05K3/0032 , H05K3/20 , H05K3/386 , H05K2201/0112 , H05K2201/0116 , H05K2201/0355 , H05K2203/0191 , H05K2203/1461 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , Y10T29/49172
摘要： Removable mask films 303 are formed on the both sides of the substrate having the adhesive layer 302 by applying and drying a resin varnish 304 including a ultraviolet-absorbing agent, and fine through holes 306 are formed by using a third harmonics YAG solid-state laser light with a relatively short wavelength not longer than that in the ultraviolet range in such a way that the effects of such a residual strain as the conventional embodiment forming a removable mask film by a laminating process may be decreased as well as the more fine hole drilling compared with conventional embodiment using the carbon dioxide gas laser with a relatively long wavelength may be performed.

5. 发明授权

US06734375B2 Circuit board having an interstitial inner via hole structure 失效
标题翻译：具有间隙内通孔结构的电路板
公开(公告)号：US06734375B2
公开(公告)日：2004-05-11
申请号：US09956205
申请日：2001-09-18
申请人： Yoshihiro Kawakita , Daizo Andoh , Fumio Echigo , Tadashi Nakamura
发明人： Yoshihiro Kawakita , Daizo Andoh , Fumio Echigo , Tadashi Nakamura
IPC分类号： H05K111
CPC分类号： H05K3/4626 , H05K1/036 , H05K1/0366 , H05K3/20 , H05K3/4069 , H05K3/4614 , H05K3/4652 , H05K3/4655 , H05K3/4658 , H05K2201/0116 , H05K2201/0195 , H05K2201/0278 , H05K2201/0293 , H05K2201/0355 , H05K2203/0191 , H05K2203/1461 , Y10T29/49149 , Y10T29/49151 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , Y10T428/249953 , Y10T428/249996
摘要： A circuit board including a desired number of electrically insulating layers and wiring layers laminated alternately, and an inner via hole for securing an electrical connection between the wiring layers by compressing and hardening a conductive paste including a conductive particle and a resin. In the electrically insulating layer, a porous sheet is provided a resin sheet at least one surface, and the porous sheet is not impregnated with a resin at least at a central portion. A through hole penetrating the electrically insulating layer in the direction of the thickness of the electrically insulating layer is filled with a conductive paste including a conductive particle and a resin, and pores that are present inside the porous sheet are filled with laminated resin. The average hole diameter of the pores inside the porous sheet may be smaller than the average particle size of the conductive particle. Thereby, it is possible to make the insulating layer of the circuit board securing the interlayer electrically connection by an inner via hole including a conductive paste to be homogenized and ultra-thin and improve the reliability of the connection of the inner via hole.
摘要翻译：包括所需数量的电绝缘层和交替层叠的布线层的电路板，以及用于通过压缩和硬化包括导电颗粒和树脂的导电膏来固定布线层之间的电连接的内通孔。在电绝缘层中，多孔片材至少在一个表面上设置有树脂片，多孔片材至少在中心部分不浸渍树脂。在电绝缘层的厚度方向贯通电绝缘层的贯通孔填充有包含导电性粒子和树脂的导电性糊剂，并且在多孔质片材内存在的孔填充有层叠树脂。多孔片内的孔的平均孔径可以小于导电性粒子的平均粒径。由此，可以使电路基板的绝缘层通过包含导电性糊剂的内部通路孔进行层间电连接，使其均匀化，超薄化，提高内部通孔连接的可靠性。

6. 发明授权

US06916706B2 Capacitor sheet, method for producing the same, board with built-in capacitors, and semiconductor device 失效
标题翻译：电容器片，其制造方法，具有内置电容器的板和半导体器件
公开(公告)号：US06916706B2
公开(公告)日：2005-07-12
申请号：US10833817
申请日：2004-04-27
申请人： Fumio Echigo , Tadashi Nakamura , Daizo Andoh
发明人： Fumio Echigo , Tadashi Nakamura , Daizo Andoh
IPC分类号： H01L21/02 , H05K1/14 , H05K1/16 , H05K3/40 , H05K3/42 , H01L21/8242
CPC分类号： H05K1/162 , H01L28/60 , H05K1/141 , H05K3/4069 , H05K3/429 , H05K2201/09309 , H05K2201/09581
摘要： A capacitor sheet includes a laminate sheet, interface-connection feedthrough conductors for electrically connecting faces of the laminate sheet, and capacitor-connection feedthrough conductors. The laminate sheet has at least one laminate which is composed of a power source layer electrode, a grounding layer electrode, and a dielectric layer interposed between the power source layer electrode and the grounding layer electrode. The interface-connection feedthrough conductors are formed in through holes that pass through the dielectric layer, the power source layer electrode, and the grounding layer electrode, and are insulated by insulation walls from the power source layer electrode and the grounding layer electrode provided inside. The capacitor-connection feedthrough conductors are formed in regions where only either the power source layer electrode or the grounding layer electrode is provided, and are connected electrically with either the power source layer electrode or the grounding layer electrode. This configuration makes the electric connection for employing the capacitors and the electric connection between faces of the sheet independent from each other. Thus, it is possible to provide a capacitor sheet in which the adverse effects of inductances of vias are minimized.
摘要翻译：电容器片包括层压片，用于电连接层压片的表面的接口连接馈通导体和电容器连接馈通导体。层叠片具有至少一层由电源层电极，接地层电极和插在电源层电极和接地层电极之间的电介质层构成的层叠体。界面连接馈通导体形成在穿过电介质层，电源层电极和接地层电极的通孔中，并且由设置在内部的电源层电极和接地层电极的绝缘壁绝缘。电容器连接馈通导体形成在仅设置电源层电极或接地层电极的区域中，并且与电源层电极或接地层电极电连接。这种构造使得用于采用电容器的电连接和片材的面之间的电连接彼此独立。因此，可以提供一种电容器片，其中通孔的电感的不利影响被最小化。

7. 发明授权

US07174632B2 Method of manufacturing a double-sided circuit board 失效
标题翻译：制造双面电路板的方法
公开(公告)号：US07174632B2
公开(公告)日：2007-02-13
申请号：US10754416
申请日：2004-01-09
申请人： Yoshihiro Kawakita , Daizo Andoh , Fumio Echigo , Tadashi Nakamura
发明人： Yoshihiro Kawakita , Daizo Andoh , Fumio Echigo , Tadashi Nakamura
IPC分类号： H01K3/10
CPC分类号： H05K3/4626 , H05K1/036 , H05K1/0366 , H05K3/20 , H05K3/4069 , H05K3/4614 , H05K3/4652 , H05K3/4655 , H05K3/4658 , H05K2201/0116 , H05K2201/0195 , H05K2201/0278 , H05K2201/0293 , H05K2201/0355 , H05K2203/0191 , H05K2203/1461 , Y10T29/49149 , Y10T29/49151 , Y10T29/49155 , Y10T29/49163 , Y10T29/49165 , Y10T428/24917 , Y10T428/249953 , Y10T428/249996
摘要： A circuit board including a desired number of electrically insulating layers and wiring layers laminated alternately, and an inner via hole for securing an electrical connection between the wiring layers by compressing and hardening a conductive paste including a conductive particle and a resin. In the electrically insulating layer, a porous sheet is provided a resin sheet at least one surface, and the porous sheet is not impregnated with a resin at least at a central portion. A through hole penetrating the electrically insulating layer in the direction of the thickness of the electrically insulating layer is filled with a conductive paste including a conductive particle and a resin, and pores that are present inside the porous sheet are filled with laminated resin. The average hole diameter of the pores inside the porous sheet may be smaller than the average particle size of the conductive particle. Thereby, it is possible to make the insulating layer of the circuit board securing the interlayer electrically connection by an inner via hole including a conductive paste to be homogenized and ultra-thin and improve the reliability of the connection of the inner via hole.
摘要翻译：包括所需数量的电绝缘层和交替层叠的布线层的电路板，以及用于通过压缩和硬化包括导电颗粒和树脂的导电膏来固定布线层之间的电连接的内通孔。在电绝缘层中，多孔片材至少在一个表面上设置有树脂片，多孔片材至少在中心部分不浸渍树脂。在电绝缘层的厚度方向贯通电绝缘层的贯通孔填充有包含导电性粒子和树脂的导电性糊剂，并且在多孔质片材内存在的孔填充有层叠树脂。多孔片内的孔的平均孔径可以小于导电性粒子的平均粒径。由此，可以使电路基板的绝缘层通过包括导电浆料的内部通孔来确保层间电连接，从而均匀化并且超薄，并提高内部通孔连接的可靠性。

8. 发明授权

US06756628B2 Capacitor sheet with built in capacitors 失效
标题翻译：内置电容器的电容器片
公开(公告)号：US06756628B2
公开(公告)日：2004-06-29
申请号：US10155700
申请日：2002-05-24
申请人： Fumio Echigo , Tadashi Nakamura , Daizo Andoh
发明人： Fumio Echigo , Tadashi Nakamura , Daizo Andoh
IPC分类号： H01L27108
CPC分类号： H05K1/162 , H01L28/60 , H05K1/141 , H05K3/4069 , H05K3/429 , H05K2201/09309 , H05K2201/09581
摘要： A capacitor sheet includes a laminate sheet, interface-connection feedthrough conductors for electrically connecting faces of the laminate sheet, and capacitor-connection feedthrough conductors. The laminate sheet has at least one laminate which is composed of a power source layer electrode, a grounding layer electrode, and a dielectric layer interposed between the power source layer electrode and the grounding layer electrode. The interface-connection feedthrough conductors are formed in through holes that pass through the dielectric layer, the power source layer electrode, and the grounding layer electrode, and are insulated by insulation walls from the power source layer electrode and the grounding layer electrode provided inside. The capacitor-connection feedthrough conductors are formed in regions where only either the power source layer electrode or the grounding layer electrode is provided, and are connected electrically with either the power source layer electrode or the grounding layer electrode. This configuration makes the electric connection for employing the capacitors and the electric connection between faces of the sheet independent from each other. Thus, it is possible to provide a capacitor sheet in which the adverse effects of inductances of vias are minimized.
摘要翻译：电容器片包括层压片，用于电连接层压片的表面的接口连接馈通导体和电容器连接馈通导体。层叠片具有至少一层由电源层电极，接地层电极和插在电源层电极和接地层电极之间的电介质层构成的层叠体。界面连接馈通导体形成在穿过电介质层，电源层电极和接地层电极的通孔中，并且由设置在内部的电源层电极和接地层电极的绝缘壁绝缘。电容器连接馈通导体形成在仅设置电源层电极或接地层电极的区域中，并且与电源层电极或接地层电极电连接。这种构造使得用于采用电容器的电连接和片材的面之间的电连接彼此独立。因此，可以提供一种电容器片，其中通孔的电感的不利影响被最小化。

9. 发明授权

US07018705B2 Multilayer circuit board and method for manufacturing the same 失效
公开(公告)号：US07018705B2
公开(公告)日：2006-03-28
申请号：US10842900
申请日：2004-05-10
申请人： Yasuhiro Nakatani , Hideki Higashitani , Tadashi Nakamura , Fumio Echigo
发明人： Yasuhiro Nakatani , Hideki Higashitani , Tadashi Nakamura , Fumio Echigo
IPC分类号： B32B3/00 , H01R9/09
CPC分类号： H05K3/4614 , H05K1/113 , H05K3/4069 , H05K3/4652 , H05K2201/0195 , H05K2201/09045 , H05K2201/096 , H05K2201/10378 , H05K2203/068 , H05K2203/1461 , Y10S428/901 , Y10T29/49124 , Y10T29/49126 , Y10T428/24917
摘要： It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.

10. 发明申请

US20060008628A1 Multilayer circuit board and method for manufacturing the same 失效
标题翻译：多层电路板及其制造方法
公开(公告)号：US20060008628A1
公开(公告)日：2006-01-12
申请号：US11226142
申请日：2005-09-14
申请人： Yasuhiro Nakatani , Hideki Higashitani , Tadashi Nakamura , Fumio Echigo
发明人： Yasuhiro Nakatani , Hideki Higashitani , Tadashi Nakamura , Fumio Echigo
IPC分类号： B32B15/00
CPC分类号： H05K3/4614 , H05K1/113 , H05K3/4069 , H05K3/4652 , H05K2201/0195 , H05K2201/09045 , H05K2201/096 , H05K2201/10378 , H05K2203/068 , H05K2203/1461 , Y10S428/901 , Y10T29/49124 , Y10T29/49126 , Y10T428/24917
摘要： It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.
摘要翻译：本发明的目的是提供一种层叠多个电路板的多层电路板及其制造方法，其中至少一个位于外侧的电路板，导电物质填充穿过电路板的厚度方向的孔并固化，并且多个电路板的布线层通过已固化的导电物质电连接，其中在多层电路板中，位于外侧的布线层已经固化的导电物质从其周围向外突出。因此，导热膏在热压期间被充分压缩，从而产生稳定的电连接，并且可以在内层布线图案之间填充热固性树脂，而不会留下间隙。

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