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1. 发明申请

US20080145990A1 METHOD AND STRUCTURE FOR FABRICATING MOS DEVICES WITH A SALICIDED GATE AND SOURCE/DRAIN COMBINED WITH A NON-SILICIDE SOURCE DRAIN REGIONS 有权
标题翻译：用非水硅源排水区组合的卤化物门和源/排出物制造MOS器件的方法和结构
公开(公告)号：US20080145990A1
公开(公告)日：2008-06-19
申请号：US11615967
申请日：2006-12-23
申请人： Zhong Shan Hong , Xian Yong Pu
发明人： Zhong Shan Hong , Xian Yong Pu
IPC分类号： H01L21/336
CPC分类号： H01L21/823418 , H01L21/823443 , H01L21/823814 , H01L21/823835 , H01L27/14612 , H01L27/14689 , H01L29/665
摘要： A method for fabricating an integrated circuit device, e.g., CMOS image sensor. The method includes providing a semiconductor substrate, which has a first device region and a second device region. The method forms a gate polysilicon layer overlying the first and second device regions. The method forms a silicide layer overlying the gate polysilicon layer. The method patterns the silicide layer and gate polysilicon layer to form a first silicided gate structure in the first device region and a second silicided gate structure in the second device region. The method also includes forming a blocking layer overlying the second device region. The method forms a silicide material overlying a first source region and a first drain region associated with the first silicided gate structure, and maintaining a second source region and a second drain region associated with the second silicided gate structure free from any silicide using the blocking layer.
摘要翻译：一种用于制造集成电路器件的方法，例如CMOS图像传感器。该方法包括提供具有第一器件区域和第二器件区域的半导体衬底。该方法形成覆盖第一和第二器件区域的栅极多晶硅层。该方法形成覆盖栅极多晶硅层的硅化物层。该方法图案化硅化物层和栅极多晶硅层，以在第一器件区域中形成第一硅化栅结构，在第二器件区域形成第二硅化栅结构。该方法还包括形成覆盖第二器件区域的阻挡层。该方法形成了覆盖第一源区和与第一硅化栅结构相关联的第一漏区的硅化物材料，并且使用阻挡层保持与第二硅化物栅结构相关联的第二源极区和与第二硅化物栅结构无关的第二漏区。

2. 发明授权

US07842578B2 Method for fabricating MOS devices with a salicided gate and source/drain combined with a non-silicide source drain regions 有权
标题翻译：用于制造具有阴极栅极和与非硅化物源极漏极区域结合的源极/漏极的MOS器件的方法
公开(公告)号：US07842578B2
公开(公告)日：2010-11-30
申请号：US11615967
申请日：2006-12-23
申请人： Zhong Shan Hong , Xian Yong Pu
发明人： Zhong Shan Hong , Xian Yong Pu
IPC分类号： H01L21/336
CPC分类号： H01L21/823418 , H01L21/823443 , H01L21/823814 , H01L21/823835 , H01L27/14612 , H01L27/14689 , H01L29/665
摘要： A method for fabricating an integrated circuit device, e.g., CMOS image sensor. The method includes providing a semiconductor substrate, which has a first device region and a second device region. The method forms a gate polysilicon layer overlying the first and second device regions. The method forms a silicide layer overlying the gate polysilicon layer. The method patterns the silicide layer and gate polysilicon layer to form a first silicided gate structure in the first device region and a second silicided gate structure in the second device region. The method also includes forming a blocking layer overlying the second device region. The method forms a silicide material overlying a first source region and a first drain region associated with the first silicided gate structure, and maintaining a second source region and a second drain region associated with the second silicided gate structure free from any silicide using the blocking layer.
摘要翻译：一种用于制造集成电路器件的方法，例如CMOS图像传感器。该方法包括提供具有第一器件区域和第二器件区域的半导体衬底。该方法形成覆盖第一和第二器件区域的栅极多晶硅层。该方法形成覆盖栅极多晶硅层的硅化物层。该方法图案化硅化物层和栅极多晶硅层，以在第一器件区域中形成第一硅化栅结构，在第二器件区域形成第二硅化栅结构。该方法还包括形成覆盖第二器件区域的阻挡层。该方法形成了覆盖第一源区和与第一硅化栅结构相关联的第一漏区的硅化物材料，并且使用阻挡层保持与第二硅化物栅结构相关联的第二源极区和与第二硅化物栅结构无关的第二漏区。

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