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1. 发明授权

US08006220B2 Model-building optimization 有权
标题翻译：建模优化
公开(公告)号：US08006220B2
公开(公告)日：2011-08-23
申请号：US12237069
申请日：2008-09-24
申请人： Trent Lorne McConaghy , Kristopher Breen , Shawn Rusaw , David Callele
发明人： Trent Lorne McConaghy , Kristopher Breen , Shawn Rusaw , David Callele
IPC分类号： G06F17/50
CPC分类号： G06F17/5063 , G06F2217/08
摘要： A method and system for performing multi-objective optimization of a multi-parameter design having several variables and performance metrics. The optimization objectives include the performance values of surrogate models of the performance metrics and the uncertainty in the surrogate models. The uncertainty is always maximized while the performance metrics can be maximized or minimized in accordance with the definitions of the respective performance metrics. Alternatively, one of the optimization objectives can be the value of a user-defined cost function of the multi-parameter design, the cost function depending from the performance metrics and/or the variables. In this case, the other objective is the uncertainty of the cost function, which is maximized. The multi-parameter designs include electrical circuit designs such as analog, mixed-signal, and custom digital circuits.
摘要翻译：用于执行具有若干变量和性能度量的多参数设计的多目标优化的方法和系统。优化目标包括性能指标的代理模型的性能价值和代理模型中的不确定性。不确定性总是最大化，同时可以根据相应性能指标的定义最大化或最小化性能指标。或者，优化目标之一可以是多参数设计的用户定义的成本函数的值，成本函数取决于性能度量和/或变量。在这种情况下，另一个目标是成本函数的不确定性，这是最大化的。多参数设计包括电路设计，如模拟，混合信号和定制数字电路。

2. 发明申请

US20090228846A1 GLOBAL STATISTICAL OPTIMIZATION, CHARACTERIZATION, AND DESIGN 有权
标题翻译：全球统计优化，特征和设计
公开(公告)号：US20090228846A1
公开(公告)日：2009-09-10
申请号：US12396972
申请日：2009-03-03
申请人： Trent Lorne McCONAGHY , Pat DRENNAN , Joel COOPER , Jeffrey DYCK , David CALLELE , Shawn RUSAW , Samer SALLAM , Jiangdon GE , Anthony ARKLES , Kristopher BREEN , Sean COCKS
发明人： Trent Lorne McCONAGHY , Pat DRENNAN , Joel COOPER , Jeffrey DYCK , David CALLELE , Shawn RUSAW , Samer SALLAM , Jiangdon GE , Anthony ARKLES , Kristopher BREEN , Sean COCKS
IPC分类号： G06F17/50
CPC分类号： G06F17/5063
摘要： For application to analog, mixed-signal, and custom digital circuits, a system and method to do: global statistical optimization (GSO), global statistical characterization (GSC), global statistical design (GSD), and block-specific design. GSO can perform global yield optimization on hundreds of variables, with no simplifying assumptions. GSC can capture and display mappings from design variables to performance, across the whole design space. GSC can handle hundreds of design variables in a reasonable time frame, e.g., in less than a day, for a reasonable number of simulations, e.g., less than 100,000. GSC can capture design variable interactions and other possible nonlinearities, explicitly capture uncertainties, and intuitively display them. GSD can support the user's exploration of design-to-performance mappings with fast feedback, thoroughly capturing design variable interactions in the whole space, and allow for more efficiently created, more optimal designs. Block-specific design should make it simple to design small circuit blocks, in less time and with lower overhead than optimization through optimization.
摘要翻译：对于应用于模拟，混合信号和定制数字电路的系统和方法：全局统计优化（GSO），全局统计特征（GSC），全局统计设计（GSD）和块特定设计。 GSO可以对数百个变量执行全局收益优化，而不需要简化假设。 GSC可以在整个设计空间中捕获并显示从设计变量到性能的映射。 GSC可以在合理的时间范围内处理数百个设计变量，例如在不到一天的时间内，对于合理数量的模拟，例如小于100,000。 GSC可以捕获设计变量交互和其他可能的非线性，明确地捕获不确定性，并直观显示它们。 GSD可以通过快速反馈支持用户对设计到性能映射的探索，彻底地捕获整个空间中的设计变量交互，并允许更有效地创建，更优化的设计。块特定设计应使设计小电路块的设计变得简单，在优化过程中，在更短的时间内和更低的开销。

3. 发明申请

US20090083680A1 MODEL-BUILDING OPTIMIZATION 有权
标题翻译：建模优化
公开(公告)号：US20090083680A1
公开(公告)日：2009-03-26
申请号：US12237069
申请日：2008-09-24
申请人： Trent Lorne McConaghy , Kristopher BREEN , Shawn RUSAW , David CALLELE
发明人： Trent Lorne McConaghy , Kristopher BREEN , Shawn RUSAW , David CALLELE
IPC分类号： G06F17/50
CPC分类号： G06F17/5063 , G06F2217/08
摘要： A method and system for performing multi-objective optimization of a multi-parameter design having several variables and performance metrics. The optimization objectives include the performance values of surrogate models of the performance metrics and the uncertainty in the surrogate models. The uncertainty is always maximized while the performance metrics can be maximized or minimized in accordance with the definitions of the respective performance metrics. Alternatively, one of the optimization objectives can be the value of a user-defined cost function of the multi-parameter design, the cost function depending from the performance metrics and/or the variables. In this case, the other objective is the uncertainty of the cost function, which is maximized. The multi-parameter designs include electrical circuit designs such as analog, mixed-signal, and custom digital circuits.
摘要翻译：用于执行具有若干变量和性能度量的多参数设计的多目标优化的方法和系统。优化目标包括性能指标的代理模型的性能价值和代理模型中的不确定性。不确定性总是最大化，同时可以根据相应性能指标的定义最大化或最小化性能指标。或者，优化目标之一可以是多参数设计的用户定义的成本函数的值，成本函数取决于性能度量和/或变量。在这种情况下，另一个目标是成本函数的不确定性，这是最大化的。多参数设计包括电路设计，如模拟，混合信号和定制数字电路。

4. 发明授权

US07089163B2 Smooth operators in optimization of structures 有权
标题翻译：平稳运算符优化结构
公开(公告)号：US07089163B2
公开(公告)日：2006-08-08
申请号：US10227858
申请日：2002-08-27
申请人： Trent Lorne McConaghy
发明人： Trent Lorne McConaghy
IPC分类号： G00F7/60
CPC分类号： G06F17/50
摘要： A method of identifying technology design candidates from a design space of design candidates leverages specialized operators which are smooth in the sense that the operators are capable of producing small changes in the performance or behaviour when applied to a design to modify it. The method includes determining a smooth operator for effecting incremental structural change to a technology design when the smooth operator is applied to the technology design and then applying the smooth operator to at least one technology design in the population to determine an updated population. The technology designs in the updated population are evaluated to identify a preferred semiconductor technology design. If the stopping condition is satisfied then the search terminates otherwise the steps are repeated.
摘要翻译：从设计候选人的设计空间中识别技术设计候选者的方法利用了特定的操作者，这些操作者在应用于设计以对其进行修改时能够产生小的性能或行为变化的意义上是平滑的。该方法包括：当将平滑算子应用于技术设计，然后将平滑运算符应用于群体中的至少一个技术设计以确定更新的群体时，确定平滑运算符以实现技术设计的增量结构变化。评估更新的人群中的技术设计，以确定首选的半导体技术设计。如果满足停止条件，则搜索终止，否则重复步骤。

5. 发明授权

US06807652B2 Method of robust semiconductor circuit products design using rational robust optimization 失效
标题翻译：鲁棒半导体电路产品设计方法采用合理鲁棒优化
公开(公告)号：US06807652B2
公开(公告)日：2004-10-19
申请号：US10227802
申请日：2002-08-27
申请人： Trent Lorne McConaghy
发明人： Trent Lorne McConaghy
IPC分类号： G06F1750
CPC分类号： G06F17/50 , G06F17/5063 , G06F2217/10
摘要： A method for robust optimization of semiconductor product and manufacture design using a search engine. The method comprises selecting one of first and second candidates based on at least one objective function, sampling the first candidate and determining one or more sample objective function values for the first candidate; sampling the second candidate and determining one or more sample objective function values for the second candidate; statistically determining, based on the sampled objective function values, corresponding first and second statistical estimators of design quality; and comparing the first and second statistical estimators of design quality.
摘要翻译：一种使用搜索引擎优化半导体产品和制造设计的方法。该方法包括基于至少一个目标函数来选择第一和第二候选中的一个，对第一候选进行采样并确定第一候选的一个或多个采样目标函数值; 对第二候选进行采样并确定第二候选的一个或多个样本目标函数值; 根据抽样的目标函数值统计确定相应的设计质量的第一和第二统计估计量; 并比较了设计质量的第一和第二统计估计。

6. 发明授权

US08332188B2 Modeling of systems using canonical form functions and symbolic regression 有权
标题翻译：使用规范形式函数和符号回归建模系统
公开(公告)号：US08332188B2
公开(公告)日：2012-12-11
申请号：US11682089
申请日：2007-03-05
申请人： Trent Lorne McConaghy
发明人： Trent Lorne McConaghy
IPC分类号： G06F17/10
CPC分类号： G06F17/5036
摘要： An apparatus and method to generate and evolve canonical form expressions representing a characteristic of a given system. Static and dynamic behavior of non-linear electrical circuits can be modeled. Searching of canonical form expressions can use evolutionary algorithms, simulated annealing and Tabu searching.
摘要翻译：一种用于生成和演化表示给定系统的特征的规范形式表达式的装置和方法。可以建模非线性电路的静态和动态特性。搜索规范表达式可以使用进化算法，模拟退火和Tabu搜索。

7. 发明授权

US08024682B2 Global statistical optimization, characterization, and design 有权
标题翻译：全局统计优化，表征和设计
公开(公告)号：US08024682B2
公开(公告)日：2011-09-20
申请号：US12396972
申请日：2009-03-03
申请人： Trent Lorne McConaghy , Pat Drennan , Joel Cooper , Jeffrey Dyck , David Callele , Shawn Rusaw , Samer Sallam , Jiangdon Ge , Anthony Arkles , Kristopher Breen , Sean Cocks
发明人： Trent Lorne McConaghy , Pat Drennan , Joel Cooper , Jeffrey Dyck , David Callele , Shawn Rusaw , Samer Sallam , Jiangdon Ge , Anthony Arkles , Kristopher Breen , Sean Cocks
IPC分类号： G06F17/50
CPC分类号： G06F17/5063
摘要： For application to analog, mixed-signal, and custom digital circuits, a system and method to do: global statistical optimization (GSO), global statistical characterization (GSC), global statistical design (GSD), and block-specific design. GSO can perform global yield optimization on hundreds of variables, with no simplifying assumptions. GSC can capture and display mappings from design variables to performance, across the whole design space. GSC can handle hundreds of design variables in a reasonable time frame, e.g., in less than a day, for a reasonable number of simulations, e.g., less than 100,000. GSC can capture design variable interactions and other possible nonlinearities, explicitly capture uncertainties, and intuitively display them. GSD can support the user's exploration of design-to-performance mappings with fast feedback, thoroughly capturing design variable interactions in the whole space, and allow for more efficiently created, more optimal designs. Block-specific design should make it simple to design small circuit blocks, in less time and with lower overhead than optimization through optimization.
摘要翻译：对于应用于模拟，混合信号和定制数字电路的系统和方法：全局统计优化（GSO），全局统计特征（GSC），全局统计设计（GSD）和块特定设计。 GSO可以对数百个变量执行全局收益优化，而不需要简化假设。 GSC可以在整个设计空间中捕获并显示从设计变量到性能的映射。 GSC可以在合理的时间范围内处理数百个设计变量，例如在不到一天的时间内，对于合理数量的模拟，例如小于100,000。 GSC可以捕获设计变量交互和其他可能的非线性，明确地捕获不确定性，并直观显示它们。 GSD可以通过快速反馈支持用户对设计到性能映射的探索，彻底地捕获整个空间中的设计变量交互，并允许更有效地创建，更优化的设计。块特定设计应使设计小电路块的设计变得简单，在优化过程中，在更短的时间内和更低的开销。

8. 发明授权

US07689952B2 System and method for determining and visualizing tradeoffs between yield and performance in electrical circuit designs 有权
标题翻译：用于确定和可视化电路设计中产量和性能之间权衡的系统和方法
公开(公告)号：US07689952B2
公开(公告)日：2010-03-30
申请号：US11780085
申请日：2007-07-19
申请人： Trent Lorne McConaghy , Charles Cazabon , Jiandong Ge , Shawn Rusaw , Kristopher Breen , Jason Coutu
发明人： Trent Lorne McConaghy , Charles Cazabon , Jiandong Ge , Shawn Rusaw , Kristopher Breen , Jason Coutu
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F17/5036 , G06F17/5045
摘要： A system that includes a candidate generator that generates candidate vectors having as components performance specifications of an electrical circuit design. The system also includes a performance estimator that generates performance vectors of the electrical circuit design, the performance vectors having as components performance values of the electrical circuit design. The candidate vectors and the performance vectors are input into a statistical estimator that calculates a statistical parameter, for example, yield, for each candidate vector in accordance with the performance vectors. The system further includes a filter that receives the candidate vectors and their respective statistical parameters, and outputs a filtered candidate vector with its corresponding filtered statistical parameter. A display system visually represents the filtered candidate vector and its corresponding filtered statistical parameter.
摘要翻译：一种系统，其包括产生具有作为电路设计的性能规格的组件的候选矢量的候选发生器。该系统还包括产生电路设计的性能矢量的性能估计器，性能矢量具有作为电路设计的性能值的组件。将候选向量和性能向量输入到统计估计器中，该统计估计器根据性能向量计算每个候选向量的统计参数，例如产量。该系统还包括接收候选向量及其各自的统计参数的滤波器，并且输出具有其对应的滤波统计参数的滤波后的候选向量。显示系统可视地表示经滤波的候选矢量及其对应的滤波统计参数。

9. 发明授权

US08443329B2 Trustworthy structural synthesis and expert knowledge extraction with application to analog circuit design 有权
标题翻译：可信赖的结构综合和专家知识提取与应用于模拟电路设计
公开(公告)号：US08443329B2
公开(公告)日：2013-05-14
申请号：US12466894
申请日：2009-05-15
申请人： Trent Lorne McConaghy
发明人： Trent Lorne McConaghy
IPC分类号： G06F17/50 , G06F11/22 , G06F9/44 , G06F9/45
CPC分类号： G06F17/5063
摘要： A system and method that does trustworthy multi-objective structural synthesis of analog circuits, and extracts expert analog circuit knowledge from the resulting tradeoffs. The system defines a space of thousands of possible topologies via a hierarchically organized combination of designer-trusted analog building blocks, the resulting topologies are guaranteed trustworthy. The system can perform a search based on a multi-objective evolutionary algorithm that uses an age-layered population structure to balance exploration vs. exploitation, with operators that make the search space a hybrid between vector-based and tree-based representations. A scheme employing average ranking on Pareto fronts is used to handle a high number of objectives. Good initial topology sizings are quickly generated via multi-gate constraint satisfaction. To explicitly capture expert analog design knowledge, data mining is employed on the sized circuits to: automatically generate a decision tree for navigating from performance specifications to topology choice, to do global nonlinear sensitivity analysis, and to generate analytical models of performance tradeoffs.
摘要翻译：一种可靠的多目标结构合成模拟电路的系统和方法，并从所产生的权衡中提取专家模拟电路知识。该系统通过设计师可信赖的模拟构建块的分层组织的组合来定义数千个可能拓扑的空间，所得拓扑保证可信赖。该系统可以基于多目标进化算法进行搜索，该算法使用年龄分层的人口结构来平衡勘探与开发，使搜索空间与基于向量和基于树的表示形成混合。使用平均排名在帕累托战线的方案来处理大量的目标。通过多门约束满足快速生成良好的初始拓扑图。为了明确地捕获专家模拟设计知识，在大小的电路中采用数据挖掘：自动生成用于从性能规范到拓扑选择的导航，进行全局非线性灵敏度分析以及生成性能折衷的分析模型的决策树。

10. 发明授权

US07761834B2 Interactive schematic for use in analog, mixed-signal, and custom digital circuit design 有权
标题翻译：用于模拟，混合信号和定制数字电路设计的交互式原理图
公开(公告)号：US07761834B2
公开(公告)日：2010-07-20
申请号：US11780039
申请日：2007-07-19
申请人： Trent Lorne McConaghy , Kristopher Breen , Amit Gupta , David Callele , Jeffrey Dyck , Charles Cazabon , Joel Cooper , Shawn Rusaw
发明人： Trent Lorne McConaghy , Kristopher Breen , Amit Gupta , David Callele , Jeffrey Dyck , Charles Cazabon , Joel Cooper , Shawn Rusaw
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： For application to analog, mixed-signal, and custom digital circuits, a system and method to improve the flow of setting up a set of simulations, a characterization, or optimization problem via an interactive circuit schematic. A system and method to visualize circuit simulation data in which at least one of the views is an enhanced, interactive schematic view.
摘要翻译：对于应用于模拟，混合信号和定制数字电路的系统和方法，通过交互式电路原理图改进设置一组仿真，表征或优化问题的流程的系统和方法。一种用于可视化电路仿真数据的系统和方法，其中至少一个视图是增强的交互式示意图。

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